5 4 3 Table of Contents 2 3 4 5 6 7 8 Notes MCU (SKT) Power MCU (SKT) I/O Clock and Reset Circuit JTAG, MSC1, & SIPI / ANALOG FILT MB Connections 1 MB Connections 2 2 Rev Description A Prototype Release 1 Revisions Date Approved 20-MAY-13 J.H D D C C B B Microcontroller Solutions Group A A 6501 William Cannon Drive West Austin, TX 78735-8598 This document contains information proprietary to Freescale Semiconductor and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of Freescale Semiconductor. ICAP Classification: FCP: ____ FIUO: X PUBI: ____ Designer: Drawing Title: Hartvigsen Jay X-MPC5746R-252DC 5 4 3 2 Drawn by: Hartvigsen Jay Page Title: Approved: Steve Harrington Size C Document Number Date: Monday, May 20, 2013 TITLE PAGE Rev A SCH-27770, PDF: SPF-27770 Sheet 1 1 of 8 5 4 3 2 1 NOTES 1. Unless Otherwise Specified: All resistors are in ohms All capacitors are in uF All voltages are DC All polarized capacitors are aluminum electrolytic D Power & Ground Nets MOTHER BOARD SUPPLIED POWER 2. Interrupted lines coded with the same letter or letter combinations are electrically connected. 3. Device type number is for reference only. The number varies with the manufacturer. 4. Special signal usage: _B Denotes - Active-Low Signal <> or [] Denotes - Vectored Signals 1.25V_MB_SR 1.25V From the MB switching regulator 3.3V_MB_SR 3.3V From the MB switching regulator 5V_MB_SR 5V From the MB switching regulator 5V_MB_LR 5V From the MB linear regulator D EXTERNALLY SUPPLIED POWER 5. Interpret diagram in accordance with American National Standards Institute specifications, current revision, with the exception of logic block symbology. 1.25V_EXT 1.25V External power into pin 1 of the terminal block 3.3V_EXT 3.3V External power into pin 2 of the terminal block 5V_EXT 5V External power into pin 3 of the terminal block VDD_LV_CORE 1.25V Power to the core logic on the MCU VDD_LV_REG 1.25V Power derived from MB or EXT 5V or 3.3V and regulated by the MCU through an external transistor VDD_LV_STBY 3.3V or 5V Standby power to the MCU VDD_HV_IO_JTAG 3.3V or 5V Power to the JTAG and clock circuits on the MCU VDD_HV_FLA 3.3V Power to the MCU flash memory (regulated internally by MCU) VDD_HV_IO_MSC 3.3V or 5V Power to the MSC circuit on the MCU POWER TO THE MCU C C VDD_HV_IO_FEC 3.3V or 5V Power to the FEC circuit on the MCU VDD_HV_PMC 5V Power to the PMC circuit on the MCU VDD_HV_IO_MAIN 5V Power to the I/O circuits on the MCU VDD_HV_ADV_SAR 5V Power and reference voltage to the SAR ADC on the MCU VDD_HV_ADV_SD 5V Power and reference voltage to the SD ADC on the MCU VDD_HV_IO_MB 3.3V or 5V Power for I/O circuits on the Mother Board OSC_PWR 3.3V or 5V Power for the clock oscillator GND 0V Main digital ground VSSA_JTAG 0V Filtered ground for the JTAG and clock circuits VSSA_ADC 0V Filtered ground for the on chip ADC circuits OTHER POWER NETS GROUND NETS B B A A ICAP Classification: Drawing Title: FCP: ___ FIUO: X PUBI: ___ X-MPC5746R-252DC Page Title: NOTES 5 4 3 2 Size C Document Number Date: Monday, May 20, 2013 Rev A SCH-27770, PDF: SPF-27770 Sheet 1 2 of 8 5 4 3 2 1 5V_EXT 5V_MB_LR TP20 J22 VDD_HV_ADV_SAR External Power Supply Input L3 1 VDD_HV_ADV_SAR C68 C69 0.1uF 16V 22uF 16V 1 2 3 VSAR Default: 1-2 (Use 5V LR on MB) 330 OHM 1.25V_EXT 3.3V_EXT 2 HDR TH 1X3 5V_EXT 5V_MB_LR TP12 5V_EXT J8 VDD_HV_ADV_SD L2 VSSA_ADC 1 VDD_HV_ADV_SD D C46 C45 0.1uF 16V 1 2 3 VSD Default: 1-2 (Use 5V LR on MB) D 330 OHM J6 1 2 HDR TH 1X3 2.2uF 16V 2 5V_MB_LR 3.3V_MB_SR TP4 3 4 L1 1 VDD_HV_IO_JTAG R6 330 C27 0.1uF 16V 4.7uF 16V 3.3V_MB_SR TP2 A C17 0.1uF 16V 4.7uF 16V HDR_2X5 2 4 6 8 10 5V_EXT 5V_MB_SR HDR_2X5 TP14 J14 C VDD_HV_PMC 1 2 3 VDD_HV_PMC C55 Default: 1-2 (Use 5V SR on MB) C56 0.1uF 16V 5V_EXT HDR TH 1X3 4.7uF 16V 2 4 6 8 10 5V_EXT 3.3V_EXT 1 3 5 7 9 VDD_HV_IO_MSC C18 1 3 5 7 9 VJTG J5 VDD_HV_IO_MSC D1 GREEN 2 330 OHM Default: 7-9 (Use 5V SR on MB) 5V_MB_SR 5V_EXT_LED C28 5V_EXT 3.3V_EXT J3 VDD_HV_IO_JTAG VSSA_ADC CON_4_TB Default: 1-3 (Use 3.3V SR on MB) 5V_MB_SR TP21 J23 VDD_HV_IO_MAIN 1 2 3 VDD_HV_IO_MAIN C C50 C51 C58 C57 C65 C60 C31 C26 C23 C30 0.1uF 16V 4.7uF 16V 0.1uF 16V 4.7uF 16V 0.1uF 16V 4.7uF 16V 0.1uF 16V 4.7uF 16V 0.1uF 16V 4.7uF 16V Default: 1-2 (Use 5V SR on MB) C HDR TH 1X3 5V_MB_SR Default: 1-3 (Use 3.3V SR on MB) Default: 1-3 (Use 3.3V SR on MB) 5V_MB_SR 3.3V_MB_SR VDD_STBY 2 4 6 8 10 Default: 3-5 (Connect to GND) 5V_MB_SR 3.3V_MB_SR C40 0.1uF 16V R13 1 3 5 7 9 C37 4.7uF 16V 5V_SRC 1.8 ohm 3W J4 HDR_2X5 VDD_STBY TP15 VDD_HV_FLA 5V_EXT 3.3V_EXT 2 4 6 8 10 HDR_2X5 C67 4.7UF Default: 1-3 (Use 1.25V SR on MB) 1.25V_EXT HDR_2X5 1.25V_MB_SR C42 C43 C64 C59 C53 C54 C34 C35 C24 C25 0.22UF 10V 4.7uF 16V DNP 0.22UF 10V 4.7uF 16V 0.22UF 10V 4.7uF 16V DNP 0.22UF 10V 4.7uF 16V DNP 0.22UF 10V 0.22UF 10V 2 4 6 VDD_LV_REG 1 HDR_2X3 B J17 HDR 1X2 TH Default: 1-2 (enable on-chip reg) 2 1 L1 VRC_CTL CORE REGULATOR VDD_LV1 VDD_LV2 VDD_LV3 VDD_LV4 VDD_LV5 VDD_LV6 VDD_LV7 VDD_LV8 VDD_LV9 VDD_LV10 VDD_LV11 VDD_LV12 VDD_LV13 VDD_LV14 MCU CORE LOGIC (1.25V) J1 VDD_STBY BUDDY CORE LOGIC (1.25V) VDD_HV_FLA FLASH DECOUPLING B1 C2 D3 J9 J10 J11 J12 M9 M10 M11 M12 U3 W1 V2 VDD_LV_CORE N1 Y10 VDD_HV_IO_FEC FEC (5V) A11 A19 B18 F20 K1 T1 Y6 VDD_HV_IO_MAIN1 VDD_HV_IO_MAIN2 VDD_HV_IO_MAIN3 VDD_HV_IO_MAIN4 VDD_HV_IO_MAIN5 VDD_HV_IO_MAIN6 VDD_HV_IO_MAIN7 I/O (3.3V-5V) M1 VDD_HV_PMC PMC (5V) A5 VDD_HV_IO_MSC MSC (5V) VDD_HV_IO_JTAG 1 3 5 BCTRL VIBD C76 0.047UF 25V DNP GND TEST POINTS GENERAL GROUNDS POWER PINS TP10 TP9 TP17 TP18 TP13 D2 A1 A2 A20 B2 B6 B12 B19 C3 E19 G2 K9 K10 K11 K12 L2 L9 L10 L11 L12 R2 V3 W2 W6 W11 Y1 Y2 L19 K19 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS_HV_ADR_SD VSS_HV_ADV_SD ADC SD OSC & JTAG (3.3V OR 5V) VDD_HV_ADR_SD VDD_HV_ADV_SD C1 L20 K20 Y18 V19 W20 W18 Y19 W19 Y20 VSS_HV_ADR_SAR1 VSS_HV_ADR_SAR2 VSS_HV_ADV_SAR1 VSS_HV_ADV_SAR2 ADC SAR B VDD_HV_ADR_SAR VDD_HV_ADV_SAR1 VDD_HV_ADV_SAR2 U1A NJD2873T4 Q1 J18 VDD_LV_CORE 2.2UF 6.3V 2 4 6 8 10 VDD_LV_SEL TP16 C52 1 3 5 7 9 4 1 3 5 7 9 TP3 4.7uF 16V J19 J20 C75 0.1uF 16V 3.3V_EXT VDD_HV_IO_FEC VDD_HV_IO_FEC C72 3.3V_EXT 3 3.3V_MB_SR TP19 5V_EXT 5V_EXT SPC5746RTK0MMT5 + 10483PT + OTB-252(484RS)-0.8-007 VSSA_ADC VDD_HV_IO_MAIN L5 330 OHM VSSA_ADC 2 1 VDD_HV_IO_MAIN VSSA_ADC A C10 C9 C6 C7 C8 C2 C11 C15 C12 C16 C14 C21 C13 C19 C22 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V A VDD_HV_IO_MAIN ICAP Classification: Drawing Title: VDD_HV_IO_MAIN C78 C41 C49 C63 C33 C66 C44 C71 C4 C74 C73 C70 C79 C77 C5 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V 0.1uF 16V FCP: ___ FIUO: X PUBI: ___ X-MPC5746R-252DC Page Title: 5 4 3 MCU Power 2 Size C Document Number Date: Monday, May 20, 2013 Rev A SCH-27770, PDF: SPF-27770 Sheet 1 3 of 8 5 7,8 SIPI_CLK SIPI_TXN SIPI_TXP MSC1_SOUTN MSC1_SOUTP MSC1_CLKN MSC1_CLKP MSC1_RX MSC1_CS1 MSC1_CS0 A3 B3 A4 B4 C4 C5 B5 C6 C7 A6 A7 B7 B8 A8 PTB0 PTB1 TDO TDI D1 E3 PTC0 PTC1 PTC2 PTC3 PTC4 PTC5 PTC6 PTC7 PTC8 PTC9 PTC10 PTC11 PTC12 PTC13 FEC_REF_CLK FEC_TXCLK FEC_TXEN FEC_TXD3 FEC_TXD2 FEC_TXD1 FEC_TXD0 FEC_RXD0 FEC_RXD1 FEC_RXD2 FEC_RXD3 FEC_RXER FEC_RXCLK FEC_RXDV SIPI_RXN SIPI_RXP PB0/TDO PB1/TDI PC0/ETPU25_A/ETPU17_B/EMIOS0_8/RCH0_A/CS0_3/SS_3/FEC_REF_CLK PC1/ETPU26_A/ETPU18_B/EMIOS0_9/RCH0_B/CS1_3/FEC_TXCLK PC2/ETPU27_A/ETPU19_B/EMIOS0_10/RCH0_C/CS2_3/FEC_TXEN PC3/ETPU28_A/ETPU20_B/EMIOS0_11/RCH1_A/CS3_3/FEC_TXD3 PC4/ETPU29_A/ETPU21_B/EMIOS0_12/RCH1_B/CS4_3/FEC_TXD2 PC5/ETPU30_A/ETPU22_B/EMIOS0_13/RCH1_C/CS5_3/FEC_TXD1/FEC_COL PC6/ETPU31_A/ETPU23_B/EMIOS0_14/RCH2_A/CAN2RX/LINM1TX/FEC_TXD0 PC7/ETPU0_A/TCRCLK_A/ETPU24_B/EMIOS0_15/RCH2_B/CAN2TX/LINM1RX/MSC1_RX/FEC_RXD0 PC8/ETPU1_A/TCRCLK_A/ETPU25_B/EMIOS0_16/RCH2_C/LINM0TX/FEC_RXD1 PC9/ETPU2_A/ETPU26_B/EMIOS0_17/RCH3_A/LINM0RX/SIN_3/MSC0_RX/FEC_RXD2 PC10/ETPU3_A/ETPU27_B/EMIOS0_18/RCH3_B/SOUT_3/FEC_RXD3 PC11/ETPU4_A/ETPU28_B/EMIOS0_19/RCH3_C/SIN_3/FEC_RXER PC12/ETPU5_A/ETPU29_B/EMIOS0_20/RCH4_B/SCLK_3/FEC_RXCLK PC13/ETPU6_A/ETPU30_B/EMIOS0_21/RCH4_C/FEC_RXDV PK0/ETPU17_B/EMIOS1_13/RCH7_A/CS3_0 PK1/ETPU18_B/RCH7_B/SIN_0 PK2/ETPU19_B/RCH7_C/SOUT_0 PK4/ETPU20_B/EMIOS0_19/CS2_0 PK5/ETPU21_B/RCH8_A/CS0_0/SS_0 PK7/ETPU0_A/TCRCLK_A/ETPU22_B/EMIOS0_20/RCH8_B/SCLK_2 PK8/ETPU1_A/TCRCLK_A/ETPU23_B/EMIOS0_21/RCH8_C/SIN_2 PK9/ETPU2_A/ETPU24_B/EMIOS0_22/CS4_2 PK10/ETPU3_A/ETPU25_B/EMIOS0_23/RCH7_C/SOUT_2 PK11/ETPU4_A/ETPU26_B/EMIOS1_16/RCH7_B/CS0_2/SS_2 PK12/ETPU5_A/ETPU27_B/EMIOS1_17/RCH7_A/CS1_2/IRQ5 PK13/ETPU6_A/ETPU28_B/EMIOS1_18/RCH6_A/CS2_2/SIN_2/IRQ4 PK14/ETPU7_A/ETPU29_B/EMIOS1_19/RCH9_A/CS3_2/IRQ3 FEC_MDC FEC_MDIO Y3 W3 Y4 W4 V4 Y5 W5 V5 V6 Y7 W7 V7 U7 Y8 W8 V8 PD0/ETPU8_A/ETPU0_B/TCRCLK_B/EMIOS1_8/RCH0_A/CAN1RX/LIN1RX/IRQ0 PD1/INJ_TRIG28/ETPU9_A/ETPU1_B/TCRCLK_B/EMIOS1_9/RCH4_A/CAN1TX/LIN1TX/IRQ1 PD2/ETPU10_A/ETPU2_B/EMIOS1_10/RCH7_A/LIN3RX/IRQ2 PD3/NRML_TRIG/ETPU11_A/ETPU3_B/EMIOS1_11/RCH6_A/LIN3TX/IRQ6 PD4/NRML_TRIG/ETPU12_A/ETPU4_B/EMIOS1_12/RCH1_A/CS5_4/IRQ7 PD5/ETPU13_A/ETPU5_B/EMIOS1_13/RCH8_A/CS4_4 PD6/ETPU14_A/ETPU6_B/EMIOS1_14/RCH9_A/CS3_4 PD7/ETPU15_A/ETPU7_B/EMIOS1_15/RCH2_A/CAN3RX/LIN2RX PD8/ETPU16_A/ETPU8_B/EMIOS1_16/RCH3_A/CAN3TX/LIN2TX/FEC_MDC PD9/ETPU17_A/ETPU9_B/EMIOS1_17/CS2_4 PD10/INJ_TRIG29/ETPU18_A/ETPU10_B/EMIOS1_18/RCH5_A/CS1_4/IRQ10 PD11/ETPU19_A/ETPU11_B/EMIOS1_19/CS0_4/SS_4 PD12/ETPU20_A/ETPU12_B/EMIOS1_20/SOUT_4 PD13/NRML_TRIG/ETPU21_A/ETPU13_B/EMIOS1_21/RCH5_B/CAN0RX/LIN0RX/FEC_MDIO/IRQ8 PD14/NRML_TRIG/ETPU22_A/ETPU14_B/EMIOS1_22/RCH5_C/CAN0TX/LIN0TX/IRQ9/CLKOUT PD15/ETPU23_A/ETPU15_B/EMIOS1_23/SIN_4 PW0/SAR1_28/SAR3_19/ETPU10_A/ETPU24_B PW1/SAR1_29/SAR2_30/ETPU9_A/ETPU13_B/EMIOS1_23/SENT0_0/IRQ3 PW2/SAR1_30/SAR2_31/ETPU8_A/ETPU12_B/EMIOS0_23/SENT1_0/IRQ2 PW3/SAR1_31/SAR3_20/ETPU7_A/ETPU31_B/EMIOS0_22/SENT2_0/IRQ1 PX0/SAR1_12/SAR3_9/ETPU23_A/ETPU4_B PX1/SAR1_13/SAR2_23/SAR3_10/ETPU3_B/EMIOS0_18 PX2/SAR1_14/SAR2_24/ETPU22_A/ETPU2_B PX3/SAR1_15/SAR2_25/ETPU21_A/ETPU1_B/TCRCLK_B PX4/SAR1_16/SAR3_11/ETPU20_A/ETPU0_B/TCRCLK_B PX5/SAR1_17/SAR3_12/ETPU19_A/ETPU13_B PX6/SAR1_18/SAR3_13/ETPU18_A/ETPU14_B PX7/SAR1_19/SAR3_14/ETPU17_A/ETPU15_B PX8/SAR1_20/SAR3_15/ETPU16_A/ETPU16_B PX9/SAR1_21/SAR2_26/ETPU15_A/ETPU17_B PX10/SAR1_22/SAR2_27/ETPU14_A/ETPU18_B/EMIOS1_20/SENT0_1 PX11/SAR1_23/SAR3_16/ETPU19_B PX12/SAR1_24/SAR3_17/ETPU20_B/IRQ7 PX13/SAR1_25/SAR2_28/ETPU13_A/ETPU15_B/EMIOS1_21/SENT1_1/IRQ6 PX14/SAR1_26/SAR2_29/ETPU12_A/ETPU14_B/EMIOS1_22/SENT2_1/IRQ5 PX15/SAR1_27/SAR3_18/ETPU11_A/ETPU23_B/IRQ4 PTE0 U8 PE0/ETPU24_A/ETPU16_B/EMIOS0_8/SCLK_4 PTF[0..13] PTF0 PTF1 PTF2 PTF3 PTF4 PTF5 PTF6 PTF7 PTF8 PTF9 PTF10 PTF11 PTF12 PTF13 LIN2TX LIN2RX PTG1 PTG2 PTG3 PTG4 PTG5 PTG6 PTG7 CAN2RX CAN2TX PTG9 PTG10 PTG11 PTG12 PTG13 PTG14 PTG15 CAN3RX CAN0TX CAN0RX G20 G19 G18 G17 F19 F18 E20 E18 D20 D19 D18 C20 C19 B20 PF0/EXT_ADDR0_3/ETPU0_B/ETPU16_B/TCRCLK_B/EMIOS1_16/RCH9_B/CAN2TX/LIN2TX PF1/EXT_ADDR1_3/ETPU1_B/ETPU17_B/TCRCLK_B/EMIOS1_17/RCH9_C/CAN2RX/LIN2RX PF2/EXT_ADDR2_3/ETPU18_B/LIN3TX PF3/ETPU19_B/LIN3RX PF4/ETPU20_B/EMIOS1_18/RCH5_A/CAN0TX/LIN1TX PF5/ETPU21_B/EMIOS1_19/RCH5_B/CAN0RX/LIN1RX PF6/ETPU22_B/CAN1TX PF7/ETPU23_B/CAN1RX PF8/ETPU24_B/EMIOS1_20 PF9/ETPU23_B/EMIOS1_21/RCH5_C PF10/ETPU24_B/EMIOS1_22/CAN1TX/LIN0TX PF11/ETPU5_A/ETPU25_B/EMIOS1_23/RCH4_A/CAN0RX/CAN1RX/LIN0RX PF12/EXT_ADDR2_3/ETPU6_A/ETPU26_B/EMIOS1_15/RCH4_B/CAN0TX/LIN2TX PF13/EXT_ADDR1_3/ETPU7_A/ETPU27_B/EMIOS1_14/RCH4_C/CAN0RX/LIN2RX LIN1RX LIN1TX CAN3TX A18 A17 B17 C18 B16 A16 C17 C16 A15 B15 B14 A14 C15 C14 PG1/EXT_ADDR0_3/ETPU8_A/ETPU28_B/EMIOS0_8/RCH6_A/SENT1_0/CAN2RX/LIN0RX PG2/ETPU9_A/ETPU29_B/EMIOS0_9/RCH6_B/SENT1_1/CAN2TX/LIN0TX PG3/ETPU30_B/EMIOS0_10/RCH8_A/SENT2_0 PG4/ETPU10_A/ETPU31_B/EMIOS0_11/RCH8_B/SENT2_1 PG5/ETPU11_A/ETPU0_B/TCRCLK_B/EMIOS0_12/RCH6_C/SENT0_0/CAN1RX/LIN1RX PG6/ETPU13_A/ETPU1_B/TCRCLK_B/EMIOS0_13/RCH4_A/SENT0_1/CAN1TX/LIN1TX PG7/ETPU14_A/ETPU2_B/EMIOS0_14/RCH8_C 5 5 EXTAL XTAL D14 A13 B13 C13 D13 A12 C12 D12 B11 C11 D11 A10 B10 C10 D10 A9 F1 G1 EXTAL XTAL H1 G4 H2 H3 H4 J2 J3 J4 K2 K3 K4 L3 L4 M3 M4 N2 PTJ0 PTJ1 PTJ2 PTJ3 PTJ4 PTJ5 PTJ6 PTJ7 PTJ8 PTJ9 PTJ10 PTJ11 PTJ12 PTJ13 PTJ14 PTJ15 7 EVTI0 EVTO0 N3 N4 P1 PTK0 PTK1 PTK2 P2 P3 PTK4 PTK5 P4 R1 R3 T2 T3 U1 U2 V1 PTK7 PTK8 PTK9 PTK10 PTK11 PTK12 PTK13 PTK14 Y13 W13 V13 U13 PTW0 PTW1 PTW2 PTW3 U19 U18 V18 Y17 W17 V17 Y16 W16 U14 Y15 W15 V15 Y14 W14 V14 V16 PTX0 PTX1 PTX2 PTX3 PTX4 PTX5 PTX6 PTX7 PTX8 PTX9 PTX10 PTX11 PTX12 PTX13 PTX14 PTX15 SD2_0 SD2_1 6,8 D PTK[0..14] 7 PTW[0..3] 7 C PTX[0..15] 8 PTY[0..15] 6,8 PTY0 PTY1 PTY2 PTY3 PTY4 PTY5 PTY6 PTY7 PTY8 PTY9 PTY10 PTY11 PTY12 PTY13 PTY14 PTY15 B PTZ[0..15] PG9/ETPU15_A/ETPU3_B/EMIOS0_15/RCH6_B/CAN3RX/CS0_1/SS_1 PG10/ETPU16_A/ETPU4_B/EMIOS0_16/RCH6_C/CS1_1 PG11/ETPU17_A/ETPU5_B/EMIOS0_17/RCH3_A/CAN3TX/SIN_1 PG12/ETPU18_A/ETPU6_B/EMIOS0_18/RCH3_B/SOUT_1 PG13/ETPU19_A/ETPU7_B/EMIOS0_19/RCH3_C/SCLK_1 PG14/ETPU20_A/ETPU8_B/EMIOS0_20/RCH9_A PG15/ETPU21_A/ETPU9_B/EMIOS0_21/RCH9_B H20 H19 H18 H17 J20 J19 J18 J17 K18 K17 L18 L17 M18 M17 M20 M19 PZ0/SD0_0/SAR0_0/SAR2_0/ETPU4_A/ETPU4_B/EMIOS0_16 PZ1/SD0_1/SAR0_1/SAR2_1/ETPU3_A/ETPU3_B/EMIOS0_17 PZ2/SD0_2/SAR0_2/SAR2_2/ETPU2_A/ETPU2_B/EMIOS0_18 PZ3/SD0_3/SAR0_3/SAR2_3/ETPU1_A/TCRCLK_A/ETPU1_B/TCRCLK_B/EMIOS0_19 PZ4/SD0_4/SAR0_4/SAR2_4/ETPU0_A/TCRCLK_A/ETPU0_B/TCRCLK_B/EMIOS0_20 PZ5/SD0_5/SAR0_5/SAR2_5/ETPU31_B/EMIOS0_21 PZ6/SD0_6/SAR0_6/SAR2_6/ETPU30_B/EMIOS0_22 PZ7/SD0_7/SAR0_7/SAR2_7/ETPU29_B/EMIOS0_23 PZ8/SD1_0/SAR0_8/SAR2_8/ETPU28_B/EMIOS1_8/SENT0_1 PZ9/SD1_1/SAR0_9/SAR2_9/ETPU27_B/EMIOS1_9/SENT1_1 PZ10/SD1_2/SAR0_10/SAR2_10/ETPU26_B/EMIOS1_10/SENT2_1 PZ11/SD1_3/SAR0_11/SAR2_11/ETPU25_B/EMIOS1_11 PZ12/SD1_4/SAR0_12/SAR2_12/ETPU24_B/EMIOS1_12 PZ13/SD1_5/SAR0_13/SAR2_13/ETPU23_B/EMIOS1_13 PZ14/SD1_6/SAR0_14/SAR2_14/ETPU22_B/EMIOS1_14 PZ15/SD1_7/SAR0_15/SAR2_15/ETPU21_B/EMIOS1_15 PTH[0..15] PTH0 PTH1 PTH2 PTH3 PTH4 PTH5 PTH6 PTH7 PTH8 PTH9 PTH10 PTH11 PTH12 PTH13 PTH14 PTH15 PTI0 PTI1 PTI2 PTI3 PTI4 PTI5 N20 N19 N18 N17 P20 P19 P18 P17 R20 R19 R18 T20 T19 T18 U20 V20 PY0/SD2_0/SAR0_16/SAR2_16/ETPU20_B/EMIOS0_8/SENT0_0 PY1/SD2_1/SAR0_17/SAR2_17/ETPU19_B/EMIOS0_9/SENT1_0 PY2/SD2_2/SAR0_18/SAR2_18/ETPU31_A/ETPU18_B/EMIOS0_10/SENT2_0 PY3/SD2_3/SAR0_19/SAR3_0/ETPU30_A/ETPU17_B PY4/SAR0_20/SAR1_0/SAR2_19/ETPU16_B/EMIOS0_11 PY5/SAR0_21/SAR1_1/SAR3_1/ETPU29_A/ETPU15_B PY6/SAR0_22/SAR1_2/SAR3_2/ETPU14_B/EMIOS0_12 PY7/SAR0_23/SAR1_3/SAR2_20/ETPU13_B/EMIOS0_13 PY8/SAR0_24/SAR1_4/SAR3_3/ETPU28_A/ETPU12_B PY9/SAR0_25/SAR1_5/SAR3_4/ETPU27_A/ETPU11_B/EMIOS0_14 PY10/SAR0_26/SAR1_6/SAR2_21/ETPU10_B/EMIOS0_15 PY11/SAR0_27/SAR1_7/SAR3_5/ETPU26_A/ETPU9_B PY12/SAR0_28/SAR1_8/SAR3_6/ETPU25_A/ETPU8_B PY13/SAR0_29/SAR1_9/SAR3_7/ETPU7_B/EMIOS0_16 PY14/SAR0_30/SAR1_10/SAR3_8/ETPU24_A/ETPU6_B PY15/SAR0_31/SAR1_11/SAR2_22/ETPU5_B/EMIOS0_17 PTG[1..15] B 8 Y9 W9 V9 U9 W10 V10 U10 Y11 V11 U11 Y12 W12 V12 U12 B9 C9 D9 C8 D8 D7 PTJ[0..15] PJ0/ETPU25_A/ETPU0_B/TCRCLK_B/ERROR1/EVTO_0 PJ1/ETPU26_A/ETPU1_B/TCRCLK_B/ERROR0/CLKOUT/EVTO_1 PJ2/ETPU2_B PJ3/ETPU27_A/ETPU3_B/EMIOS0_14/EVTI1 PJ4/ETPU28_A/ETPU4_B/EMIOS0_15/RCH0_C/NMI/EVTI_0 PJ5/ETPU29_A/ETPU5_B/EMIOS0_22/EVTI_0/RSTOUT PJ6/ETPU25_A/ETPU6_B PJ7/NRML_TRIG/ETPU30_A/ETPU7_B/EMIOS0_23/RCH2_B/IRQ0/EVTO_0 PJ8/NRML_TRIG/ETPU27_A/ETPU8_B/IRQ1 PJ9/INJ_TRIG30/ETPU28_A/ETPU9_B/IRQ2 PJ10/NRML_TRIG/ETPU29_A/ETPU10_B/IRQ3 PJ11/NRML_TRIG/ETPU31_A/ETPU11_B/EMIOS1_8/RCH5_B/CS1_0/IRQ4/ERROR0 PJ12/INJ_TRIG31/ETPU12_B/EMIOS1_9/CS5_0/IRQ5 PJ13/ETPU13_B/EMIOS1_10/CS4_0/IRQ6 PJ14/ETPU14_B/EMIOS1_11/SCLK_0/IRQ7/ERRORIN PJ15/ETPU15_B/EMIOS1_12 PTD[0..15] PTE0 7 PI0/ETPU5_A/ETPU26_B/EMIOS0_8/RCH1_C/CAN3RX/ERROR0 PI1/ETPU6_A/ETPU27_B/EMIOS0_9/RCH2_A/CAN3TX/ERROR1 PI2/ETPU7_A/ETPU28_B/EMIOS0_10/RCH2_B PI3/ETPU8_A/ETPU29_B/EMIOS0_11/RCH2_C PI4/ETPU9_A/ETPU30_B/EMIOS0_12/EMIOS1_22 PI5/ETPU10_A/ETPU31_B/EMIOS0_13/EMIOS1_23 PTC[0..13] C 7,8 PTI[0..5] PA0/ETPU24_A/CS0_M0/DSPI_M0_CS0/MSC0_CS0 PA1/ETPU23_A/LINM0TX/CS1_M0/SIN_M0/DSPI_M0_SIN/CS1/MSC0_CS1/SIPI_RXN PA2/ETPU22_A/LINM0RX/SIN_M0/CS3_M0/DSPI_M0_SIN/CS3/MSC0_RX/SIPI_RXP PA3/ETPU21_A/SCLK_M0/CS2_M0/DSPI_M0_SCLKN/MSC0_CLKN PA4/ETPU20_A/SCLK_M0/DSPI_M0_SCLKP/MSC0_CLKP/SIPI_CLK PA5/ETPU19_A/SOUT_M0/SIN_M0/DSPI_M0_SOUTN/MSC0_SOUTN/SIPI_TXN PA6/ETPU18_A/SOUT_M0/DSPI_M0_SOUTP/MSC0_SOUTP/SIPI_TXP PA7/ETPU17_A/SOUT_M1/DSPI_M1_SOUTN/MSC1_SOUTN PA8/ETPU16_A/SOUT_M1/SIN_M1/DSPI_M1_SOUTP/MSC1_SOUTP PA9/ETPU15_A/SCLK_M1/DSPI_M1_SCLKN/MSC1_CLKN PA10/ETPU14_A/SCLK_M1/CS2_M1/DSPI_M1_SCLKP/MSC1_CLKP PA11/ETPU13_A/LINM1RX/SIN_M1/CS3_M1/MSC1_RX PA12/ETPU12_A/LINM1TX/CS1_M1/SIN_M1/MSC1_CS1 PA13/ETPU11_A/CS0_M1/DSPI_M1_CS0/MSC1_CS0 PTB[0..1] PTD0 PTD1 PTD2 PTD3 PTD4 PTD5 PTD6 PTD7 PTD8 PTD9 PTD10 PTD11 PTD12 PTD13 PTD14 PTD15 7 1 PH0/ETPU22_A/ETPU10_B/EMIOS1_8/RCH4_B/CS2_1/ERROR0 PH1/ETPU23_A/ETPU11_B/EMIOS1_9/RCH9_C PH12/ETPU24_A/ETPU12_B/EMIOS1_10 PH3/ETPU25_A/ETPU13_B/EMIOS1_11/RCH4_C/CS3_1/ERROR1 PH4/ETPU26_A/ETPU14_B/EMIOS1_12 PH5/ETPU27_A/ETPU15_B/EMIOS1_13 PH6/ETPU28_A/ETPU16_B/EMIOS1_14 PH7/ETPU29_A/ETPU17_B/EMIOS1_15/RCH5_A/LIN3RX PH8/ETPU30_A/ETPU18_B/EMIOS1_16/LIN3TX PH9/ETPU31_A/ETPU19_B/EMIOS1_17 PH10/ETPU12_A/ETPU20_B/EMIOS1_18 PH11/ETPU0_A/TCRCLK_A/ETPU21_B/EMIOS1_19/RCH0_A/LINM0RX PH12/ETPU1_A/TCRCLK_A/ETPU22_B/EMIOS1_20/RCH0_B/LINM0TX PH13/ETPU2_A/ETPU23_B/EMIOS1_21/RCH0_C PH14/ETPU3_A/ETPU24_B/EMIOS1_22/RCH1_A/LINM1RX PH15/ETPU4_A/ETPU25_B/EMIOS1_23/RCH1_B/LINM1TX RESET PORST TCK TMS JCOMP EXTAL XTAL TESTMODE PTZ0 PTZ1 PTZ2 PTZ3 PTZ4 PTZ5 PTZ6 PTZ7 PTZ8 PTZ9 PTZ10 PTZ11 PTZ12 PTZ13 PTZ14 PTZ15 SD1_6 SD1_7 F3 G3 RESET_B PORST_B E2 E1 F2 TCK TMS JCOMP M2 TESTMODE 6,8 VDD_HV_IO_MAIN 1 D 7 2 U1B SPC5746RTK0MMT5 + 10483PT + OTB-252(484RS)-0.8-007 PTA[0..13] PTA0 PTA1 PTA2 PTA3 PTA4 PTA5 PTA6 PTA7 PTA8 PTA9 PTA10 PTA11 PTA12 PTA13 6 3 JP1 DNP 2 6,7 4 RESET_B PORST_B TCK 6 TMS 6 JCOMP 5,6,7 5,6 6 R22 0 A A ICAP Classification: Drawing Title: FCP: ___ FIUO: X PUBI: ___ X-MPC5746R-252DC Page Title: MCU I/O 5 4 3 2 Size C Document Number Date: Monday, May 20, 2013 Rev A SCH-27770, PDF: SPF-27770 Sheet 1 4 of 8 5 4 3 2 1 Clock Circuit Clock Source Configuration Jumpers and Headers Crystal D Oscillator SMA Shunt to terminate EXTAL with 49.9 ohm to GND Remove Remove Install Shunt to connect XTAL to GND Remove Install Install Shunt to connect EXTAL to the crystal Install Remove Remove Shunt to connect EXTAL to the OSC Remove Install Remove Shunt to connect EXTAL to the SMA connector Remove Remove Install D 3.3V_EXT 3.3V_MB_SR VDD_HV_IO_JTAG Header to disable the Oscillator Install Remove J12 Install 1 2 3 OSC_PWR Default: 1-2 (Use 3.3V SR on MB) C29 C20 0.1uF 16V HDR TH 1X3 0.1uF 16V R18 10.0K 1 EXTAL 2 3 2 OSC A GND B Y1 4 3 OSC_NB SN74LVC1T45 OUT 8MHz E/D 1 OSC_EN 2 1 Default: 1-2 (disable) 1 1 R17 49.9 J10 HDR 1X2 TH VCC EXTAL XTAL 1 6 GND EXTAL XTAL VCCA VCCB 2 4 4 DIR 4 U3 5 DNP JP4 R20 0 JP3 Y2 2 X1 DNP JP5 1 1 20MHz J9 2 X2 1 JP2 DNP C 3 2 EXT_CLK 1 4 C36 6.0PF DNP C32 6.0PF DNP CON_1_SMA 5 2 2 JP6 DNP 2 X3 C Reset Circuit B B A VDD_HV_IO_MAIN D2 RED C VDD_HV_IO_MAIN VDD_HV_IO_MAIN R10 1.0K VDD_HV_IO_MAIN RST-SW 1A PORST_LED PORST_B R11 1.0K R_PORST_LED C R9 4.70K RESET_B RESET_B 2A D3 4,6 J13 HDR 1X2 TH Default: 1-2 (enable) 2 1 J16 HDR 1X2 TH Default: 1-2 (enable) 1 2 R12 4.70K RST_LED 4,6,7 SW1 KSC221J A 1B 2B RED A A ICAP Classification: Drawing Title: FCP: ___ FIUO: X PUBI: ___ X-MPC5746R-252DC Page Title: Clock and Reset Circuit 5 4 3 2 Size C Document Number Date: Monday, May 20, 2013 Rev A SCH-27770, PDF: SPF-27770 Sheet 1 5 of 8 5 4 3 2 1 JTAG INTERFACE C3 47PF DNP C1 47PF VDD_HV_IO_JTAG DNP 4 VDD_HV_IO_JTAG JTAG Connector PTB[0..1] D 4 4,5,7 RESET_B 4,8 PTJ4 PTJ7 RESET_B EVTO0 1 3 5 7 9 11 13 2 4 6 8 10 12 14 PORST_B TMS JCOMP CON_2X7 PTJ[0..15] 4 4 4,5 4,7 TCK TDI TDO TCK EVTI0 JCOMP TMS PORST_B D R7 10.0K J7 PTB1 PTB0 R8 10.0K JCOMP TMS PORST_B MSC1 CONNECTOR PTA[0..13] PTA12 PTA11 PTA13 C C J2 PTA9 PTA10 MSC1_CLKN MSC1_CLKP PTA7 PTA8 MSC1_SOUTN MSC1_SOUTP 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 MSC1_CS0 MSC1_RX Note: This resistor is near the MCU - not near the SIPI connector. R_PTA[7..13] MSC1_CS1 SKT_2X10 R14 DNP 0 R_PTA12 R15 DNP 0 R_PTA11 R16 DNP 0 R_PTA13 R5 R4 DNP DNP 0 0 R_PTA8 R_PTA7 R3 R2 DNP DNP 0 0 R_PTA10 R_PTA9 8 SIPI INTERFACE TP1 R1 0 PTA4 SIPI_CLK SIPI_CLK_R B B TP5 TP6 TP7 TP8 J1 PTA6 PTA5 SIPI_TXP SIPI_TXN PTA1 PTA2 SIPI_RXN SIPI_RXP 1 3 5 7 9 11 2 4 6 8 10 12 ERF8-005-05.0-L-DV-L-TR ANALOG FILTERS 4,8 PTY[0..15] R23 PTY0 PTY0_FIL C62 100 PF 50VDC A 4,8 20K SD2_0 PTY1 SD2_1 PTZ14 SD1_6 R24 J15 1 2 C61 1000PF 50V 20K PTY1_FIL DIFF PAIR HDR 1X2 TH PTZ[0..15] A R19 J11 PTZ14_FIL R21 PTZ15 10.0K SD1_7 1 3 10.0K 2 4 SINGLE ENDED PTZ15_FIL HDR_2X2 C39 0.01UF 50V C48 0.01UF 50V C38 0.01UF 50V C47 0.01UF 50V ICAP Classification: Drawing Title: FCP: ___ FIUO: X PUBI: ___ X-MPC5746R-252DC VSSA_ADC Page Title: VSSA_ADC 5 4 3 VSSA_ADC VSSA_ADC VSSA_ADC JTAG, MSC1, & SIPI / ANALOG FILT 2 Size C Document Number Date: Monday, May 20, 2013 Rev A SCH-27770, PDF: SPF-27770 Sheet 1 6 of 8 5 4,6 PTA[0..13] 4 PTC[0..13] 4,8 PTD[0..15] 4 3 2 1 PTA[0..13] PTC[0..13] PTD[0..15] PTE0 4,8 PTF[0..13] 4 PTG[1..15] 4 PTI[0..5] 4 PTK[0..14] 4 PTW[0..3] D 4 PTF[0..13] PTG[1..15] PTI[0..5] PTK[0..14] D PTW[0..3] 3.3V_MB_SR 3.3V_MB_SR 1.25V_MB_SR 5V_MB_LR 1.25V_MB_SR J25B 3.3V_MB_SR 1.25V_MB_SR 3.3V_MB_SR J25A PTA0 PTG11 C CAN3TX PTD13 FEC_MDIO PTF13 CAN0RX PTC12 PTC7 PTC2 FEC_RXCLK FEC_RXD0 FEC_TXEN PTE0 PTG5 LIN1RX PTC5 PTG14 FEC_TXD1 PTG4 PTG10 PTG12 PTG1 CAN2RX PTI0 PTI2 PTI4 B PTC1 FEC_TXCLK 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 PTC13 FEC_RXDV PTC4 FEC_TXD2 RESET_B PTA3 CAN3RX PTG9 FEC_REF_CLK PTC0 FEC_MDC PTD8 CAN0TX PTF12 FEC_RXD1 FEC_TXD0 PTC8 PTC6 PTK0 PTK2 PTK4 CAN2TX LIN1TX PTG2 PTG6 PTK8 PTK10 PTK12 PTK14 PTG15 PTG3 PTG7 PTG13 PTI1 PTI3 PTI5 PTW0 PTW2 FEC_RXD3 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 205 207 209 211 213 215 217 219 221 223 225 227 229 231 233 235 237 239 SH1 SH2 SH3 SH4 SH5 SH6 SH7 SH8 PTC10 CON 2X120 SKT 4,5,6 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 205 207 209 211 213 215 217 219 221 223 225 227 229 231 233 235 237 239 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 SH1 SH2 SH3 SH4 SH5 SH6 SH7 SH8 SH9 SH10 SH11 SH12 SH13 SH14 SH15 SH16 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 FEC_RXD2 FEC_RXER FEC_TXD3 PTC9 PTC11 PTC3 C PTK1 PTK5 PTK7 PTK9 PTK11 PTK13 PTW1 PTW3 B SH9 SH10 SH11 SH12 SH13 SH14 SH15 SH16 CON 2X120 SKT RESET_B 3.3V_MB_SR VDD_HV_IO_MB 5V_MB_SR J21 5V_MB_SR VDD_HV_IO_MB 3.3V_MB_SR 1 2 3 Default: 1-2 (Use 5V for MB transceivers) HDR TH 1X3 A A ICAP Classification: Drawing Title: FCP: ___ FIUO: X PUBI: ___ X-MPC5746R-252DC Page Title: MB Connections 1 5 4 3 2 Size C Document Number Date: Monday, May 20, 2013 Rev A SCH-27770, PDF: SPF-27770 Sheet 1 7 of 8 5 4,7 PTD[0..15] 4,7 PTF[0..13] 4 PTH[0..15] 4,6 PTJ[0..15] 4 PTX[0..15] 4,6 PTY[0..15] 4 3 4,6 1 PTD[0..15] PTF[0..13] PTH[0..15] PTJ[0..15] PTX[0..15] D 6 2 D PTY[0..15] PTZ[0..15] PTZ[0..15] R_PTA[7..13] R_PTA[7..13] 3.3V_MB_SR 3.3V_MB_SR 1.25V_MB_SR 3.3V_MB_SR 1.25V_MB_SR 3.3V_MB_SR 5V_MB_SR 5V_MB_SR 1.25V_MB_SR 1.25V_MB_SR 5V_MB_LR J24A 120 118 116 114 112 110 108 106 104 102 100 98 96 94 92 90 88 86 84 82 80 78 76 74 72 70 68 66 64 62 60 58 56 54 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 PTZ0 PTZ2 PTZ4 PTZ6 C R_PTA8 R_PTA10 R_PTA12 PTY2 PTY4 PTY6 PTY8 PTY10 PTY12 PTY14 B PTX0 PTX2 PTX4 PTX6 PTX8 PTX10 PTX12 PTX14 J24B 120 118 116 114 112 110 108 106 104 102 100 98 96 94 92 90 88 86 84 82 80 78 76 74 72 70 68 66 64 62 60 58 56 54 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 119 117 115 113 111 109 107 105 103 101 99 97 95 93 91 89 87 85 83 81 79 77 75 73 71 69 67 65 63 61 59 57 55 53 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 119 117 115 113 111 109 107 105 103 101 99 97 95 93 91 89 87 85 83 81 79 77 75 73 71 69 67 65 63 61 59 57 55 53 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 SH16 SH15 SH14 SH13 SH12 SH11 SH10 SH9 PTZ1 PTZ3 PTZ5 PTZ7 PTZ8 PTZ10 PTZ12 R_PTA7 R_PTA9 R_PTA11 R_PTA13 PTF0 LIN2TX PTF2 PTF4 PTF6 PTF8 PTF10 PTY3 PTY5 PTY7 PTY9 PTY11 PTY13 PTY15 PTH0 PTH2 PTH4 PTH6 PTH8 PTH10 PTH12 PTH14 PTJ0 PTJ2 PTX1 PTX3 PTX5 PTX7 PTX9 PTX11 PTX13 PTX15 PTJ6 PTJ8 PTJ10 PTJ12 PTJ14 PTD0 PTD2 PTD4 PTD6 VDD_HV_IO_MB CON 2X120 SKT PTD10 PTD12 PTD14 VDD_HV_IO_MB 240 238 236 234 232 230 228 226 224 222 220 218 216 214 212 210 208 206 204 202 200 198 196 194 192 190 188 186 184 182 180 178 176 174 172 170 168 166 164 162 160 158 156 154 152 150 148 146 144 142 140 138 136 134 132 130 128 126 124 122 SH16 SH15 SH14 SH13 SH12 SH11 SH10 SH9 SH8 SH7 SH6 SH5 SH4 SH3 SH2 SH1 240 238 236 234 232 230 228 226 224 222 220 218 216 214 212 210 208 206 204 202 200 198 196 194 192 190 188 186 184 182 180 178 176 174 172 170 168 166 164 162 160 158 156 154 152 150 148 146 144 142 140 138 136 134 132 130 128 126 124 122 239 237 235 233 231 229 227 225 223 221 219 217 215 213 211 209 207 205 203 201 199 197 195 193 191 189 187 185 183 181 179 177 175 173 171 169 167 165 163 161 159 157 155 153 151 149 147 145 143 141 139 137 135 133 131 129 127 125 123 121 SH8 SH7 SH6 SH5 SH4 SH3 SH2 SH1 239 237 235 233 231 229 227 225 223 221 219 217 215 213 211 209 207 205 203 201 199 197 195 193 191 189 187 185 183 181 179 177 175 173 171 169 167 165 163 161 159 157 155 153 151 149 147 145 143 141 139 137 135 133 131 129 127 125 123 121 C PTZ9 PTZ11 PTZ13 LIN2RX PTF1 PTF3 PTF5 PTF7 PTF9 PTF11 PTH1 PTH3 PTH5 PTH7 PTH9 PTH11 PTH13 PTH15 B PTJ1 PTJ3 PTJ5 PTJ9 PTJ11 PTJ13 PTJ15 PTD1 PTD3 PTD5 PTD7 PTD9 PTD11 PTD15 CON 2X120 SKT A A ICAP Classification: Drawing Title: FCP: ___ FIUO: X PUBI: ___ X-MPC5746R-252DC Page Title: MB Connections 2 5 4 3 2 Size C Document Number Date: Monday, May 20, 2013 Rev A SCH-27770, PDF: SPF-27770 Sheet 1 8 of 8