ColdFire® MCF5445x Internal Peripheral Space Memory Map MCF5445x Family Configurations Base Address Slot # Internal Address[31:28] Address Range Destination Slave Slave Memory Size 0xFC00_0000 0 SCM (MPR and PACRs) 00xx 0x0000_0000–0x3FFF_FFFF FlexBus 1024 MB 0xFC00_4000 1 Cross-Bar Switch 01xx 0x4000_0000–0x7FFF_FFFF SDRAM Controller 1024 MB 0xFC00_8000 2 FlexBus 1000 0x8000_0000–0x8FFF_FFFF Internal SRAM 256 MB 0xFC03_0000 12 FEC0 1001 0x9000_0000–0x9FFF_FFFF ATA Controller 256 MB 0xFC03_4000 13 FEC1 101x 0xA000_0000–0xBFFF_FFFF PCI Controller 512 MB 0xFC03_C000 15 Real-Time Clock 110x 0xC000_0000–0xDFFF_FFFF FlexBus 512 MB 16 SCM (CWT and Core Fault Registers) 1110 0xE000_0000–0xEFFF_FFFF Reserved 256 MB 1111 0xF000_0000–0xFFFF_FFFF Internal Peripheral Space 256 MB 0xFC04_0000 Peripheral System Memory Map 0xFC04_4000 17 eDMA Controller 0xFC04_8000 18 Interrupt Controller 0 0xFC04_C000 19 Interrupt Controller 1 0xFC05_4000 21 Interrupt Controller IACK 0xFC05_8000 22 IC 0xFC05_C000 23 DSPI 0xFC06_0000 24 UART0 0xFC06_4000 25 UART1 0xFC06_8000 26 2 UART2 Module V4 ColdFire Core with EMAC (Enhanced Multiply-Accumulate Unit) MCF54450 MCF54451 MCF54452 MCF54453 MCF54454 MCF54455 X X X X X X Core (System) Clock up to 240 MHz up to 266 MHz Peripheral Bus Clock (Core Clock ÷ 2) up to 120 MHz up to 133 MHz External Bus Clock (Core Clock ÷ 4) up to 60 MHz up to 66 MHz Performance (Dhrystone/2.1 MIPS) up to 370 MIPS up to 410 MIPS Independent Data/Instruction Cache 16 KB each Static RAM (SRAM) 32 KB PCI Controller - - X X X X Cryptography Acceleration Unit (CAU) - X - X - X ATA Controller - - - - X X DD R SDRAM Controller X X X X X X FlexBus External Interface X X X X X X USB 2.0 On-the-Go X X X X X X UTMI+ Low Pin Interface (ULPI) X X X X X X Synchronous Serial Interface (SSI) X X X X X X Fast Ethernet Controller (FEC) 1 1 2 2 2 2 3 3 3 3 3 3 X X X X X X MCF54452, MCF54453, MCF54455, and MCF54455 Pinout (360 TEPBGA) 0xFC07_0000 28 DMA Timer 0 UARTs 0xFC07_4000 29 DMA Timer 1 I2C 0xFC07_8000 30 DMA Timer 2 DSPI X X X X X X 0xFC07_C000 31 DMA Timer 3 Real-Time Clock X X X X X X 0xFC08_0000 32 PIT 0 32-bit DMA Timers 4 4 4 4 4 4 X X X X X X 0xFC08_4000 33 PIT 1 Watchdog Timer (WDT) 0xFC08_8000 34 PIT 2 Periodic Interrupt Timers (PIT) 4 4 4 4 4 4 Edge Port Module (EPORT) X X X X X X 0xFC08_C000 35 PIT 3 0xFC09_4000 37 Edge Port 0xFC0A_0000 40 CCM, Reset Controller, Power Management 0xFC0A_4000 41 GPIO Module 0xFC0A_8000 42 PCI Controller Package Interrupt Controllers (INTC) 2 2 2 2 2 2 16-channel Direct Memory Access (DMA) X X X X X X General Purpose I/O Module (GPIO) X X X X X X JTAG—IEEE® 1149.1 Test Access Port X X X X X X 0xFC0A_C000 43 PCI Arbiter 0xFC0B_0000 44 USB On-the-Go 0xFC0B_4000 45 RNG 0xFC0B_8000 46 SDRAM Controller Switch Default Setting SW1-1 ON SW1-2 OFF 0xFC0B_C000 47 SSI 0xFC0C_0000 48 ATA Controller 0xFC0C_4000 49 PLL Defualt Jumper Locations 256 MAPBGA Default Switch Settings MCF54450 and MCF54451 Pinout (256 MAPBGA) SW1-3 ON SW1-4 OFF SW1-5 OFF SW1-6 OFF Jumper Default Location SW1-7 OFF JP903 2-3 SW1-8 OFF JP904 1-2 SW3-1 OFF JP909 1-2 SW3-2 ON JP910 1-2 SW3-3 OFF JP911 1-2 SW3-4 ON JP912 1-2 SW3-5 OFF JP918 1-2 SW3-6 ON JP907 ON SW3-7 ON JP908 ON SW3-8 ON SW5-1 OFF SW5-2 OFF SW5-3 OFF SW5-4 OFF V4 ColdFire® Core 360 TEPBGA Quick Start Guide STEP 1 Plug in power cable ColdFire® M5445EVB Board Connection/Setup The M54455EVB comes pre-programmed with U-Boot and Linux preconfigured to run a demo application. This section describes how to setup the evaluation board to access the bootloader how to start Linux. The default communication interface with the M54455EVB is a simple serial port console. A terminal emulator on a host PC and the supplied serial cable is required to interact with the serial port. STEP 3 STEP Open and configure HyperTerminal as follows 4 Connect the Ethernet cable STEP 6 Plug one end of the provided Ethernet cable into a network or host PC with a DHCP server running. Plug the other end of the cable into the FEC0 interface of the M54455EVB. To Boot Linux, issue the following U-Boot command. Type command –> bootm 0 Start u Programs u Accessories u Communications u HyperTerminal STEP 2 Connect the DB9 connector to the board STEP 5 If HyperTerminal shows “Auto-detect” then it did not configure correctly. Select the phone icon to disconnect, then go to files u properties in the HyperTerminal window, click on the configure button which will open a panel like the “COM1 Properties” above. Verify the configuration is as pictured above, then select OK. Then just hit enter in the HyperTerminal Window. This is what the status bar under the HyperTerminal window should look like. Parameter Setting Baud rate 115200 bps Data bits 8 Parity None Stop bits 1 Flow control None Press power button on the front of the computer case, verify splash screen on HyperTerminal The U-Boot banner (example below) should appear in the terminal window. STEP 7 The M54455EVB will serve up a Web page with more information on the available demos The demo application will print out a banner message to the serial terminal including the IP address that it obtained from the DHCP server. Launch a Web client (e.g. Firefox or Internet Explorer) and copy this IP address into the Web browser. Freescale and the Freescale logo are trademarks or registered trademarks of Freescale Semiconductor, Inc. in the U.S. and other countries. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009 Doc Number: MCF5445XQSG / REV 0 Agile Number: 926-76714 / REV B freescale.com/coldfire