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MCF5204UMAD/AD
Consumer Systems
Group
Communications
and Advanced
Consumer Technologies Group
MCF5204
Addendum to
MCF5204
User Manual
Freescale Semiconductor, Inc...
July 21, 1998
This addendum to the initial release of the MCF5204UM/AD UserÕs Manual provides corrections to the original
text, plus additional information not included in the original. This document and other information on this product
is maintained on the World Wide Web at http://sps.motorola.com/coldfire
Motorola Test Mode - MTMOD[2:0]
These asynchronous signals determine the mode of operation for the MCF5204. The ASCII pin out
on Page 13-5 incorrectly shows MTMOD2, MTMOD1 and MTMOD0 pins; these should be labelled
PST3, PST2 and PST1, respectively. Any references throughout the manual to MTMOD are to
MTMOD3.
Power Consumption - Addition to Electrical SpeciÞcations
The power consumption Þgures stated are for 5.0 V and 50 pf loads on all pins, room temperature.
The code which was used was Dhrystone 2.1. The data is as follows:
Table 1: MCF5204 Power Consumption
16MHZ 25MHz 33MHz
UNITS
320
mW
475
625
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
SEMICONDUCTOR PRODUCT INFORMATION
Ó 1998 Motorola, Inc. All Rights Reserved.
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Revision 0.4
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Instruction Set Architecture
The Instruction Set Architecture tables on pages 1-9 through 1-14 should be replaced with the following :
Notational Conventions
OPCODE WILDCARDS
cc
Logical Condition (example: NE for not equal)
REGISTER OPERANDS
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An
Ay,Ax
Dn
Dy,Dx
Rn
Ry,Rx
Rw
Rc
Any Address Register n (example: A3 is address register 3)
Source and destination address registers, respectively
Any Data Register n (example: D5 is data register 5)
Source and destination data registers, respectively
Any Address or Data Register
Any source and destination registers, respectively
Any second destination register
Any Control Register (example VBR is the vector base register)
REGISTER/PORT NAMES
ACC
DDATA
CCR
MACSR
MASK
PC
PST
SR
MAC Accumulator
Debug Data Port
Condition Code Register (lower byte of status register)
MAC Status Register
Mask Register
Program Counter
Processor Status Port
Status Register
MISCELLANEOUS OPERANDS
#<data>
<ea>
<ea>y,<ea>x
<label>
<list>
<size>
Immediate data following the instruction word(s)
Effective Address
Source and Destination Effective Addresses, respectively
Assembly Program Label
List of registers (example: D3ÐD0)
Operand data size: Byte (B), Word (W), Longword (L)
+
Ð
x
Arithmetic addition or postincrement indicator
Arithmetic subtraction or predecrement indicator
Arithmetic multiplication
OPERATIONS
2
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MOTOROLA
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Notational Conventions (Continued)
/
~
&
|
~
<<
>>
®
¨
sign-extended
If <condition>
then <operations>
else <operations>
Arithmetic division
Invert; operand is logically complemented
Logical AND
Logical OR
Logical exclusive OR
Shift left (example: D0 << 3 is shift D0 left 3 bits)
Shift right (example: D0 >> 3 is shift D0 right 3 bits)
Source operand is moved to destination operand
Two operands are exchanged
All bits of the upper portion are made equal to the high-order bit of the lower portion
Test the condition. If true, the operations after ÔthenÕ are performed. If the condition is false and the optional ÔelseÕ clause
is present, the operations after ÔelseÕ are performed. If the condition is false and else is omitted, the instruction performs no
operation. Refer to the Bcc instruction description as an example.
SUBFIELDS AND QUALIFIERS
{}
()
dn
Optional Operation
Identifies an indirect address
Displacement Value, n-Bits Wide (example: d16 is a 16-bit displacement)
Address
Bit
LSB
LSW
MSB
MSW
Calculated Effective Address (pointer)
Bit Selection (example: Bit 3 of D0)
Least Significant Bit (example: MSB of D0)
Least Significant Word
Most Significant Bit
Most Significant Word
CONDITION CODE REGISTER BIT NAMES
P
C
N
V
X
Z
Branch Prediction Bit in CCR
Carry Bit in CCR
Negative Bit in CCR
Overflow Bit in CCR
Extend Bit in CCR
Zero Bit in CCR
Instruction Set Summary
INSTRUCTION
OPERAND SYNTAX
OPERAND SIZE
OPERATION
ADD
Dy,<ea>x
<ea>y,Dx
<ea>y,Ax
#<data>,Dx
#<data>,<ea>x
Dy,Dx
Dy,<ea>x
<ea>y,Dx
#<data>,Dx
Dx,Dy
#<data>,Dx
Dx,Dy
<data>,Dx
<label>
32
32
Source + Destination ® Destination
32
32
32
32
32
32
Source + Destination ® Destination
Immediate Data + Destination ® Destination
Immediate Data + Destination ® Destination
Source + Destination + X ® Destination
Source & Destination ® Destination
32
32
32
32
32
8,16
Immediate Data & Destination ® Destination
X/C ¬ (Dy << Dx) ¬ 0
X/C ¬ (Dy << #<data>) ¬ 0
ADDA
ADDI
ADDQ
ADDX
AND
ANDI
ASL
ASR
Bcc
MOTOROLA
MSB ® (Dy >> Dx) ® X/C
MSB ® (Dy >> #<data>) ® X/C
If Condition True, Then PC + dn ® PC
MCF5204 USERÕS MANUAL ADDENDUM
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Instruction Set Summary (Continued)
INSTRUCTION
OPERAND SYNTAX
OPERAND SIZE
OPERATION
BCHG
Dy,<ea>x
#<data>,<ea>x
8,32
8,32
BCLR
Dy,<ea>x
#<data>,<ea>x
8,32
8,32
BRA
<label>
8,16
~(<Bit Number> of Destination) ® Z,
Bit of Destination
~(<Bit Number> of Destination) ® Z;
0 ® Bit of Destination
PC + dn ® PC
BSET
Dy,<ea>x
#<data>,<ea>x
8,32
8,32
BSR
<label>
8,16
BTST
CLR
CMPI
CMP
CMPA
CPUSH
DIVS
Dy,<ea>x
#<data>,<ea>x
<ea>x
#<data>,Dx
<ea>y,Dx
<ea>y,Ax
(An)
<ea>y,Dx
8,32
8,32
8,16,32
32
32
32
32
16
32
DIVU
<ea>y,Dx
16
EOR
EORI
EXT
Dy,<ea>x
#<data>,Dx
Dx
Dx
EXTB
Dx
HALT
none
JMP
<ea>
JSR
<ea>
LEA
<ea>y,Ax
LINK
Ax,#<data>
LSL
Dx,Dy
#<data>,Dx
LSR
Dx,Dy
#<data>,Dx
MAC
Ry,Rx <shift>
Ry,Rx<shift>,<ea>y,Rw
MACL
Ry,Rx<shift>
Ry,Rx,<shift>,<ea>y,Rw
MOVE
<ea>y,<ea>x
MOVE from ACC
ACC,Rx
MOVE from CCR
Dx
MOVE from MACSR
MACSR,Rx
MACSR,CCR
MOVE from MASK
MASK,Rx
MOVE from SR
Dx
MOVE to ACC
Ry,ACC
<#<data>,ACC
MOVE to CCR
Dy,CCR
#<data>,CCR
4
32
32
8 ® 16
16 ® 32
8 ® 32
none
none
32
32
16
32
32
32
32
16 ´ 16 + 32 ® 32
32 ® 32
32 ´ 32 + 32 ® 32
32 ® 32
8,16,32
32
16
32
8
32
16
32
32
8
~(<Bit Number> of Destination) ® Z;
1® Bit of Destination
SP Ð 4 ® SP; next sequential PC® (SP); PC + dn ® PC
~(<Bit Number> of Destination) ® Z
0 ® Destination
Destination Ð Immediate Data
Destination Ð Source
Destination - Source
Push and Invalidate Cache Line
Dx / <ea>y ® Dx {16-bit Remainder; 16-bit Quotient}
Dx / <ea>y ® Dx {32-bit Quotient}
Signed operation
Dx / <ea>y ® Dx {16-bit Remainder; 16-bit Quotient}
Dx / <ea>y ® Dx {32-bit Quotient}
Unsigned operation
Source ~ Destination ® Destination
Immediate Data ~ Destination ® Destination
Sign-Extended Destination ® Destination
Sign-Extended Destination ® Destination
Enter Halted State
Address of <ea> ® PC
SPÐ 4 ® SP; next sequential PC ® (SP); <ea> ® PC
<ea> ® Ax
SP Ð 4 ® SP; Ax ® (SP); SP ® Ax; SP + d16 ® SP
X/C ¬ (Dy << Dx) ¬ 0
X/C ¬ (Dx << #<data>) ¬ 0
0 ® (Dy >> Dx) ® X/C
0 ® (Dx >> #<data>) ® X/C
ACC + (Ry ´ Rx){<< 1 | >> 1} ® ACC
ACC + (Ry ´ Rx){<< 1 | >> 1} ® ACC; (<ea>y{&MASK}) ® Rw
ACC + (Ry ´ Rx){<< 1 | >> 1} ® ACC
ACC + (Ry ´ Rx){<< 1 | >> 1} ® ACC; (<ea>y{&MASK}) ® Rw
<ea>y ® <ea>x
ACC ® Rx
CCR ® Dx
MACSR ® Rx
MACSR ®CCR
MASK ® Rx
SR ® Dx
Ry ® ACC
#<data> ® ACC
Dy ® CCR
#<data> ® CCR
MCF5204 USERÕS MANUAL ADDENDUM
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MOTOROLA
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Instruction Set Summary (Continued)
INSTRUCTION
OPERAND SYNTAX
OPERAND SIZE
OPERATION
MOVE to MACSR
32
Ry ® MACSR
#<data> ® MACSR
Ry ® MASK
#<data> ® MASK
Source ® SR
MULS
Ry,MACSR
#<data>,MACSR
Ry,MASK
#<data>,MASK
Dy,SR
#<data>,SR
<ea>y,Ax
Ry,Rc
list,<ea>x
<ea>y,list
#<data>,Dx
Ry,Rx<shift>
Ry,Rx<shift>,<ea>y,Rw
Ry,Rx<shift>
Ry,Rx<shift>,<ea>y,Rw
<ea>y,Dx
MULU
<ea>y,Dx
NEG
NEGX
NOP
NOT
OR
ORI
PEA
PULSE
REMS
<ea>x
<ea>x
none
<ea>
Dy,<ea>x
<ea>y,Dx
#<data>,Dx
<ea>
none
<ea>y,Dx:Dw
REMU
<ea>y,Dx:Dw
32
RTE
RTS
Scc
none
none
Dx
none
none
8
STOP
SUB
#<data>
Dy,<ea>x
<ea>y,Dx
<ea>y,Ax
#<data>,Dx
#<data>,<ea>x
Dy,Dx
Dn
none
16
32
32
32
32
32
32
16
none
TRAPF
none
#<data>
none
16
32
TST
UNLK
<ea>y
Ax
8,16,32
32
MOVE to MASK
MOVE to SR
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MOVEA
MOVEC
MOVEM
MOVEQ
MSAC
MSACL
SUBA
SUBI
SUBQ
SUBX
SWAP
TRAP
MOTOROLA
32
32
16
16,32 ® 32
32
32
32
8 ® 32
32 - 16 ´ 16 ® 32
32 ® 32
32 - 32 ´ 32 ® 32
32 ® 32
16 x 16 ® 32
32 x 32 ® 32
16 x 16 ® 32
32 x 32 ® 32
32
32
none
32
32
32
32
none
32
Source ® Destination
Ry ® Rc
Listed Registers ® Destination
Source ® Listed Registers
Sign-extended Immediate Data® Destination
ACC - (Ry ´ Rx){<< 1 | >> 1} ® ACC
ACC - (Ry ´ Rx){<< 1 | >> 1} ® ACC, (<ea>y{&MASK}) ® Rw
ACC - (Rw ´ Rx){<< 1 | >> 1} ® ACC
ACC - (Rw ´ Rx){<< 1 | >> 1} ® ACC; (<ea>y{&MASK}) ® Rw
Source ´ Destination ® Destination
Signed operation
Source ´ Destination ® Destination
Unsigned operation
0 Ð Destination ® Destination
0 Ð DestinationÐ X ® Destination
PC + 2 ® PC; Synchronize Pipelines
~ Destination ® Destination
Source | Destination ® Destination
Immediate Data | Destination ® Destination
SP Ð 4 ® SP; Address of <ea> ® (SP)
Set PST= $4
Dx/<ea>y ® Dw {32-bit Remainder}
Signed operation
Dx/<ea>y ® Dw {32-bit Remainder}
Unsigned operation
(SP+2) ® SR; SP+4 ® SP; (SP) ® PC; SP + FormatField ® SP
(SP) ® PC; SP + 4 ® SP
If Condition True, Then 1's ® Destination;
Else 0's ® Destination
Immediate Data ® SR; Enter Stopped State
Destination - Source® Destination
Destination - Source® Destination
Destination Ð Immediate Data ® Destination
Destination - Immediate data ® Destination
Destination Ð Source Ð X ® Destination
MSW of Dn ¨ LSW of Dn
SP Ð 4 ® SP;PC ® (SP);
SP Ð 2 ® SP;SR ® (SP);
SP Ð 2 ® SP; Format ® (SP);
Vector Address ® PC
PC + 2 ® PC
PC + 4 ® PC
PC + 6 ® PC
Set Condition Codes
Ax ®SP; (SP) ® Ax; SP + 4 ® SP
MCF5204 USERÕS MANUAL ADDENDUM
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Instruction Set Summary (Continued)
OPERAND SYNTAX
OPERAND SIZE
OPERATION
WDDATA
WDEBUG
<ea>y
<ea>y
8,16,32
2 x 32
<ea>y ®DDATA port
<ea>y ® Debug Module
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INSTRUCTION
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different
applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not
convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the
Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended
or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all
claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with
such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
Literature Distribution Centers:
USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912, Arizona 85036.
JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141 Japan.
ASIA-PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate,
Tai Po, N.T., Hong Kong.
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Freescale Semiconductor, Inc.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different
applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not
convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the
Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended
or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all
claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with
such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
Literature Distribution Centers:
USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912, Arizona 85036.
JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141 Japan.
ASIA-PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate,
Tai Po, N.T., Hong Kong.
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