MSC815x and MSC825x StarCore DSPs with QUICC Engine Ethernet Interface

June 21, 2010
MSC8156 Ethernet Interface
QUICC Engine Ethernet Programming
Andrew Temple
NMG DSP Applications
TM
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Agenda
►Introduction
►Session
Objectives
►MSC8156 Overview
►QUICC Engine Overview
►QUICC Engine Ethernet Programming:
General Setup
• Parameter RAMs
• Ethernet Filtering
•
ƒ
Class Example
►Session
Summary
►References
►Close
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
2
Session Introduction
► Ethernet
communication is a key point for networking
based devices such as the MSC815x series devices.
► To
maximize application performance, a programmer
must understand how to set up
the Ethernet for efficiency.
► In
some cases, engineers do not want to use the
available OS solution (SmartDSP) for their Ethernet
software suite. In order to assist in debug, some
knowledge of the Ethernet programming model
is a must!
► Presenter:
QUICC Engine lead for DSP Applications
Team
►1
Hour for this session
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
3
Session Objectives
►After
completing this session, you will
be able to:
Understand how to set up an Ethernet
Programming Model
• Program the QUICC Engine to
manage filtering of Ethernet packets
based on L2, L3, L4, etc parameters
•
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
4
MSC8156 Overview
64-bit @
DDR800
64-bit @
DDR800
MAPLE-B
800MHz-1GHz
StarCore SC3850
Subsystem
800MHz-1GHz
StarCore SC3850
Subsystem
800MHz-1GHz
StarCore SC3850
Subsystem
800MHz-1GHz
StarCore SC3850
Subsystem
800MHz-1GHz
StarCore SC3850
Subsystem
800MHz-1GHz
StarCore SC3850
Subsystem
SC3850
DSP Core
SC3850
DSP Core
SC3850
DSP Core
SC3850
DSP Core
SC3850
DSP Core
SC3850
DSP Core
TVPE
DDR 2/3
DDR 2/3
Controller
Controller
<8
GB/s
<8
GB/s
M3
Memory
FFT
PE
DFT
PE
RISC
RISC
1056 KB
4
GB/s
8
GB/s
MMU
MMU
MMU
MMU
MMU
MMU
32 KB
32 KB
I-Cache D-Cache
32 KB
32 KB
I-Cache D-Cache
32 KB
32 KB
I-Cache D-Cache
32 KB
32 KB
I-Cache D-Cache
32 KB
32 KB
I-Cache D-Cache
32 KB
32 KB
I-Cache D-Cache
512 KB
L2/M2
512 KB
L2/M2
512 KB
L2/M2
512 KB
L2/M2
512 KB
L2/M2
512 KB
L2/M2
8
GB/s
8
GB/s
4
GB/s
8
GB/s
4
GB/s
8
GB/s
4
GB/s
8
GB/s
4
GB/s
8
GB/s
8
GB/s
4
GB/s
4
GB/s
Non-blocking Switching Matrix 128bit @ 500MHz
8 GB/s
8 GB/s
Security
RISC
Engine
JTAG/
1Gbps
Ethernet
SPI
1Gbps
Ethernet
SAP
1 Gbps
1 Gbps
Virtual
OCN8
RISC
SRIO
1x/4x
SRIO
1x/4x
LYNX
1x/4x
3.125
Gb
PCI-EX
TDM
1024
Ch.
I2C
UART
ROM
High Speed Serial Interfaces
(HSSI)
QUICCEngineTM
Boot
16 ch.
DMA
Interrupts &
Hardware
Semaphores
LYNX
1x/4x
3.125
Gb
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
5
QUICC Engine Overview
► Dual
32-bit RISC Processors
► ROM – stores the RISC’s main ucode
► IRAM – stores uploaded ucode
► MURAM –
48 Kbytes of multi-user data RAM
• Stores parameter ram, VFIFOs, user data
•
►
32 bit
RISC0
SDMA
32 bit
RISC1
ROM0 IRAM1
192KB 24KB
MURAM
48KB
ROM1 IRAM1
192KB 24KB
UCC:
Two Ethernet controllers
• Physical interfaces:
•
ƒ
ƒ
•
•
•
•
•
SPI
RGMII
SGMII
UCC1
UCC3
xMII
xMII
MAC-to-MAC and MAC-to-PHY Connectivity
Full and half-duplex support.
IEEE 802.3 full duplex flow control
Ethernet Statistics Gathering
Internal loop-back
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
6
General Guidelines for QUICC Engine Programming of MSC815x
► Recommended
to start with/use SmartDSP OS
Simplifies Ethernet programming model
• Provided with the CodeWarrior Suite
• Common software model for support of MSC815x devices
• Examples available in the SmartDSP\demos\starcore\msc815x folder
•
ƒ
Demos include:
Demos to ping ADS board and run Internal / External loopback
– Demos for MAC, IP, and UDP packet filtering and echoing with the QUICC Engine
– Demos for Filtering to one core or multiple cores
– Demos for Single and Multi-buffered framing
–
► Customers
may wish to avoid using SmartDSP:
Custom software model
• Running a specific test or validation suite
•
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
7
Key QUICC Engine Programming Concepts
►General
•
Configuration Registers
Memory Mapped Registers
►Parameter
•
User allocated structures containing QUICC Engine configuration
settings
►Parse
•
Command Descriptors
Packet filtering command structures
►Buffer
•
Descriptors
Pointers to buffer space for sending and receiving packets
►QUICC
•
RAM
Engine Command Register
Tell QUICC Engine where PRAM structures are
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
8
Ethernet Programming Model
►Registers
•
Memory mapped registers
ƒ
ƒ
ƒ
ƒ
ƒ
•
are split into 2 main categories:
Interface Speed, Modes, and Enable/Disable
Receive and Transmit FIFOs, I/O, and Clocks
Address Filtering with MAC Station Registers
Hardware Statistics
MII Management and PHY control
User Allocated Parameter RAM Register Data Structures
ƒ
RX Ethernet Parameters
–
–
ƒ
TX Ethernet Parameters:
–
–
ƒ
Packet Reception, Filtering, and Storage
Firmware Statistics (Includes error counting)
Packet Transmission and Storage
Firmware Statistics (Includes error counting)
QUICC Engine is informed of PRAM data structure locations via:
–
–
CECR: QUICC Engine Command Register
CECDR: QUICC Engine Command Data Register
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
9
Interface Setup (Memory Mapped Registers)
►Quick
•
reference:
Interface Mode and Speed Setup:
ƒ
MAC Configuration
ƒ MII Gasket register
ƒ UPSMR (Protocol Specific Ethernet Mode Register)
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
10
Parameter RAM Heirarchy
►InitEnet
Data Structure:
•
Programmed into QUICC
Engine with CECR+CECDR
•
Contains pointer to base
address of RX and TX Global
PRAM (user defined)
•
InitEnet
Table
Rx Global
Parameter
Table
Defines RISC and Thread
allocation within QUICC
Engine (SNUMs)
Rx queue
Table
Tx queue
Table
RxBD
Table
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Tx Global
Parameter
Table
TxBD
Table
TM
11
Rx Global Parameter RAM
Rx Global parameter RAM
REMODER
RQPTR
RxRMONBasePointer
Thread Data structure
Size depends on number of threads (set in InitEnet)
IntCoalecing Pointer
RBDQPTR
Ethernet Firmware Statistics
Rx Layer2 QoS Table
Int Coalesing Pointer
Rx Layer3 QoS Table
L2QT
L3QT
AF
64B Address Filtering
EXPGlobalParam
RxBD queue pointer
LossLessFCPtr
PCD chain
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
12
Extended Parsing Mode: Receive Packet Queues
Data0
BD0
BD3
BD0
BD1
BD3
BD2
Queue0
(Default)
BD0
BD1
BD3
BD2
queue1
BD1
BD2
queue2
Maximum eight queue are available.
Filtering
RISC process
Incoming Packet
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
13
Packet Formats
Ethernet Frame (L2):
IPv4:
UDP:
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
14
Ethernet Packet Filtering (MPC82xx vs. Extended Parsing)
►REMODER
•
Extended Parsing Mode vs MPC82xx Compatible Mode
►MPC82xx
•
Register determines filtering mode
Compatible Mode (REMODER[EXP]=0)
Reception uses L2 address matching with:
ƒ
MacStnAddr Register
ƒ PADDR (if REMODER[EXF] set)
ƒ Standard L2 Packets filtered to default queue ONLY
►Extended
Parsing Mode (REMODER[EXP]=1)
Parse Command Descriptors (PCD) create a chain of filters
• Hash Table used for checking for address matches
• Accepted frames can be sent to up to 8 queues
• Queues can be associated with any core
•
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
15
MPC82xx Compatible Filtering Flow
Receive
Unicast
Frame
F
L2 Dest ==
MACSTNADR
Register
?
F
REMODER
[EXF] == 1?
T
PADDR1..4
Match?
Set
RxBD[Miss],
Receive up
to MAXD2 in
Queue 0
T
Receive
Frame
(Queue 0
if no VLAN)
T
Discard
Frame
F
Hash table search
using
RxGlobalPram[AF]
IADDR Hash Table
Match
?
T
T
F
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Promiscuous
?
F
TM
16
MACSTNADDR Registers
► Usage:
Address Filtering
• Source address for flow control frames
•
► Memory
► Byte
Mapped
ordering is reversed:
For MAC Address ==
12345678ABCD
• MACSTNADDR1 ==
CDAB7856
• MACSTNADDR2 ==
3412000
•
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
17
MPC82xx Address Filtering and Extended Features
Rx Global parameter RAM
► MPC82xx
•
Extended Features
Enabled when:
ƒ
ƒ
REMODER
RQPTR
REMODER[EXP]=0
REMODER[EXF]=1
IADDR_H
RxRMONBasePointer
IADDR_L
► AF[PADDR1..4]
provides
additional L2 address filters
GADDR_H
IntCoalecing Pointer
GADDR_L
TADDR_H
RBDQPTR
► When
MACSTNADDR and
AF[PADDR1..4] match fails
•
MPC82xx Hash Table filtering
may be used
TADDR_M
TADDR_L
L2QT
PADDR1_H
PADDR1_M
L3QT
PADDR1_L
AF
64B Address Filtering
PADDR4_H
PADDR4_M
EXPGlobalParam
PADDR4_L
LossLessFCPtr
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
18
MPC82xx Hash Table Filtering
► GADDR/IADDR
► Add
bits are mapped to hash table entries
Hash Table Entry:
Place Group or Individual address value to TADDR
• Issue QUICC Engine CECR command with SET GROUP ADDR
• QUICC Engine will perform CRC32 on TADDR, and use 6 lsb for filter
•
► Filter
with Hash Table:
QUICC Engine performs CRC32 on incoming frame’s DA
• Compares 6 lsb to hash table entry
• On match, accept
• NOTE:
ƒ All frames matching will be accepted
ƒ Of non-matching frames, up to 87.5% will be filtered out
•
–
Core will have to filter the rest
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
19
Extended Parsing Mode
►Benefits
Enables multiple filters to be applied to a single packet
• Enables parsing on L2, L3, L4 and general packet headers
• Packet header insertion / extraction
• Allows packets to be sent to different DSP Cores based on filtering
results
•
►Extended
Parsing Discussion:
EXP parsing flow
• EXP Filtering (HASH Tables introduction)
• Parse Command Descriptors
• Programming Model and Example
•
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
20
Extended Parsing Mode Flow
►Enable:
REMODER[EXP]=1
►Uses
a chain of PCDs for
filtering packet headers
►Filtering
for:
L2 (MAC Layer)
• L3 (IPv4/v6 Layer)
• L4 (UDP/TCP Layer)
•
►Filtering
•
for up to 8 queues
Queues can be associated
with any core
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
21
Extended Parsing Field Comparison: Hash Tables
►Hash
tables are used to efficiently compare packet contents
►Hash Key
Packet contents are converted into a Hash Key
• Key points to a specific part of the Hash Table with 4 entries (8 entries
for 8 way Hash Table)
• Only 4 comparisons required after hash lookup for 4 way hash table
•
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
22
Extended Parsing Mode: Hash Tables
►Non-Hash
•
Filtering:
Incoming pattern
Incoming packet header
compared against pattern
pattern0
pattern1
pattern2
pattern3
ƒ
Match = accept
ƒ Miss = discard
•
Hit
Worst case scenario: All patterns
used in comparison
►By
using hash key, QUICC
Engine greatly reduces
comparison overhead:
•
pattern4
pattern5
pattern6
pattern7
Incoming pattern
pattern0
HASH
Hash function leads to
comparison within 1 set -> max 4
comparisons
pattern1
pattern2
pattern3
Hit
pattern4
pattern5
pattern6
pattern7
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
23
Hash Table Lookup Entry
►Hash
•
Lookup Table Components:
N Sets of 4 (or 8) ways. Each way containing:
ƒ
Termination Action Descriptor: Action when matched
ƒ Exact Match Tag: Compare to Lookup Key
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
24
Parse Command Descriptors
►Extract
information from incoming packets for comparison
►Use extracted information to compare against Hash tables
►On match, filter to a given RxBD Queue
►In our PCD discussion we will cover:
PCD Types
• PCD Chaining
• PCD Programming Model
• Example
•
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PCD Types
► First
•
PCD location:
EXPGlobalParam
pointer
► PCD
Type distinguished
by PCD OPCODE
•
Generate Lookup Keys
ƒ
ƒ
L2 Specific
L2, L3, L4
Mask
• Table Lookup
• TAD
• Last
•
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and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
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26
Extended Parsing and PCDs
QUICC Engine uses Parse Command Descriptors (PCDs) to access Hash Table
TAD0
TAD1
L2PCDPTR
Generate L2LookupKey PCD
TAD2
Change Mask PCD
TAD3
Four-Way Hash Lookup PCD
TAG0(8B)
Lookup miss
Set0
TAG1(8B)
Generate L2LookupKey PCD
TAG2(8B)
Parse Miss
Change Mask PCD
TAG3(8B)
Four-Way Hash Lookup PCD
TAD0
TAD1
Generate L2LookupKey PCD
Change Mask PCD
Last PCD( Chain terminate by
this PCD) indicates “Last”,
TAD2
TAD3
Four-Way Hash Lookup PCD
TAG0(8B)
LAST PCD
TAG1(8B)
Set1
TAG2(8B)
PCD chain
TAG3(8B)
Lookup Table for first PCD chain
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and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
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27
Chained PCDs
►A
lookup hit can lead to further comparisons by using the CPL field of
the Termination Action Descriptor:
► PCDs
are placed contiguously in memory and execute sequentially
until a match occurs or a last PCD is encountered
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L2LookupGey generation
► Generate
Lookup Key PCDs are used to extract the header from a frame
to be used in Hash Table lookups
► GenerateL2LookupKey
► Configuration
extracts L2 specific header information
example below shows MAC Destination header extraction
Incoming Frame
DA
L2
L3
L4
Payload
SA
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29
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Change MASK PCD
► Change
Mask allows the user to mask specific bits of the Lookup Key
► Mask
Index indicates offset from the start of the Lookup Key where
the 4 byte mask is applied
LookupKey_H
Index[0.1.2.3]
Index[4.5.6.7]
LookupKey_L
Index[8.9.10.11] Index[12.13.14.15]
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and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
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Four-way Hash Lookup PCD
► LookupKeySize
is the size of the lookup key used in the Hash Table
Lookup. If the actual lookup key is larger, it is truncated to this size
► Hash
Key Size
Decides how many bits from the key to use in the hash lookup
• Corresponds to the number of sets in the hash table
•
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Select Four-way or Eight-way Hash Lookup Table
►Select
Four-way or Eight-way for Hash Lookup PCD
# of ways for each Set
• Exact Match Tags are used for comparison to the Lookup Key
• Termination Action Descriptors (TAD) determine what to do on a match
•
Exact Match TAG0_H
Exact Match TAG1_H
Exact Match TAG2_H
Exact Match TAG3_H
Exact Match TAG4_H
Exact Match TAG5_H
Exact Match TAG6_H
Exact Match TAG7_H
Exact Match TAG0_L
TAD0
TAD1
TAD2
TAD3
TAD4
TAD5
TAD6
TAD7
Exact Match TAG1_L
Exact Match TAG2_L
Exact Match TAG3_L
Exact Match TAG4_L
Exact Match TAG5_L
Exact Match TAG6_L
Exact Match TAG7_L
Lookup key table
( pattern )
Lookupkeysize=16byte
TAD0
TAD1
TAD2
TAD3
Exact Match TAG0_H Exact Match TAG0_L
Exact Match TAG1_H Exact Match TAG1_L
Exact Match TAG2_H Exact Match TAG2_L
Exact Match TAG3_H Exact Match TAG3_L
Lookup key table
( pattern )
Lookupkeysize=16byte
Operation table
Set
Operation table
Set
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Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
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Creating a Hash Lookup Table
► CECR
+ CECDR
command points
to this data
structure
► ADDE:
add or
delete an entry
► EXLT
(unused
in 81xx)
► TAD:
Termination
Action Descriptor
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Example Hash Table Entry
► Example
hash table entry:
Up to 4 Sets
• Destination MAC=
•
ƒ
•
00 00 00 00 63 65
If match, Send
to Queue0
► Termination
Action
Descriptor sets:
•
Valid
ƒ
•
RQoS:
ƒ
•
Ready for use
Use VPriority for
destination queue
VPriority:
ƒ
Queue #
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34
Exercise: Set up PCDs for L4 Filtering
► Goal:
To filter incoming packets based on UDP Port number
• Each port should filter packets to a different Core in the DSP subsystem
•
► Question:
What do we need to set up?
• PRAM, PCD base, Generate Lookup, Hash Table Entries, and TADs
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Exercise Step 1: Init Rx Global PRAM
Rx Global parameter RAM
REMODER
RQPTR
RxRMONBasePointer
IntCoalecing Pointer
RBDQPTR
L2QT
L3QT
AF
64B Address Filtering
EXPGlobalParam
LossLessFCPtr
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Example Step 2: PCD Base setup
Rx Global parameter RAM
REMODER
RQPTR
RxRMONBasePointer
IntCoalecing Pointer
RBDQPTR
L2QT
L3QT
AF
64B Address Filtering
EXPGlobalParam
LossLessFCPtr
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37
Example Step 3: Generate Lookup Key (UDP Port #)
► Extract
L4
Destination
Port
•
TUSP DST
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38
Example Step 4: Hash Lookup and Last PCD
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39
Example Step 5: Hash Lookup Table Initialization
►Allocate
►Add
space for hash table
entries for the 4 UDP ports
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40
Example Step 5 Hash Lookup Table (continued)
► After
data
structure created,
send to QUICC
Engine using:
•
CECDR =
ƒ
•
Table Address
CECR=
ƒ
Add Entry in
Hash Lookup
Table
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TM
41
Session Summary
► Focused
on the key points of the Ethernet
programming model
► Re-focused
on Parameter RAM (PRAM)
programming
► Learned
how to set up Ethernet filtering for
various types of packets
► Reviewed
the setup using an example
(Filtering to multiple queues by UDP Port)
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
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42
For Further Information
► QUICC
•
Engine Reference Manual version 3
Refer to Chapter 4, 7, 8, and 30 specifically for MSC815x Specific Material
► MSC8156
► AN3428:
► IEEE
Reference Manual
QUICC Engine Ethernet Extended Frame Filtering using PCDs
802.3 Ethernet Standards
► Freescale
Support: [email protected]
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
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43
Session Closing
By now, you should be able to:
► Describe
and discuss the key features
to QE as they relate to frame filtering
► Effectively
describe the Ethernet
programming model
► Assist
a customer with more in depth
programming of Ethernet setup
and frame filtering
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
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TM