NXPs Redistributed Chip Packaging (RCP) Ready for Production

June, 2010
Freescales Redistributed Chip Packaging
(RCP) Ready for Production
FTF-ENT-F0812
Navjot Chhabra
RCP Operations Manager
TM
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Introduction
As Dan Hutcheson, CEO of VLSI Research Inc. recently wrote,
“Not far away in Tempe, at Freescale’s Packaging Systems
Laboratory, an even more revolutionary packaging technology
has been developed. Freescale calls it RCP for Redistributed
Chip Package. I think they should rename it to Revolutionary
Chip Package because what I’ve seen has led me to believe it
will upend the entire way electronics are made in the future.”
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
2
Objective
►
Understand and apply the RCP package technology toward
the following attributes:
•
•
•
•
•
•
•
Package size
Package performance
Multi-die in package solutions
Integrated stacked packages
3D Integrated packaging
System in package
Convergence of 3D IC and RCP technology
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
3
Agenda
►
Redistributed Chip Packaging (RCP) overview
►
RCP roadmap
►
Reliability and technology certification
►
Development activities underway
►
Providing solutions to customers
►
Summary
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
4
Three Key Benefits of RCP
3G-UMTS
Radio
13x13mm 9x9mm
MBGA
RCP
280-I/O
•
•
•
•
►Miniaturization
On average - 30% area reduction
Eliminates wirebonds & substrate
Maintain same ball pitch or smaller
30% thinner than standard BGA
►Integration
►Elimination
30x30mm
45x90mm
86 Embedded peripheral components
36 SMT peripheral components
122 total peripheral components
Does not include PA or power FETS
3-4 layer PCB required for HIF
Multiple die
- any device technology
440• peripheral
components
Die PCB
PLUS peripherals in package
10 •layer
• PoP any packaging technology
• SMT components
top
~75%onreduction
• Replace motherboard - PCB
in area
~70% peripheral components eliminated!
(animated slide)
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
5
RCP Industry Thrust
►System in package – Addresses a potentially large need in
the market and is being recognized as the next industry
thrust
• Heterogeneous integration
• System miniaturization
• System performance
• System cost
• High speed in package computing
• System flexibility (Chip sourcing, integration)
• Block testability
• Path to integrating with 3D IC
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
6
Complexity
Freescale Packaging Technology Landscape
RCP
Stacked Die
TSV
3D Packaging
RCP SiP
RCP
Single Die
Wire bond
BGAs
TBGA
PQFN
PoP
RF Module-HDI
Flip Chip BGA
MPC8370
QAC0703
TEPBGA II
QFP
QFN
Integration
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
7
Convergence of 3D IC with RCP Integrated Systems
3D IC TSV.
Stacked
memory
3D ICTSV.
Differentiated
die
3D IC TSV.
Integrated with
RCP
Stacked die
*
3D IC face-to-face
PoP
RCP Stacked multi-die
modules (2-5 layers).
RCP (1LM – 6 LM, 3x3 to
40x40mm pkg.)
*
RCP
Integrated
Systems
(Sensors,
MEMS,
Analog,
Digital,
Image,
Memory, RF,
optical)
RCP Die to Die
Integrated
Package
RCP Multi-die/Modules
Substrate
Based
Module
Fan out 1LM small pkg. (≤ 8x8)
Highly
integrated,
performance
app’s. (3D +
RCP Systems)
-Courtesy of 3D Plus
WL-CSP
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
*
8
TM
Freescale’s Redistributed Chip Package
►Cost
competitive, high productivity,
large area batch process
ƒ
Eliminates package substrate
ƒ Eliminates gold wire bonds / C4 bumps
►High performance package
ƒ Reduced electrical parasitics
ƒ Higher frequency response
►Ultra Low-k Compatible (<90 nm MLM)
ƒ Compliant with advance Si technology
►Pb-free,
Halogen free, ROHS
compliant
►Single
chip, multiple chip and
embedded component capability
300 mm round panel
►3D
IC Enabling with System
Integration roadmap
9 x 9 mm packages
258 IO, 0.5 mm pitch
716 packages/panel
2 layer build-up
►Certified
to JEDEC/FSL Commercial
and Industrial Level Reliability
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
9
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
10
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
11
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
12
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
13
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Animated Build-up Process
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
14
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Rotate 180 Degrees
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
15
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
16
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
17
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
18
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
19
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
20
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
21
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
22
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
23
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
24
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
25
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
26
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
27
RCP Process
Mold frame
Pre-tested die
Carrier
Die place onto carrier tape face down prior to encapsulation.
Panel encapsulation
Tape
Carrier
Mold frame removed, panel separated from carrier, ready to de-tape
Cu interconnect
►Process steps
• Die placed face down on tape
mounted carrier
• Non-compression encapsulant
applied over die
• Low temperature cure of
encapsulant and de-tape
• Panel buildup with dielectric and Cu
redistribution
• Panel bumped after final dielectric
layer applied
Solder bump
Cu via
Encapsulant
Die
Panel cross-section after build up process and bump applied
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Animated Build-up Process
TM
28
RCP Build-Up Process
Metal 1 layer
Metal 2 layer
BGA
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
29
Attributes of the RCP Technology
►Multiple
•
redistribution layers
Allows for higher routing complexities, greater I/O
►Package
•
1ML
2ML
Shrink
Improved via/line/spacing over HDI substrate
3ML
►Performance
•
►Die
•
shrink
Design for RCP
►Decrease
•
4ML
Low contact resistance via structure (Rvia<25mOhm)
in iterative design cycle
RCP build up pizza mask
►Integration
•
•
•
•
Multi-Die SiP
3D Double sided build up
Stacked
Integrated passives
LTE2
13x13mm
Pad Compatible
with BGA version
RCP-LTE2
9x9mm-I.275BB
Single die version
I/O = 280
30
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
30
RCP and HDI Design Rule Comparison
FC-HDI
Substrate
Std/Prem
Label
Feature
RCP
Std/Min
A
Via hole diameter
75um/65um*
200um/80um
B
Via pad diameter
100um/95um
350um/150um
C
Line width*
25um/25um**
50um/45um
D
Line to line space
25um/25um
50um/45um
E
Line to via pad space
25um/25um
50um/45um
F
Via pad to via pad
space
25um/25um
50um/45um
G
Via pad to package
edge space
-/300um
250um/150um
H
Line to package edge
space
-/300um
250um/150um
*Current released rules (12MPK10001G-ENG01) 70um min. Expect to revise min via size in a next release pending additional reliability data received,
from 70um to 65um (after built: 65um top with 60um bottom). For actual “built” bias dimension, see RCP standard notes).
**Widen line width to as much as possible for low line resistance nets.
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
31
Die Design for RCP
Potential Die Pad Configurations
Potential for Die Shrink
•Design for RCP allows full array die
I/O
•Die size can be reduced, fewer
power and ground connections
Die Pad Design Rules
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
32
RCP Thermal Improvements
RCP With Exposed Die
and Attached Heat Spreader
Thermal Performance
Package Type
Junction-to-air Thermal Resistance,
Rja (°C/W)
Natural
Convection
Forced Convection at
1 m/s
(200 ft/min)
RCP, 4 layers,
Die Size: 8.5 x 9.9 mm, no lid on die backside
21.4
14.5
FC-PBGA, 6-layer HDI
Die Size: 7 x 9 mm, no lid on die backside
24.2
20.4
FC-CBGA, 6 layers
Die Size: 6.8 x 7.9 mm, no lid on die backside
14.0
11.0
RCP with 0.5 mm thick 25x25 mm Cu lid on
die/encapsulant backside
15.8
10.2
RCP with 1.0 mm thick 25x25 mm Cu lid on
die/encapsulant backside
15.5
10.1
RCP with 1.0 mm thick 25x25 mm Cu lid on
die/encapsulant backside, along with a plate-fin
heatsink
5.6
2.33
360 I/O, 25x25 mm, 1.27 mm
pitch on a 4-layer PCB
•Exposed Si Backside
•Attach of heat spreader
•Improved thermal performance
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
33
RCP Test Vehicles & Assembled Products
TV1
TV2
TV3
PowerQuicc-3
PTV-C65
3G Baseband
Network
Processor
PA Test Vehicle
2G Baseband
i.300 RiP
RF Test Vehicle
XTR Power Management
i.275 RiP
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
19
34
TM
9mm x 9mm 0.5mm P
12mm x 12mm 0.4mm P
Certification Vehicles
6mm x 6mm 0.5mm P
12mm x 12mm
0.4mm P
Vertical probe
125um pad pitch
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
35
RCP Reliability – M2 Technology Certification 300mm
Test Item
Pre-con: Customer-F*
Pre-con: Customer-B**
Pre-con: MSL3/260ºC
Temp Cycle (-55 to 125ºC)
w/Customer-F* Pre-con
Temp Cycle (-55 to 125ºC)
w/Customer-B** Pre-con
Temp Cycle (-55 to 125ºC)
w/MSL3/260ºC Pre-con
HTOL 125ºC
HTB 150ºC
THB 85ºC/85%
w/Customer-F* Pre-con
THB 85ºC/85%
w/Customer-B** Pre-con
THB 85ºC/85%
w/MSL3/260ºC Pre-con
PCT 121ºC/100%RH
29.7psia w/Customer-F*
Pre-con
PCT 121ºC/100%RH
29.7psia w/Customer-B**
Pre-con
Board Level SJR
Temp Cycle (-55 to 125ºC)
w/Customer-F* Pre-con
JEDEC Drop Test
30 Drops, 1500G
JEDEC/FSL JEDEC/FSL Customer Extended
Commercial Industrial Requirement Stress
NA
NA
Pass
NA
NA
Pass
Pass
Pass
Pass
NA
NA
NA
NA
Pass
400cyc
Pass
504hrs
Pass
504hrs
NA
Pass
700cyc
Pass
1008hrs
Pass
1008hrs
NA
Pass
100cyc
Pass
100cyc
NA
NA
NA
Pass
504hrs
NA
Pass
1008hrs
NA
NA
NA
M2 Tech Cert
Achieved using
Spirytus-S
(6x6mm, 105 I/O,
2ML 0.5mm pitch)
Pass
1000cyc
Pass
1008hrs
Pass
1008hrs
Pass
1008hrs
Pass
1008hrs
NA
JEDEC and customer
specific reliability
requirements met
Pass
96hrs
Pass
96hrs
NA
NA
Pass
480cyc
Pass
Pass
NA
* F Precon consists of 3 cycles of moisture load
(30ºC/70%RH for 96hrs) and reflow at 260ºC
** B Precon consists of 2 cycles of moisture load
(30ºC/70%RH for 96hrs) and reflow at 260ºC
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
36
RCP Reliability – LTE2 300mm
RCP – LTE2 Demonstrated Reliability
(9x9mm, 2ML, 258 I/O, 0.5mm pitch)
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
37
A Few Applications Targeted for RCP
Package 1
Package 2
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
38
Robust RCP 2D Dimensional Packages –
Building a Foundation for 3D
Multi-Die, Embedded Passives,
Integrated Structures
Multiple Redistribution Layers
Fan-Out Packaging
Module with two die and 8
embedded passives
1ML
U1
2ML
4ML
U2
Inductors in Build-up
M1
M2
M3
M4
39
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Inductor Coils with
Shielding Structure
for Isolation
TM
39
RCP 3D Building Blocks – Multi Layer Fan-Out Packages
Stacked Chip-to-Chip
Die/Package B
Die A
RCP multi-die layer
PCB
-Courtesy
of 3D Plus
RCP Module with Sensor
Stacked Fan-Out with side metal interconnect
Multiple
Laminated
Package Layers
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
10 die, multilayer
package
built for
Medtronic
(Pacemaker
application)
TM
40
RCP 3D Building Blocks –
Through Package Via-Double Sided Buildup
Package A
Die 1
Die 2
Package
A
Package
B
Package
C
Die 1
Package B
Die 2
Package
D
Package A
Embedded in Base Package
Through
Package
Vias
Base
Package
Assembled on Top
Stacked TSV
SMD
Single die
Back-toBack Die
2D Fan-out
Common
Power/Ground
E-Plane
DoubleSided
Build up
Blind Via
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
Through Vias
TM
41
New RCP Potential
Wirebond to RCP
►Allows system integration of
mixed technologies:
• MEMS
• WB Die
GCell
Single die
Backto-Back
Die
E-Plane
►Wirebond on Cu RCP pad
possible over:
• Die Region
• EGP
• Encapsulation
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
42
RCP on Interposer Requiring ≥ 0.8mm BGA Pitch
►
►
►
Devised as low cost alternative to low-mid range FC packages
Combines smaller RCP packaged device stacked on low cost substrate to
accommodate 1mm and larger pitch
Key Attributes of Concept
•
•
Allows for smaller RCP package size
Low cost Interposer substrate provided by vendor
Footed HS
Underfill
RCP
Interposer
8156 die mapped into a 0.4mm
RCP Package
(17mm x17mm)
Interposer routing out to
43
1.0mm
(29mm x 29mm)
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
Summary: Borrow Architecture from Nature – Adapt it for RCP
Retina
Light input
Parallel Vertical Imager/Processor
Stack
Electrical output
To optic nerve
(output)
To main
computer
Smart processing
Ganglion cells
(multi-pixel
processing)
BOX
Bipolar cells
Amacrine cells
Horizontal cells
Cones (day/color)
Rods (night vision)
Metal3
Metal2
Metal1
InGaAs
BOX
Imager
layer
BOX
Visible
IR
►RCP provides a diverse set of solutions for heterogeneous integration.
►Interest in mounting within the industry to utilize this capability for
integrated, compact systems
44
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
Proposed Model
Outside of Nepes framework
Freescale Development Activities
Internal Freescale Non JDA related opportunities
(ex Sensors)
JDA Activity with Nepes
Multi-Die
3D Integrated Packages
High I/O, High performance packages
Integrated Sensors
Prototyping
Freescale NPI’s
Freescale initiated external customer support
External Freescale System level or package level
opportunity
(i.e. Medical, Robotics, Imaging, Smart Card, etc.)
Tempe RCP
Development
and
Prototyping
Lab
Prototyping
Nepes initiated non-Freescale product support
Nepes
Manufacturing
Site
External Freescale Test hardware development
Develop Freescale integrated system level package
solution using Freescale resources (design, modeling,
package development, manufacturing)
Use established opportunities to integrate Freescale IP/
Chips as well as build a comprehensive solution
Nepes
Manufacturing
Site
Partner
Manufacturing
Site
Freescale
Manufacturing
Site
Technology Development
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
45
Foundry Technology Offerings Across Markets
Automotive
Industrial
Consumer
Wireless
Handsets
Networking
Infrastructure
CMOS Technology (Low Power, RF CMOS, SOI, NVM and Cores)
180nm, 130nm and 90nm
Silicon Germanium RF BiCMOS
0.35um and 0.18um
SmartMOS (BCD Smart Power Technology
0.35um, 0.25um and 0.13um (voltage tiers up to 105v)
MEMs, Backend and Post Process Modules (Cu Ind, Power Cu and Bump)
150mm and 200mm Wafer Services
RCP – Advanced Redistributed 3-D Packaging Technology
Multi Die, Multi Technology Systems in a Package
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLink
and VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.
TM
46
TM