Features • • • • • • • • • • Industry-standard Architecture 12 ns Maximum Pin-to-pin Delay Zero Power – 25 µA Maximum Standby Power (Input Transition Detection) CMOS and TTL Compatible Inputs and Outputs Advanced Electrically-erasableTechnology – Reprogrammable – 100% Tested Latch Feature Holds Inputs to Previous Logic State High-reliability CMOS Process – 20 Year Data Retention – 100 Erase/Write Cycles – 2,000V ESD Protection – 200 mA Latchup Immunity Commercial and Industrial Temperature Ranges Dual-in-line and Surface Mount Standard Pinouts PCI Compliant Highperformance EE PLD Block Diagram ATF22V10CZ ATF22V10CQZ Description The ATF22V10CZ/CQZ is a high-performance CMOS (electrically-erasable) programmable logic device (PLD) which utilizes Atmel’s proven electrically-erasable (continued) Pin Configurations TSSOP All Pinouts Top View Pin Name Function CLK Clock IN Logic Inputs I/O Bi-directional Buffers VCC +5V Supply 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN 25 24 23 22 21 20 19 12 13 14 15 16 17 18 5 6 7 8 9 10 11 DIP/SOIC I/O I/O I/O GND* I/O I/O I/O IN IN GND GND* IN I/O I/O IN IN IN GND* IN IN IN 4 3 2 1 28 27 26 IN IN CLK/IN VCC* VCC I/O I/O PLCC CLK/IN IN IN IN IN IN IN IN IN IN IN GND Note: For PLCC, P1, P8, P15 and P22 can be left unconnected. For superior performance, connect VCC to pin 1 and GND to 8, 15, and 22. CLK/IN IN IN IN IN IN IN IN IN IN IN GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN Rev. 0778H–03/01 1 Flash memory technology. Speeds down to 12 ns with zero standby power dissipation are offered. All speed ranges are specified over the full 5V ±10% range for industrial temperature ranges; 5V ±5% for commercial range 5-volt devices. The ATF22V10CZ/CQZ provides a low voltage and edge-sensing “zero” power CMOS PLD solution with “zero” standby power (5 µA typical). The ATF22V10CZ/CQZ provides a “zero” power CMOS PLD solution with 5V operating voltages, powering down automatically to the zero power-mode through Atmel’s patented Input Transition Detection (ITD) circuitry when the device is idle, offering “zero” (25 µA worst case) standby power. This feature allows the user to manage total system power to meet specific application requirements and enhance reliability. Pin “keeper” circuits on input and output pins eliminate static power consumed by pull-up resistors. The “CQZ” combines the low high-frequency I CC of the “Q” design with the “Z” feature. The ATF22V10CZ/CQZ incorporates a superset of the generic architectures, which allows direct replacement of the 22V10 family and most 24-pin combinatorial PLDs. Ten outputs are each allocated 8 to 16 product terms. Three different modes of operation, configured automatically with software, allow highly complex logic functions to be realized. Absolute Maximum Ratings* Temperature Under Bias.................................. -40°C to +85°C *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC, which may overshoot to 7.0V for pulses of less than 20 ns. Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .........................................-2.0V to +7.0V(1) Voltage on Input Pins with Respect to Ground During Programming.....................................-2.0V to +14.0V(1) Programming Voltage with Respect to Ground .......................................-2.0V to +14.0V(1) 1. DC and AC Operating Conditions Operating Temperature (Ambient) VCC Power Supply Commercial Industrial 0°C - 70°C -40°C - 85°C 5V ± 5% 5V ± 10% PAL Mode (5828 Fuses) GAL Mode (5892 Fuses) ATF22V10C (DIP) ATF22V10C (PLCC) ATF22V10C DIP (UES) ATF22V10C PLCC (UES) P22V10 P22V10LCC G22V10 G22V10LCC Compiler Mode Selection Synario WINCUPL 2 ATF22V10C(Q)Z ATF22V10C(Q)Z Functional Logic Diagram Description The Functional Logic Diagram describes the ATF22V10CZ/CQZ architecture. The ATF22V10CZ/CQZ has 12 inputs and 10 I/O macrocells. Each macrocell can be configured into one of four output configurations: active high/low, registered/combinatorial output.The universal architecture of the ATF22V10CZ/CQZ can be programmed to emulate most 24-pin PAL devices. Unused product terms are automatically disabled by the compiler to decrease power consumption. A security fuse, when programmed, protects the contents of the ATF22V10CZ/CQZ. Eight bytes (64 fuses) of User Signature are accessible to the user for purposes such as storing project name, part number, revision or date. The User Signature is accessible regardless of the state of the security fuse. DC Characteristics Symbol Parameter IIL Input or I/O Low Leakage Current IIH Input or I/O High Leakage Current ICC ISB Clocked Power Supply Current Power Supply Current, Standby Condition Min Typ 0 ≤ VIN ≤ VIL (Max) 3.5 ≤ VIN ≤ VCC VCC = Max Outputs Open, f = 15 MHz VCC = Max VIN = MAX Outputs Open Max Units -10 µA 10 µA CZ-12, 15 Com 90 150 mA CZ-15 Ind 90 180 mA CQZ-20 Com 40 60 mA CQZ-20 Ind 40 80 mA CZ-12, 15 Com 5 25 µA CZ-15 Ind 5 50 µA CQZ-20 Com 5 25 µA CQZ-20 Ind 5 50 µA -130 mA IOS(1) Output Short Circuit Current VIL Input Low Voltage -0.5 0.8 V VIH Input High Voltage 2.0 VCC + 0.75 V VOL Output Low Voltage VIN = VIH or VIL VCC = Min, IOL = 16 mA 0.5 V VOH Output High Voltage VIN = VIH or VIL VCCIO = Min, IOH = -4.0 mA Notes: VOUT = 0.5V 2.4 V 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec. 3 AC Waveforms INPUTS, I/O REG. FEEDBACK SYNCH. PRESET tS tH tW tW CP tP tAW tAR ASYNCH. RESET tCO tAP REGISTERED OUTPUTS tER VALID OUTPUT DISABLED VALID tPD COMBINATORIAL OUTPUTS tEA tER VALID VALID tEA OUTPUT DISABLED VALID VALID AC Characteristics(1) -12 -15 -20 Symbol Parameter tPD Input or Feedback to Non-registered Output tCF Clock to Feedback tCO Clock to Output 2 tS Input or Feedback Setup Time 10 10 14 ns tH Input Hold Time 0 0 0 ns tW Clock Width 6 6 10 ns fMAX External Feedback 1/(tS + tCO) Internal Feedback 1/(tS + tCF) No Feedback 1/(tP) 55.5 69 83.3 38.5 45.5 50.0 MHz MHz MHz tEA Input to Output Enable - Product Term 3 12 3 15 3 20 ns tER Input to Output Disable - Product Term 2 15 3 15 3 20 ns tPZX OE Pin to Output Enable 2 12 2 15 2 20 ns tPXZ OE Pin to Output Disable 2 15 2 15 2 20 ns tAP Input or I/O to Asynchronous Reset of Register 3 10 3 15 3 22 ns tSP Setup Time, Synchronous Preset 10 10 14 ns tAW Asynchronous Reset Width 7 8 20 ns tAR Asynchronous Reset Recovery Time 5 6 20 ns tSPR Synchronous Preset to Clock Recovery Time 10 10 14 ns Note: 4 1. See ordering information for valid part numbers. ATF22V10C(Q)Z Min Max Min Max Min Max Units 3 12 3 15 3 20 ns 8 ns 12 ns 6 8 4.5 2 55.5 62 83.3 8 2 ATF22V10C(Q)Z Input Test Waveforms and Measurement Levels Output Test Loads Note: Similar competitors devices are specified with slightly different loads. These load differences may affect output signals’ delay and slew rate. Atmel devices are tested with sufficient margins to meet compatible device specification conditions. Pin Capacitance f = 1 MHz, T = 25C(1) Typ Max Units Conditions CIN 8 10 pF VIN = 0V; f = 1.0 MHz CI/O 8 10 pF VOUT = 0V; f = 1.0 MHz Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Power-up Reset Security Fuse Usage The registers in the ATF22V10CZ/CQZ are designed to reset during power-up. At a point delayed slightly from VCC crossing V RST , all registers will be reset to the low state. The output state will depend on the polarity of the buffer. This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the uncertainty of how V CC actually rises in the system, the following conditions are required: 1. The VCC rise must be monotonic and start below 0.7V. 2. The clock must remain stable during TPR. 3. After TPR occurs, all input and feedback setup times must be met before driving the clock pin high. A single fuse is provided to prevent unauthorized copying of the ATF22V10CZ/CQZ fuse patterns. Once programmed, fuse verify and preload are inhibited. However, the 64-bit User Signature remains accessible. The security fuse should be programmed last, as its effect is immediate. Programming/Erasing Programming/erasing is performed using standard PLD programmers. See CMOS PLD Programming Hardware & Software Support for information on software/programming. VRST POWER t PR Preload of Register Outputs The ATF22V10CZ/CQZ’s registers are provided with circuitry to allow loading of each register with either a high or a low. This feature will simplify testing since any state can be forced into the registers to control test sequencing. A JEDEC file with preload is generated when a source file with vectors is compiled. Once downloaded, the JEDEC file preload sequence will be done automatically by most of the approved programmers after the programming. Electronic Signature Word There are 64 bits of programmable memory that are always available to the user, even if the device is secured. These bits can be used for user-specific data. REGISTERED OUTPUTS tS tW CLOCK Parameter Description Typ Max Units TPR Power-up Reset Time 600 1000 ns VRST Power-up Reset Voltage 3.8 4.5 V 5 Input and I/O Pull-ups All ATF22V10CZ/CQZ family members have internal input and I/O pin-keeper circuits. Therefore, whenever inputs or I/Os are not being driven externally, they will maintain their last driven state. This ensures that all logic array inputs and device outputs are at known states. These are relatively weak active circuits that can be easily overridden by TTLcompatible drivers (see input and I/O diagrams below). Input Diagram VCC 100K INPUT ESD PROTECTION CIRCUIT I/O Diagram VCC OE DATA I/O VCC INPUT 100K 6 ATF22V10C(Q)Z ATF22V10C(Q)Z Functional Logic Diagram ATF22V10CZ/CQZ 7 NORMALIZED ICC VS. TEMP ATF22V10CZ/CQZ STAND-BY ICC vs. 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1.2 NORMALIZED Icc ICC (µA) 1.4 SUPPLY VOLTAGE (TA = 25°C) 1.0 0.8 0.6 4.5 4.8 5.0 5.3 0.4 -40.0 5.5 0.0 SUPPLY VOLTAGE (V) ATF22V10CZ SUPPLY CURRENT vs. INPUT FREQUENCY (VCC = 5.0V, TA = 25°C) 120.000 50.000 100.000 40.000 ICC (mA) ICC (mA) 75.0 ATF22V10CQZ SUPPLY CURRENT VS. INPUT FREQUENCY (VCC = 5V, TA = 25°C) 140.000 80.000 60.000 30.000 20.000 40.000 10.000 20.000 0.000 0.0 0.000 0.0 0.5 2.5 5.0 7.5 10.0 FREQUENCY (MHz) 25.0 37.5 IOH (mA) -20 -30 -40 -50 5.0 5.0 5.5 7.5 10.0 25.0 37.5 50.0 ATF22V10CZ/CQZ OUTPUT SOURCE CURRENT VS. OUTPUT VOLTAGE (VCC = 5V, TA = 25°C) 0.0 -10.0 -20.0 -30.0 -40.0 -50.0 -60.0 -70.0 -80.0 -90.0 -10 4.5 2.5 FREQUENCY (MHz) 0 4.0 0.5 50.0 ATF22V10CZ/CQZ OUTPUT SOURCE CURRENT VS SUPPLY VOLTAGE (VOH = 2.4V) I OH (mA) 25.0 TEMPERATURE (C) 6.0 0.00 SUPPLY VOLTAGE (V) 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 VOH (V) 48 ATF22V10CZ/CQZ OUTPUT SINK CURRENT VS. SUPPLY VOLTAGE (VOL = 0.5V) ATF22V10CZ/CQZ OUTPUT SINK CURRENT vs. SUPPLY VOLTAGE (V OL = 0.5V) 140.0 120.0 100.0 44 IOL (mA) Iol (mA) 46 42 40 38 80.0 60.0 40.0 36 20.0 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 6.0 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 SUPPLY VOLTAGE (V) 8 ATF22V10C(Q)Z 3.5 4.0 4.5 5.0 ATF22V10C(Q)Z ATF22V10CZ/CQZ INPUT CLAMP CURRENT VS INPUT VOLTAGE (V CC = 5V, T A = 35°C) 40 INPUT CURRENT (uA) INPUT CURRENT (mA) 0 -20 -40 -60 -80 -100 -120 0.0 -0.2 -0.4 -0.6 INPUT VOLTAGE (V) -0.8 30 20 10 0 -10 -20 -30 -1.0 0.0 1.0 2.0 3.0 4.0 INPUT VOLTAGE (V) 5.0 6.0 NORMALIZED TPD vs. TEMP NORMALIZED TPD vs. VCC 1.1 NORMALIZED T PD 1.2 NORMALIZED TPD ATF22V10CZ/CQZ INPUT CURRENT VS INPUT VOLTAGE (V CC = 5V, TA = 25°C) 1.1 1.0 0.9 1.0 0.9 0.8 -40.0 0.8 4.5 4.8 5.0 SUPPLY VOLTAGE (V) 5.3 5.5 0.0 25.0 TEMPERATURE (C) 75.0 NORMALIZED TCO VS TEMP NORMALIZED TCO vs. VCC NORMALIZED TCO NORMALIZED T CO 1.3 1.1 1.2 1.1 1.0 0.9 1.0 0.9 0.8 -40.0 0.8 4.5 4.8 5.0 SUPPLY VOLTAGE (V) 5.3 NORMALIZED T SU VS VCC 25.0 75.0 NORMALIZED TSU vs. TEMP 1.2 1.2 NORMALIZED TCO SU NORMALIZED T 0.0 TEMPERATURE (V) 5.5 1.1 1.0 0.9 0.8 4.5 4.8 5.0 SUPPLY VOLTAGE (V) 5.3 5.5 1.1 1.0 0.9 0.8 -40.0 0.0 25.0 75.0 TEMPERATURE (C) 9 ATF22V10C DELTA TPD vs. OUTPUT LOADING 8 ATF22V10C DELTA TCO VS. OUTPUT LOADING 8.00 DELTA T CO (ns) DELTA TPD (ns) 7.00 6 4 2 0 -2 6.00 5.00 4.00 3.00 2.00 1.00 0.00 0 50 100 150 200 250 300 50 100 OUTPUT LOADING (PF) DELTA T PD vs. # OF OUTPUT SWITCHING 250 300 DELTA T CO vs. # OF OUTPUT SWITCHING DELTA T CO (ns) DELTA T PD (ns) 200 0.0 0.0 -0.1 -0.2 -0.3 -0.4 -0.1 -0.1 -0.2 -0.2 -0.3 -0.5 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 NUMBER OF OUTPUTS SWITCHING 10 150 NUMBER OF OUTPUTS LOADING ATF22V10C(Q)Z 9.0 10.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 NUMBER OF OUTPUTS SWITCHING 9.0 10.0 ATF22V10C(Q)Z ATF22V10CZ/CQZ Ordering Information tPD (ns) tS (ns) tCO (ns) 12 10 15 4.5 20 14 Ordering Code Package 8 ATF22V10CZ-12JC ATF22V10CZ-12PC ATF22V10CZ-12SC ATF22V10CZ-12XC 28J 24P3 24S 24X Commercial (0°C to 70°C) 8 ATF22V10CZ-15JC ATF22V10CZ-15PC ATF22V10CZ-15SC ATF22V10CZ-15XC 28J 24P3 24S 24X Commercial (0°C to 70°C) ATF22V10CZ-15JI ATF22V10CZ-15PI ATF22V10CZ-15SI ATF22V10CZ-15XI 28J 24P3 24S 24X Industrial (-40°C to +85°C) ATF22V10CQZ-20JC ATF22V10CQZ-20PC ATF22V10CQZ-20SC ATF22V10CQZ-20XC 28J 24P3 24S 24X Commercial (0°C to 70°C) ATF22V10CQZ-20JI ATF22V10CQZ-20PI ATF22V10CQZ-20SI ATF22V10CQZ-20XI 28J 24P3 24S 24X Industrial (-40°C to +85°C) 12 Operation Range Using “C” Product for Industrial To use commercial product for Industrial temperature ranges, down-grade one speed grade from the “I” to the “C” device (7 ns “C” = 10 ns “I”) and de-rate power by 30%. Package Type 28J 28-lead, Plastic J-leaded Chip Carrier (PLCC) 24P3 24-pin, 0.300", Plastic Dual Inline Package (PDIP) 24S 24-lead, 0.300" Wide, Plastic Gull-Wing Small Outline (SOIC) 24X 24-lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline (TSSOP) 11 Packaging Information 28J, 28-lead, Plastic J-leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-018 AB 24P3, 24-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 AF .045(1.14) X 45° PIN NO. 1 IDENTIFY .045(1.14) X 30° - 45° PIN 1 .430(10.9) SQ .390(9.91) .021(.533) .013(.330) .456(11.6) SQ .450(11.4) .032(.813) .026(.660) 1.27(32.3) 1.25(31.7) .012(.305) .008(.203) .495(12.6) SQ .485(12.3) .266(6.76) .250(6.35) .090(2.29) MAX 1.100(27.94) REF .050(1.27) TYP .043(1.09) .020(.508) .120(3.05) .090(2.29) .300(7.62) REF SQ .180(4.57) .165(4.19) .022(.559) X 45° MAX (3X) .200(5.06) MAX .005(.127) MIN SEATING PLANE .070(1.78) .020(.508) .023(.584) .014(.356) .151(3.84) .125(3.18) .110(2.79) .090(2.29) .065(1.65) .040(1.02) .325(8.26) .300(7.62) .012(.305) .008(.203) 0 REF 15 .400(10.2) MAX 24S, 24-lead, 0.300" Wide, Plastic Gull-Wing Small Outline (SOIC) Dimensions in Inches and (Millimeters) 24X, 24-lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline (TSSOP) Dimensions in Inches and (Millimeters) .020(.508) .013(.330) .299(7.60) .420(10.7) .291(7.39) .393(9.98) PIN 1 ID .050(1.27) BSC .616(15.6) .598(15.2) .105(2.67) .092(2.34) .012(.305) .003(.076) .013(.330) .009(.229) 0 REF 8 12 .050(1.27) .015(.381) ATF22V10C(Q)Z Atmel Headquarters Atmel Operations Corporate Headquarters Atmel Colorado Springs 2325 Orchard Parkway San Jose, CA 95131 TEL (408) 441-0311 FAX (408) 487-2600 Europe 1150 E. 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The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. Marks bearing ® and/or ™ are registered trademarks and trademarks of Atmel Corporation. Terms and product names in this document may be trademarks of others. Printed on recycled paper. 0778H–03/01/xM