3-phase Sensorless BLDC
Motor Control Reference Design
Using Kinetis KEA128
Document Number: DRM151
Rev. 0
06/2014
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
2
Freescale Semiconductor
Chapter 1
Introduction
1.1
System concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Chapter 2
Sensorless BLDC Control
2.1
2.2
2.3
2.4
Overview of the brushless DC motor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2.1.1 Electronic commutation control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
2.1.2 Speed/torque control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Complementary unipolar PWM modulation technique . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Position estimation based on BEMF zero-crossing detection . . . . . . . . . . . . . . . . . . . . . 11
2.3.1 BEMF zero-crossing principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3.2 BEMF zero-crossing event detection and phase current measurement . . . . . . . 13
2.3.3 BEMF voltage measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.4 DC bus current measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
States of the sensorless BLDC control based on BEMF zero-crossing detection . . . . . . 18
2.4.1 Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.4.2 Start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
2.4.3 Run . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Chapter 3
Software implementation
3.1
3.2
Application specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1.1 Module interconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1.2 Module involvement in the sensorless BLDC software control loop . . . . . . . . . . 22
3.1.3 FlexTimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.1.4 Periodic Interrupt Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1.5 System Integration Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1.6 Analog-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.1.7 Analog Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Software architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.2.1 Application flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2.2 State machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.2.3 Application timing and interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.2.4 Zero-crossing detection processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.2.5 Speed evaluation and control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.2.6 Motor current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.2.7 Automotive Math and Motor Control Library . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0 Draft A
Freescale Semiconductor
3
Chapter 4
Application Control
4.1
4.2
4.3
FreeMASTER tool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
FreeMASTER graphical user interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
4.2.1 Project tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.2.2 Variable watch grid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Motor Control Application Tuning Tool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.3.1 Introduction tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4.3.2 Parameters tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4.3.3 Control loop tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.3.4 Sensorless tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
4.3.5 Output file tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
4.3.6 Application control tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Chapter 5
Hardware Specification
5.1
5.2
Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.2.1 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.2.2 System basis chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.2.3 Local Interconnect Network (LIN) and Controller Area Network (CAN) . . . . . . . 53
5.2.4 OpenSDA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.2.5 3-phase power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
5.2.6 Analog signal conditioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5.2.7 Brake chopper circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
Chapter 6
Acronyms and Definitions
Chapter 7
References
Appendix A
Reference Design Board Schematics
Appendix B
Bill of Materials
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0 Draft A
4
Freescale Semiconductor
Chapter 1
Introduction
This reference manual describes the design of a 3-phase brushless DC (BLDC) motor control drive using
a sensorless algorithm. The design is targeted at automotive applications, such as:
• Heating, ventilation, and air conditioning (HVAC)
• Electric pumps, motor control, and auxiliaries
• Transmission and gearbox
• Doors, window lift, and seat control
The design exhibits the suitability and advantages of the Kinetis KEA128 microcontroller for BLDC motor
control. It serves as an example of a BLDC motor control design using the general-purpose Kinetis EA
series of microcontrollers.
The overall solution is based on the Kinetis KEA128 ARM® Cortex®-M0+ automotive-grade
microcontroller, MC33937A FET pre-driver, and MC33903D system basis chip. This Freescale integrated
circuit eco-system represents a BLDC motor control solution for the 12 V automotive systems.
1.1
System concept
The system is designed to drive a 3-phase BLDC motor. The application meets the following system
concept:
• Targets the Kinetis KEA128 ARM® Cortex®-M0+ automotive microcontroller
• Utilizes the MC33937A FET pre-driver
• Utilizes the MC33903D system basis chip as an MCU voltage regulator and CAN and LIN
communication physical interface
• Incorporates a control technique with:
— Six-step commutation control of a 3-phase BLDC motor
— Position sensing by means of the BEMF (Back Electromotive Force) voltage zero-crossing
detection technique
— Closed-loop speed control
— Motor current limitation
— Alignment and start-up
• Automotive Math and Motor Control Library Set for ARM® Cortex®-M0+ as a set of building
blocks for a control algorithm implementation
• FreeMASTER run-time debugging tool as a graphical control interface (motor start/stop, speed
set-up)
• Motor Control Application Tuning (MCAT) tool for application parameter tuning in run-time
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
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Introduction
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Freescale Semiconductor
Sensorless BLDC Control
Chapter 2
Sensorless BLDC Control
2.1
Overview of the brushless DC motor
The BLDC motor is a rotating electric machine with a classic 3-phase stator similar to an induction motor.
The phases mounted on the stator are connected to form a star or delta connection. The rotor has
surface-mounted permanent magnets. The motor can have more than one pole pair per phase. The number
of pole pairs per phase defines the ratio between the electrical revolution and the mechanical revolution.
C
A
B
Permanent Magnets
Stator
Stator Winding
Shaft
Rotor
Air Gap
Center point
Figure 2-1. BLDC motor – cross-section
The BLDC motor is equivalent to an inverted DC brushed motor, where the magnet rotates while the
conductors remain stationary. In the DC brushed motor, the commutator and brushes reverse the current
polarity in such a way that stator and rotor magnetic fields are perpendicular. However, in the brushless
DC motor, a power transistor (which must be switched in synchronization with the rotor position) performs
the polarity reversal. This process is also known as electronic commutation.
The arrangement of the magnets on the rotor creates a trapezoidal back electromotive force (BEMF) shape
when the rotor is spinning. Neglecting the higher-order harmonic terms, the BEMF in the motor phase
(ea,eb,ec) is as indicated in Figure 2-2. Each BEMF has a constant amplitude for 120 electrical degrees,
followed by a 60 electrical degree transition in each half-cycle.
The ideal current waveforms in each phase (ia,ib,ic) need to be quasi-square waveforms of 120 electrical
degrees of conduction angle in each half-cycle. The conduction of current in each phase must coincide with
the flat part of the BEMF waveforms; this guarantees that the developed torque is constant or ripple-free
at all times. In order to align current conduction in each phase with the flat part of the BEMF, the rotor
position must be known.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
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Sensorless BLDC Control
ea
SAT
SAT
SAT
SAT
Phase A
ia
SAB SAB
SBT SBT
SBT
SAB
SAB
eb
Phase B
SBT
ib
SBB SBB
SBB SBB
ec
SCT SCT
Phase C
SCB SCB
0°
30°
60°
90°
SCB
SCB
SCT
SCT
ic
120° 150° 180° 210° 240° 270° 300° 330° 360°
ϕ
Figure 2-2. 3-phase BEMF voltages and phase currents of a BLDC motor
The position of the rotor can be obtained by a position sensor or a sensorless algorithm. Various kinds of
position sensors are used. However, since the rotor is a permanent magnet, it is a very simple matter to
determine where the physical pole edges are using a simple, reliable, and inexpensive Hall effect sensor.
The following techniques are commonly used to estimate rotor position in applications that rely on
sensorless control of a BLDC motor:
• BEMF zero-crossing detection method
• Flux level detection method
• Various kinds of system state observers
• Signal injection methods
From a control perspective, two logical mechanisms must be employed:
• Commutation control, where the phases are energized according to rotor position with the
quasi-square current waveforms.
• Speed/torque control, where the amplitude of the quasi-square current waveform applied to the
phases is controlled to achieve the desired speed/torque performance.
The following sections discuss the concept of the BEMF zero-crossing detection method, as well as the
methods and conditions for its correct evaluation.
2.1.1
Electronic commutation control
The commutation process provides a mechanism to energize phases according to the rotor position with
the quasi-square current waveforms. Since only six discreet outputs per electrical cycle are required (as
shown in Figure 2-2), six semiconductor power switches are sufficient to create quasi-square current
waveforms for the phases. Six semiconductor power switches form a 3-phase power inverter, designed
using IGBT or MOSFET switches. The power for the system is provided by the DC bus voltage UDCB.
The semiconductor switches and diodes are modeled as ideal devices in Figure 2-3.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Freescale Semiconductor
Sensorless BLDC Control
AT
BT
CT
AB
BB
CB
DCB
shunt
IDCB
R
B
L
iB
A
iC
iA
L
L
R
R
C
Figure 2-3. power stage and motor topology
Six-step commutation is a very common method for driving a 3-phase star-connected BLDC motor. In
six-step commutation control, the BLDC motor is operated in a two-phase model. Two phases are
energized while the third phase is disconnected as the space between the magnet poles passes over it and
produces a zero BEMF voltage. Selection of the two energized phases is carried out by a position sensor
or a position observer. Table 2-1 shows the output current waveforms for a 3-phase inverter and the
switching devices that conduct during the six switching intervals per cycle.
Table 2-1. Six-step switching sequence
Switch
closed
Phase current
Rotor
position
Sector
number
0°-60°
0
SAT
SBB
+
–
Off
60°-120°
1
SAT
SCB
+
Off
–
120°-180°
2
SBT
SCB
Off
+
–
180°-240°
3
SBT
SAB
–
+
Off
240°-300°
4
SCT
SAB
–
Off
+
300°-360°
5
SCT
SBB
Off
–
+
Phase A Phase B Phase C
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
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Sensorless BLDC Control
2.1.2
Speed/torque control
Commutation ensures the proper direction of the phase current according to the rotor position of the BLDC
motor, while the motor torque/speed only depends on the amplitude of the quasi-square current waveform.
Continued control of the amplitude of the quasi-square current waveform for each phase of the motor is
ensured by hysteresis or PWM control.
PWM control is commonly used in applications where microcontrollers are employed. The duty cycle for
the PWM modulator is obtained by the speed PI controller. The speed PI controller amplifies the error
between the required and actual speeds, and its output, appropriately scaled, is assigned to the PWM
modulator.
The actual mechanical speed can be calculated as a time derivative of the shaft position ϕmech.
Eqn. 2-1
ω mech
dϕ mech
1 dϕ el 1 Δϕ el
= ------------------ = --- ---------- ≈ --- ----------dt
p dt
p ΔT
Since the shaft travels exactly 1/6 of one electrical revolution (2π in radians) between two commutations,
the above equation can be rewritten to the following form:
Eqn. 2-2
ω mech
360°
----------1 6
1 dϕ el
= --- ---------- = --- -----------p T CM
p dt
360°
360°
1
= --- --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- = --------------------------5
p T ( 0° → 60° ) + T ( 60° → 120° ) + T ( 120° → 180° ) + T ( 180° → 240° ) + T ( 240° → 300° ) + T ( 300° → 360° )
n
p ∑ T CM
n=0
Where:
• p is the number of pole pairs
• TCM is the time between two consecutive commutations
• TCMn is the time between commutations in sector n = 0, 1, 2, 3, 4, 5
• ϕel is the electrical position
2.2
Complementary unipolar PWM modulation technique
There are different methodologies for powering and switching the phases. The unipolar PWM control
technique combines commutation control and torque control. While the state of the switches is determined
by commutation control, the torque is controlled by the applied duty cycle. An application with BLDC
control where the unipolar PWM control technique is employed, benefits from a reduction in the MOSFET
switching losses and an improvement in the system’s EMC robustness.
The unipolar PWM control means that the motor phase sees only the positive polarity of the voltage. To
achieve the unipolar PWM pattern, one phase is in complementary PWM mode while the second phase is
grounded and the third phase stays unpowered, as shown in Figure 2-4. This PWM pattern can be seen
every 60 electrical degrees, and they differ only in phase order. The phase order is determined according
to the shaft position by commutation control.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Freescale Semiconductor
Sensorless BLDC Control
0°
60°
120°
180°
240°
300°
360°
Commutation
Events
SAT
A-off
A-off
SAB
A-off
A-off
SBT
B-off
B-off
SBB
B-off
B-off
SCT
SCB
C-off
C-off
C-off
C-off
ϕ
Figure 2-4. Complementary unipolar PWM switching
For example, in the first cycle, Phase A is powered by the complementary PWM signal while the bottom
transistor of Phase B is grounded and Phase C is unpowered. After the commutation event at 90° electrical
degrees, Phase A is still powered by the complementary PWM signal, Phase B is unpowered, and Phase
C becomes grounded instead.
The control described in this document is based on the complementary/independent unipolar PWM
modulation technique.
The following section explains sensorless position estimation by means of BEMF zero-crossing detection
for commutation control purposes.
2.3
Position estimation based on BEMF zero-crossing detection
Figure 2-2 shows ideal BEMF waveforms (ea, eb, ec) and depicts a commutation event occurring at a
position of 30 electrical degrees after the point where a BEMF zero-crossing arises. The BEMF
zero-crossing happens at a position of 30 electrical degrees after the point of the last commutation event.
Let us assume that the motor is spinning at a constant velocity; in this case, the motor needs the same
amount of time to travel from the position of the last commutation event to a BEMF zero-crossing and
from the BEMF zero-crossing to the following commutation event. In the time domain, a BEMF
zero-crossing is right in the middle of two commutation events. Therefore, the BEMF zero-crossing event,
with help of a timer, can simply be used to estimate the right commutation point as well as the velocity of
the rotor.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Sensorless BLDC Control
2.3.1
BEMF zero-crossing principle
To explain and simulate the idea of BEMF sensing techniques, this document provides a simplified
mathematical model based on the basic circuit topology (see Figure 2-5). The goal of the mathematical
model is to identify dependencies between the measurable motor waveforms and a BEMF zero-crossing.
The BEMF zero-crossing, in turn, helps to identify the commutation event.
DCB
R
B
L
iB
A
iC
iA
L
L
R
R
C
Figure 2-5. Basic BLDC motor circuit topology
The mathematical model is based on the fact that only two phases of a motor are energized and the third
is disconnected. The natural voltage level of the whole model is referenced to half of the DC bus voltage,
which simplifies the mathematical expressions. The mathematical model assumes that the motor phases
are symmetrical (see Figure 2-5).
Eqn. 2-3
uN
⎫
di b
= U DCB – Ri b – L ------- – e b ⎪
UN eb + ea
dt
⎪
- – ---------------⎬, i a = i b ⇒ u N = -----2
2
di a
⎪
u n = Ri a + L ------- – e a
⎪
dt
⎭
For a symmetrical 3-phase motor, the sum of all BEMF voltages is zero, therefore:
Eqn. 2-4
ec + eb + ea = 0 → ec = –( eb – ea )
The unpowered phase has the following voltage equation, since there is no current flowing:
Eqn. 2-5
uN = uC – ec
By substituting Equation 2-3 with Equation 2-4 and Equation 2-5, the phase voltage on the unpowered
phase can be derived as:
Eqn. 2-6
u DCB 3
u c = ------------- + --- e c
2
2
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Sensorless BLDC Control
At the time of the BEMF zero-crossing, the BEMF voltage (ec in this case) is zero as the name implies.
Therefore, by measuring voltage at the unpowered phase (ec) and comparing it to half of the DC bus
voltage, the BEMF zero-crossing can be accurately identified.
2.3.2
BEMF zero-crossing event detection and phase current
measurement
BEMF evaluation
window
Phase voltage
Commutations
time
Commutation Zero-crossing
period
period
Zero-crossing
events
Figure 2-6. BEMF zero-crossing and commutation events, and their relationship to complementary unipolar
PWM switching
The exact position of the rotor can be sensed by measuring the BEMF voltage induced by the rotating
permanent magnet in the unpowered phase.
In Figure 2-6, the blue windows mark the time periods in which the respective phase is unpowered. The
voltage measured in this time window is the BEMF voltage. At the BEMF zero-crossing event, the
permanent magnet is right in front of a coil and the rotor field is positioned 90° versus the stator field. This
event happens in the middle of a commutation period and is marked as the black circles in the blue BEMF
window. At this time, the phase voltage is equal to half of the DC bus voltage, as described in Section 2.3.1,
"BEMF zero-crossing principle". In the case of a constant shaft velocity, the period between two following
zero-crossing events is equal to the commutation period.
Figure 2-7 zooms in closer to one of the PWM cycles. At the top of the figure is the PWM pattern, where
Phase A is controlled by PWM and Phase C is grounded for the entire PWM period. During the PWM On
cycle, the top switch of Phase A is turned on and the bottom switch of Phase C is grounded. Current flows
from the DC bus into Phase A, and back through Phase C and the DC bus shunt resistor. In this cycle, the
center point of the motor shows a voltage level of UDCB/2. The BEMF voltage in the unpowered phase
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
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Sensorless BLDC Control
changes relatively to UDCB/2 in the positive and negative directions, which means that the zero-crossing
is detectable when the phase voltage on the unpowered phase is equal to UDCB/2. Also, the phase current
is measurable on the DC bus shunt.
During the Off cycle of the PWM period, both the Phase A and Phase C bottom switches are on. Therefore,
phase current circulates through Phase A, Phase C, and the two bottom switches back. During this cycle,
the phase current is unable to reach the DC bus shunt resistor and the phase current cannot be measured.
The center point of the motor as well is connected to ground, and the zero-crossing cannot precisely be
measured in that cycle.
SAT
SAT
Phase A
SAB
SAB
B-off
SBT
Phase B
SBB
SCT
Phase C
SCB
On
Off
Off
On
Phase A
B-off
SCT
Off
Phase C
SCB
On
C-off
VDCB
VDCB
C-off
SAT
SBT
SCT
SAT
SBT
SCT
SAB
SBB
SCB
SAB
SBB
SCB
GND
VBEMF
VBEMF
GND
B
C
VDCB
A
B
GND
C
GND
GND
A
GND
Figure 2-7. BEMF zero-crossing detection with complementary unipolar PWM switching
Following on from the discussion above, phase current and BEMF voltage measurements must be
performed in the active phase of the PWM cycle.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Freescale Semiconductor
Sensorless BLDC Control
2.3.3
BEMF voltage measurement
As we learned earlier, the BEMF voltage can only be measured during the active phase of the PWM.
Importantly, this is measured towards the end of the active cycle due to switching noises. In Figure 2-8,
the green marked area shows the window in which the BEMF should be measured.
SAT
On
Off
Off
On
Phase A
SAB
SCT
Off
Phase C
SCB
On
Motor
Phase
Resonance
BEMF
Measurement
Window
Switching
Noise
Figure 2-8. BEMF voltage measurement
It should be noted that, depending on the motor and power stage parameters, the amplitude, period, and
damping of the voltage ringing vary. As a result, it is recommended that the BEMF voltage is measured
close to the end of the window. The time of this sample point also needs to be stored, as it is used to enhance
zero-crossing detection.
TPWM
eT
UDCB / 2
e T-1
TZC
TADC
Figure 2-9. Precise BEMF zero-crossing identification
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
15
Sensorless BLDC Control
If we zoom out again and look at the BEMF voltage cycles (see Figure 2-9), it can be seen that the crossing
of the BEMF voltage and level can take place wherever between two following BEMF voltage
measurements. For accurate position estimation, an exact zero-crossing point has to be identified. This
exact zero-crossing point identification is done by an approximation based on the interpolation of two
following BEMF measurements.
Assuming that the shaft is not accelerating, actual BEMF voltage was measured at time TADC with the
voltage level of eT, and the previous measurement was taken at the time of TADC – TPWM with the voltage
level of eT–1, then the equation to calculate the exact time of the zero-crossing event could be derived as
follows:
Eqn. 2-7
U DCB
U DCB
e T – -------------e T – -------------eT – eT – 1
2
2
----------------------- = ----------------------------- ⇒ T ZC = T ADC – -------------------------- T PWM
T PWM
T ADC – T ZC
eT – eT – 1
This formula is calculated in the commutation period when two following comparisons of the BEMF
voltage to half of the DC bus have the opposite signs.
In order to enhance the accuracy of the zero-crossing event even further, the DC bus voltage and BEMF
voltage need to be measured simultaneously.
2.3.3.1
BEMF voltage measurement limitations
The accuracy of the sensorless BLDC motor control algorithm based on the BEMF voltage measurement
is mostly limited by the precision of the BEMF voltage measured on a non-fed motor’s phase. For
example, the ADC accuracy, precision of the phase voltage sensing circuitry, signal noise, and distortion
caused by the power switching modules, all these factors need to be taken into account. Noise generated
by power switching modules can be eliminated by correctly setting the measurement event to be far away
from the switching edges (PWM to ADC synchronization). There still exists some limitation that cannot
be eliminated, namely the decay or freewheeling period. As soon as the phase is disconnected from the
power by the commutation event, there is still a current flowing through the freewheeling diode. The
conducting freewheeling diode connects the released phase to either a positive or a negative DC bus
voltage. The conduction time depends on the momentary load of the motor. In some circumstances, the
conduction time is so long that it doesn’t allow the detection of BEMF voltage, as represented in
Figure 2-10.
It is important to differentiate between the BEMF voltage generated by the motor and the phase voltage
tied to a positive or negative DC bus voltage during the decay period. For this purpose, a blanking time
period after the commutation event has to be employed. During this period, the BEMF voltage is not
sensed or used for sensorless control. The blanking period duration should reflect the motor, load, and
dynamic application parameters.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
16
Freescale Semiconductor
Sensorless BLDC Control
Commutation
Phase Voltage
PWM Switching
PWM Switching
Commutation
BEMF Zero crosing
t
decay period
TOFF period
Figure 2-10. BEMF decay period
2.3.4
DC bus current measurement
SAT
On
Off
Off
On
Phase A
SAB
ΔI
SCT
Off
Phase C
SCB
On
Average value
of DC bus
current
Phase current
ADC
Sample
Point
DC bus current = phase current
(measurable by DC bus shunt)
DC bus current ≠ phase current
(not measurable by DC bus shunt)
Figure 2-11. DC bus current measurement
As mentioned in Section 2.3.2, "BEMF zero-crossing event detection and phase current measurement", the
DC bus current has to be measured in the active cycle of the PWM period due to the fact that the DC bus
current equals the phase current only in the active cycle, as illustrated in Figure 2-11.
During the active cycle of the PWM period, the phase current is rising. The slope of the rising current is
defined by the motor phase coil inductance; the lower the phase inductance, the steeper the slope of the
rising current.
To obtain the average value of the DC bus current directly, the voltage on the DC bus shunt resistor has to
be measured in the middle of the active PWM cycle.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
17
Sensorless BLDC Control
2.4
States of the sensorless BLDC control based on BEMF
zero-crossing detection
In order to start and run the BLDC motor, the control algorithm has to go through the following states:
• Alignment (initial position setting)
• Start-up (forced commutation or open-loop mode)
• Run (sensorless running with BEMF acquisition and zero-crossing detection)
2.4.1
Alignment
As mentioned previously, the main task for sensorless control of a BLDC motor is position estimation.
Before starting the motor, however, the rotor position is not known. The aim of the alignment state is to
align the rotor to a known position. This known position enables starting the rotation of the shaft in the
desired direction and generating the maximal torque during start-up. During the alignment state, all three
phases are powered in order to get the best performance behavior in either direction of shaft rotation. Phase
C is connected to the positive DC bus voltage and phases A and B are grounded. The alignment time
depends on the mechanical constant of the motor, including load, and also on the applied motor current.
2.4.2
Start-up
In the start-up state, motor commutation is controlled in an open-loop mode without any rotor position
feedback. The commutation period is controlled by an open-loop starting curve. The open-loop start is
required only until the shaft speed is high enough (approximately 5% of nominal motor speed) to produce
an identifiable BEMF voltage.
2.4.3
Run
The block diagram of the run state is represented by Figure 2-12 and includes the BEMF acquisition with
zero-crossing detection in order to control the commutations. The motor speed is estimated based on
zero-crossing time periods. The difference between the demanded and estimated speeds is fed into the
speed PI controller. The output of the speed PI controller is proportional to the voltage to be applied to the
BLDC motor. The motor current is measured and filtered during the BEMF zero-crossing event and used
as feedback into the current controller. The output of the current PI controller limits the output of the speed
PI controller. The limitation of the speed PI controller output protects the motor current from exceeding
the maximal allowed motor current.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
18
Freescale Semiconductor
Sensorless BLDC Control
3-phase
Inverter
Required
Speed
PI
Limitation
Required
DC Bus
Current Limit
Actual
Speed
3-phase
BLDC
Motor
Commutation
Control
Voltage
PI
Actual DC Bus Current
1/T
Measurement
Zero-crossing
Period &
Position
Recognition
Figure 2-12. Speed control with current limitation
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
19
Sensorless BLDC Control
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
20
Freescale Semiconductor
Software implementation
Chapter 3
Software implementation
3.1
Application specification
The sensorless BLDC application is designed to meet the following technical specification:
• Targeted at the “3-phase Sensorless BLDC Motor Control Reference Design using KEA128”
printed circuit board (refer to freescale.com/KEA128BLDCRD)
• 20 kHz PWM output frequency
• 1 ms speed loop sampling period
• 1 ms current loop sampling period
• External voltage dividers used for scaling the DC bus and phase voltages
• Linear interpolation of the ADC samples used for accurate BEMF zero-crossing detection
• MC33937A internal operational amplifier used for DC bus current measurement
• KEA128 voltage comparators with internal DAC used for overcurrent and undervoltage detection
The Kinetis KEA128 microcontroller includes modules such as the FlexTimer (FTM), Analog-to-Digital
Converter (ADC), Analog Comparator (ACMP), and System Integration Module (SIM), suitable for
BLDC motor control applications. These modules are directly interconnected and can be configured to
meet BLDC motor control application requirements. Figure 3-1 shows the KEA128 module
interconnection for a sensorless BLDC motor control application including connection to the MC33937A
pre-driver and 3-phase power stage.
3.1.1
Module interconnection
The modules involved in output actuation, data acquisition, and the synchronization of actuation and
acquisition, form the so-called control loop. This control loop consists of the FTM2, FTM0, ADC and SIM
modules. The control loop is very flexible in operation and can support static, dynamic, or asynchronous
timing. The sensorless BLDC motor control loop is illustrated in Figure 3-1.
Each control loop cycle is started by the FTM2 PWM initialization trigger. The FTM2 generates the PWM
initialization trigger event at the required PWM frequency. The PWM initialization event starts the 8-bit
delay counter in the SIM module. The SIM delay counter serves as a delay block that can schedule a state
variable acquisition sequence relative to the start of the PWM period and within one PWM period.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
21
Software implementation
KEA128
MC33937A
FTM0
SPI
ch0
ch0_output (commutation)
FTM2
trigger1
DC bus voltage
ch0
ch1
ch2
ch3
ch4
ch5
fault0
fault3
DC bus
overcurrent
fault
PWMAT
PA_HS_G
PWMAB
PA_LS_G
PWMBT
PB_HS_G
PWMBB
PA_LS_G
PWMCT
PC_HS_G
PWMCB
PC_LS_G
DC bus
current
DC bus
current
(scaled)
ACMP0
+
DAC
DC bus
undervoltage
fault
M
RSEN
ACMP1
inittrg
DAC
PWM init.
trigger
SIM
8-bit
DELAY
counter
delay_ovf
ADC
DC bus voltage
(scaled)
BEMF_A
ADC HW
trigger
BEMF_B
hw_trg
BEMF_C
Figure 3-1. Module interconnection configuration
3.1.2
Module involvement in the sensorless BLDC software control loop
This section describes the KEA128 internal hardware features that support the measurement of BEMF
voltages and phase current.
Each commutation event gets triggered by the FTM0 channel 0 output signal. The rising edge of the FTM0
channel 0 output signal can be configured to drive the FTM2 trigger 1 input, causing the reset of the FTM2
counter to its initial value. It also generates the FTM2 PWM initialization trigger event starting the
configurable 8-bit SIM delay counter. Once the 8-bit counter overflows to zero, it triggers an ADC
conversion sequence. The sequence consists of the BEMF voltage, DC bus current, and DC bus voltage
conversions. The principle of phase voltage, DC bus current, and DC bus voltage measurement are
described in Section 2.3.3, "BEMF voltage measurement" and Section 2.3.4, "DC bus current
measurement".
The ADC conversion complete interrupt notifies the CPU that the ADC conversion result values are
available for reading and further processing to identify the zero-crossing event. The time of the next
commutation event is then calculated based on the actual zero-crossing period.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Freescale Semiconductor
Software implementation
FTM0
Asynchronous
commutation event
(ch0_output)
PWM counter
reset
FTM2
PWM top
PWM initialization
trigger
SIM
Delay
Delay counter
0
Delay counter
overflow
Measured
BEMF
voltage
ADC
Sample
Point
Measured
DC bus
voltage
ADC
Sample
Point
Measured
DC bus
current
ADC
CPU
ADC conversion
sequence
ADC
Sample
Point
BEMF
DCBI
DCBV
Zero-cross detection
Figure 3-2. Module involvement in the sensorless BLDC software control loop
3.1.3
FlexTimer
To achieve the maximal PWM resolution, the FTM modules are supplied by the Internal Clock Source
(ICS) module output clock (ICSOUTCLK). The ICSOUTCLK frequency can be derived from the internal
RC (IRC) oscillator which is trimmable within the range of 31.25–39.0625 kHz. To obtain the maximum
core clock frequency, the IRC needs to be trimmed to 37.5 kHz. The IRC clock is then processed by the
frequency-locked loop (FLL) provided by the ICS module. The FLL, operating in the FLL engaged
internal mode, locks the frequency to 1280 times the IRC frequency, resulting in the 48 MHz
ICSOUTCLK. To select the ICSOUTCLK as the FTM clock source, the FTMx_SC[CLKS] bit field needs
to be set to 0b01.
3.1.3.1
FTM2
FlexTimer module 2 (FTM2) is built upon a simple timer with a 16-bit counter. It contains an extended set
of features that meet the demands of motor control, including the signed up-counter, dead time insertion
hardware, fault control inputs, enhanced triggering functionality, and initialization and polarity control.
To enable enhanced FlexTimer features, the FTM2 has to be configured to operate without any restrictions
(FTM2_MODE[FTMEN] = 1), and with the enhanced PWM synchronization mode enabled
(FTM2_SYNCONF[SYNCMODE] = 1). The FTM2 module is configured to generate edge-aligned PWM
with frequency of 20 kHz (FTM2_MOD = 2399) on each FTM2 channel output
(FTM2_CnSC[ELSB] = 1, where n = 0, 1, 2, 3, 4, 5). In order to protect the MOSFET devices in the same
inverter leg, dead time is set to approximately 400 ns1 (FTM2_DEADTIME = 19). The FTM2 counter is
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
23
Software implementation
reset to the initial value of 0x0000 (FTM2_CNTIN = 0x0000) with every commutation event
(FTM2_SYNCONF[HWRSTCNT] = 1).
To achieve a unipolar PWM pattern, all PWM channels are configured to operate in complementary PWM
mode with dead time insertion (FTM2_COMBINE[DTENn] = 1, FTM2_COMBINE[COMBINEn] = 1,
FTM2_COMBINE[COMPn] = 1, where n = 0, 1, 2). To match the PWM polarity with the MC33937A
PWM input polarity specification, the even (high-side) channel outputs are set active low
(FTM2_POL[POLn] = 1, where n = 0, 2, 4).
The control of the PWM signals of the grounded and unpowered phase is achieved by the software output
control and output mask feature. The double-buffered registers FTM2_SWOCTRL and
FTM2_OUTMASK are used to control the unipolar PWM pattern. The FTM2_SWCTRL register controls
the PWM output by forcing selected channels into a defined state. The FTM2_OUTMASK register
controls the PWM output by forcing selected channels into an inactive state. The double-buffered values
are applied at each commutation event triggered by the FTM0 output signal rising edge
(FTM2_SYNCONF[HWSOC] = 1, FTM2_SYNCONF[HWOM] = 1,
FTM2_SYNCONF[HWTRIGMODE] = 1, FTM2_SYNC[SYNCHOM] = 1, FTM2_SYNC[TRIG1] = 1,
FTM2_COMBINE[SYNCENn] = 1, where n = 0, 1, 2). Table 3-1 shows the SWOCTRL and OUTMASK
values applied at a commutation event in a particular sector of the six-step commutation sequence.
Table 3-1. Software control and output mask definition in a six-step commutation sequence
1
Sector
FTM2_SWOCTRL
FTM2_OUTMASK
0
0x0808
0x34
1
0x2020
0x1C
2
0x2020
0x13
3
0x0202
0x31
4
0x0202
0x0D
5
0x0808
0x07
Alignment1
0x0A0A
0x05
PWM off
0x0000
0x3F
Alignment vector is set to allow a commutation sequence
starting from sector 0.
To allow the application of the double-buffered values outside the commutation event, the software trigger
based update can be configured (FTM2_SYNCONF[SWSOC] = 1, FTM2_SYNCONF[SWOM] = 1,
FTM2_SYNCONF[SWOC] = 1). The software trigger can be generated by writing 1 to the
FTM2_SYNC[SWSYNC] bit.
The duty cycle of the edge-aligned PWM is controlled by the FTM2_CnV (n = 0, 1, 2, 3, 4, 5) register
values. The even register values are set to zero to generate the leading edge at the start of the PWM cycle.
Odd registers define the occurrence of the trailing edge of the active PWM cycle. The duty cycle can be
set according to Equation 3-1.
1. The dead time insertion can be also controlled by the MC33937A FET pre-driver. In the reference design application, the
MC33937A configured dead time prolongs the dead time generated by the FTM2 to 700 ns.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
24
Freescale Semiconductor
Software implementation
Eqn. 3-1
FTM2_CnV = duty_cycle × FTM2_MOD ,
(n = 1, 3, 5)
To set the loading point of the double-buffered FTM2_CnV register values at the end of the PWM cycle,
the maximum loading point has to be enabled by writing 1 to the FTM2_SYNC[CNTMAX] bit. To enable
a coherent loading of the double-buffered FTM2_CnV register values at the next loading point, 1 needs to
be written in the FTM2_PWMLOAD[LDOK] bit.
The PWM initialization trigger is generated at the start of each PWM cycle to trigger the ADC conversion
(FTM2_EXTRIG[INITTRIGEN] = 1).
The FTM2 is configured to set all the PWM signals to an inactive state under a fault condition indicated
by an active edge detected on fault input 0 or 3 (FTM2_MODE[FAULTM] = 0b10,
FTM2_COMBINE[FAULTENn] = 1, where n = 0, 1, 2; FTM2_FLTCTRL[FAULTnEN], where n = 0, 3).
The FTM2 resumes the PWM generation once the fault conditions are removed and the
FTM2_FMS[FAULTF0] and FTM2_FMS[FAULTF3] flag bits are cleared.
3.1.3.2
FTM0
FlexTimer module 0 (FTM0) is a basic timer that consists of a 16-bit counter. The sensorless BLDC
algorithm employs one timer channel (channel 0) operating in edge-aligned PWM mode.
FTM0 channel 0 serves to schedule and identify the commutation event. The channel output signal is
internally routed to the FTM2 module trigger 1 input in order to perform commutation of the PWM pairs.
The commutation event is scheduled by changing the PWM period (counter module value FTM0_MOD).
When the counter overflows, a rising edge is generated on the channel output and an interrupt is invoked.
The PWM generated by channel 0 has the duty cycle equal to 1 counter tick (FTM0_C0V = 1).
To be able to schedule long commutation periods at low speeds, the FTM0 counter is configured to run at
750 kHz frequency (ICSOUTCLK divided by 64: FTM0_SC[PS] = 0b110, FTM0_SC[CLKS] = 0b01).
3.1.4
Periodic Interrupt Timer
The Periodic Interrupt Timer (PIT) channel 0 is employed to control the speed and motor current in a
software task. PIT channel 0 is configured to generate a periodic interrupt every 1 ms
(PIT_LDVAL0 = 23999, PIT_TCTRL0[TIE] = 1, PIT_TCTRL[TEN] = 1). The PIT counter counts the
bus clock (24 MHz).
3.1.5
System Integration Module
The System Integration Module (SIM) is intended to completely avoid CPU involvement in the timed
acquisition of state variables during the control cycle.
The SIM module contains an 8-bit programmable delay counter. The delay counter is used to delay the
PWM initialization trigger generated by the FTM2 (SIM_SOPT1[ADHWT] = 0b010). The delay counter
is a one-shot counter that starts counting when the PWM initialization trigger arrives and stops counting
when the counter value reaches the programmed modulo value, generating the ADC conversion hardware
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
25
Software implementation
trigger. The delay counter counts the divided bus clock. The bus clock division factor is defined by the
SIM_SOPT0[BUSREF] register settings.
The programmed delay should cover the MC33937A high-side driver turn-on delay, dead time, and motor
phase resonance durations, to schedule the ADC conversion hardware trigger in the BEMF measurement
window as shown in Figure 2-8.
3.1.6
Analog-to-Digital Converter
The Kinetis KEA128 features a single 12-bit Analog-to-Digital Converter (ADC) module. This is a
16-channel multiplexed input successive approximation ADC.
To achieve the shortest possible conversion time, the ADC clock is supplied by the Oscillator (OSC)
module output clock. The OSC module operates in low-power high-frequency range mode using the
external 16 MHz crystal. The ADC is configured to use the OSC output clock (Alternate clock,
ADC_SC3[ADICLK] = 0b10) divided by two (ADC_SC3[ADIV] = 0b01) to obtain the maximal possible
8 MHz ADC internal clock.
The ADC module supports the FIFO operation that allows a flexible conversion sequence definition. The
ADC contains two FIFOs to buffer the analog input channels and the analog results respectively. The FIFO
function is enabled when its depth is set non-zero. In the case of sensorless BLDC motor control, the FIFO
depth is set to 3 (ADC_SC[AFDEP] = 3) to cover the conversion of the BEMF voltage, DC bus current,
and DC bus voltage. To define the conversion sequence, the analog channels corresponding to the BEMF
voltage, DC bus current, and DC bus voltage must be written in the channel FIFO (ADC_SC1[ADCH]) in
order. Once the FIFO is filled, the ADC waits for the software or hardware trigger.
The hardware trigger is enabled by writing 1 to the ADC_SC2[ADTRG] bit. Once the hardware trigger is
generated by the SIM module, the ADC initiates the conversion sequence (ADC_SC4[HTRGME] = 1).
Once all conversions indicated by the analog channel FIFO are complete, the ADC conversion complete
flag is set (ADC_SC1[COCO]) and the ADC conversion complete interrupt is submitted to the CPU
(ADC_SC1[AIEN] = 1).
The ADC conversion complete interrupt service routine is responsible for reading the conversion results
from the result FIFO, by reading the ADC_R register (reading from ADC_R clears the ADC_SC1[COCO]
flag). The results are read from the result FIFO in the same order as the analog channels were written into
the analog channel FIFO. To ensure that the conversion results are not overwritten by a subsequent
conversion, the hardware trigger is masked automatically when the result FIFO is not empty
(ADC_SC5[HTRGMASKSEL] = 1).
After a commutation event, the analog channel FIFO needs to be re-filled to reflect the change in the
BEMF voltage related analog channel.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
26
Freescale Semiconductor
Software implementation
NOTE
As the sampling point position of the BEMF voltage conversion is fixed
relatively to the PWM initialization point (see Figure 3-2), the DC bus
current conversion sampling point position, relative to the center of the
active PWM cycle, varies with the duty cycle. Therefore, a compensation of
the measured DC bus current value needs to be implemented in the software
to obtain the average current value (considering actual DC bus voltage,
motor phase coil inductance, and the sampling point distance from the
center of the active PWM cycle).
At low duty cycles, the measured DC bus current value has to be ignored
(considered zero), as the DC bus current value is measured outside of the
active PWM cycle.
3.1.7
Analog Comparator
The Kinetis KEA128 uses two independent Analog Comparators (ACMP). These are used for the DC bus
overcurrent (ACMP0) and DC bus undervoltage detection (ACMP1). The ACMP0 output drives the fault0
input of the FTM2, while the ACMP1 output drives the fault3 input of the FTM2. This provides CPU
independent protection of the power stage under fault conditions, as described in Section 3.1.3.1, "FTM2".
Each analog comparator contains an internal 6-bit programmable DAC used for setting the comparator
threshold (ACMPx_C1[DACEN] = 1). The DAC uses VDDA as the voltage reference
(ACMPx_C1[DACREF] = 1). The value of the ACMPx_C1[DACREF] bit field can be calculated
according to Equation 3-2.
Eqn. 3-2
64 ⋅ V DAC
ACMP0_C1[DACVAL] = Round ⎛ ------------------------ – 1⎞
⎝ V DDA
⎠
V DDA
V DAC ∈ 〈 --------------, V DDA〉
64
Where:
• VDAC is the desired threshold voltage value
• VREF is the voltage on the VDDA pin
3.2
Software architecture
This section describes the software design of the sensorless BLDC algorithm based on the zero-crossing.
Figure 3-3 shows the conceptual system block diagram.
The application is optimized for Kinetis KEA128 motor control peripherals to achieve the least possible
core involvement in state variable acquisition and output action application. The motor control peripherals
(FTM2, FTM0, SIM, ADC, ACMP0, ACMP1) are internally linked together to work independently from
the core, and to achieve deterministic sampling of analog quantities and precise commutation of the stator
field. The software part of the application consists of different blocks which are described below. The
entire application behavior is controlled from a PC through the FreeMASTER run-time debugging tool.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
27
Software implementation
For further information, see KEA128BLDCRDQSG, 3-phase Sensorless BLDC Motor Control Reference
Design using Kinetis KEA128 Quick Start Guide.
+DCBUS
U
V
W
BLDC
mech
-DCBUS
IDCBUS
MC33937A
- +
FreeMASTER
UART
SPI
6-ch FTM2
inittrg
SIM
hw_trig
ADC (12-bit)
ACMP0
ACMP0
FTM0
Commutation Trigger
Application Control
Duty cycle
Overcurrent Fault
Under-/Overvoltage Fault
Required
Speed (RPM)
Required
Current Limit
Speed
PI Controller
Zero Cross
Detection
Current Limitation
PI Controller
Actual Speed (RPM)
Actual Motor Current
PWM
Modulation
Functions
Current, Torque
Calculation
New Commutation Event
Sector
Zero-Crossing Period
Motor Torque Filtered
KEA128
Figure 3-3. System block diagram
The system block diagram is shown in Figure 3-3. The motor control algorithm blocks utilize the
Automotive Math and Motor Control Library for ARM® Cortex®-M0+ (for more information, refer to
www.freescale.com/AutoMcLib).
The inputs of the control loop are the measured voltages and current on the power stage, in particular the
phase voltages, the DC bus current, and DC bus voltage. The DC bus current is amplified by the current
sense amplifier, which is part of the MC33937A FET pre-driver, and then routed together with the DC bus
voltage and phase voltages to the ADC for measurement acquisition.
From a control perspective, the block diagram can be divided into two logical parts:
• Commutation control, where the phase voltages and DC bus voltage are used to calculate the actual
position of the shaft. According to the identified position, the next commutation event can be
prepared.
• Speed/torque control, where the required shaft velocity is compared to the actual measured speed
and regulated by the PI controller. The output of the speed PI controller is the duty cycle. The duty
cycle is limited by the current PI controller and assigned to the PWM.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Freescale Semiconductor
Software implementation
3.2.1
Application flow
Speed
Alignment
Desired
Speed
Start-up
Vector 3
Start speed in
sensorless
closed-loop
LC
+VDCB
(PWM)
Open-Loop Start
Run
LA
GND
Alignment
Vector
Open-Loop:
Commutation time
calculated based on the
acceleration equation
Closed-Loop:
Commutation time calculated based
on the BEMF zero-crossing period
Start-up
Vector 0
Required speed
Real speed
time
AppInit()
AppAlignment()
AppStart()
Called in main()
(state machine)
AppRun()
AppStop()
AppStopToAlignment()
AppAlignmentToStart()
AppStartToRun()
Transition functions
Figure 3-4. Application state flow
Figure 3-4 explains the different application states. The figure consists of two interconnected parts:
• The speed over time characteristic
• The blocks in the lower part of the picture, which show the states of the application and the
transitions between respective states
The application software has three main states: the alignment state, the open-loop start state, and the run
state. In the run state, the BLDC motor is fully controlled in a closed-loop sensorless mode. After the
initialization of the peripheral modules has completed, the software enters the alignment state. In
alignment state, the rotor position is stabilized into a known position in order to create the same start-up
torque in both directions of rotation. This is achieved by applying a PWM signal to phase C. Phases A
and B are assigned with a duty cycle equal to zero; that is, they are connected to the negative pole of the
DC bus. The value of the duty cycle on phase C depends on the motor inertia and load applied on the shaft.
Such a technique aligns the shaft into position between phase A and B, which is perpendicular to both
start-up flux vectors (vectors 0 and 3) generated by the stator winding, and therefore ensures the same
start-up torque in both directions of rotation. The duration of the alignment state depends on the motor’s
electrical and mechanical constants, the applied current (meaning duty cycle), and the mechanical load.
When the alignment time-out expires, the application software moves to the open-loop start state. At a
very low shaft velocity, the BEMF voltage is too low to reliably detect the zero-crossing. Therefore, the
motor has to be controlled in an open-loop mode for a certain time period. The very first vector generated
by the stator windings needs to be set to a position 90° relative to the position of the flux vector generated
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Software implementation
by magnets mounted on the rotor. The alignment and first start-up vector are shown in Figure 3-4. The
duration of the open-loop start state is defined by the number of open-loop commutations. The number of
open-loop commutations depends on the mechanical time constant of the motor, including load, and also
on the applied voltage (duty cycle). The shaft velocity after an open-loop start-up is approximately 5% of
nominal velocity. At a velocity approximately 5% of nominal velocity, the BEMF voltage is high enough
to reliably detect the zero-crossing.
After a defined number of commutation cycles, the state changes from the open-loop start state to the run
state. From here on, the commutation process based on the BEMF zero-crossing measurement takes place,
and the control enters the closed-loop mode.
3.2.2
State machine
The application state machine is implemented using a one-dimensional array of pointers to state functions,
called AppStateMachine[]. The index of the array specifies the pointer to the related application state
function. The application state machine consists of the following seven states selected using the index
variable appState value. The application states are listed in the Table 3-2. Possible state transitions are
shown in Figure 3-5.
Table 3-2. Application states
AppState
Application
state
0
INIT
The INIT state provides the initial configuration of the PWM duty cycle, ADC external triggering,
and DC bus current offset calibration. The state machine then transitions to the STOP state.
1
CALIB
The CALIB state provides the DC bus current calibration. The state machine then transitions to
ALIGNMENT state.
2
Description
ALIGNMENT In the ALIGNMENT state, the alignment vector is applied to the stator to set the rotor to the defined
position. The duration of the alignment state and the duty cycle applied during the state are
defined by the ALIGN_DURATION and ALIGN_VOLTAGE macro values accessible in the
BLDC_appconfig.h header file. The state machine then transitions to the START state.
3
START
In the START state, the motor commutation is controlled in an open-loop without any rotor position
feedback. The initial commutation period is controlled by the STARTUP_CMT_PER macro value.
Motor acceleration (commutation period multiplier <1) is set by the START_CMT_ACCELER
macro value. The number of commutations in the START state is defined by
STARTUP_CMT_CNT macro value. All macro values are accessible in the BLDC_appconfig.h
header file. The aim of the START state is to achieve an RPM where the zero-crossing event can
be reliably detected (BEMF high enough). Once the defined number of commutations is
performed, the state machine transitions to the RUN state.
4
RUN
In the RUN state, the BLDC motor is controlled in the closed-loop by the sensorless algorithm
(BEMF zero-crossing detection). Speed control and current limitation are performed as described
in Section 3.2.5, "Speed evaluation and control" and Section 3.2.6, "Motor current limitation". The
transition to the INIT state is done by setting the appSwitchState variable to 0.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Software implementation
Table 3-2. Application states (continued)
5
STOP
In the STOP state, the motor is stopped and prepared to start running. Transition to the
ALIGNMENT state is performed once the appSwitchState variable is set to 1 and the freewheeling
counter expires.
6
FAULT
The fault detection function is executed in the main endless loop, detecting DC bus undervoltage,
DC bus overvoltage, DC bus overcurrent, and MC33937A faults. Once any of the faults are
detected, the state machine automatically transitions to the FAULT state. The PWM outputs are
set to the safe state. To exit the FAULT state, all fault sources must be removed and the
faultSwitchClear variable has to be set to 1 to clear the fault latch. The state machine then
automatically transitions to the INIT state.
AppSwitchState = 0
Reset
Peripheral
initialization
INIT
STOP
appSwitchState = 1
CALIB
faultSwitchClear = 1
Fault(s) detected
Fault(s) detected
ALIGNMENT
FAULT
Fault(s) detected
START
Fault(s) detected
RUN
Figure 3-5. Sensorless motor control application state diagram
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Software implementation
3.2.3
Application timing and interrupts
ISR calls
50 μs
ADC conversion time
Commutation period
FTM0 overflow ISR
(Commutation event)
PIT ch0 Time-out ISR
(Speed/Current Control Loop)
Phase voltages
1 ms
ADC Conversion Complete ISR
(Zero-crossing detection)
Figure 3-6. Application timing and interrupts
Figure 3-6 shows the application timing and the associated interrupts used for the commutation,
zero-crossing and speed control. The grey boxes show the executed interrupt routines versus the phase
voltage measurement.
The top row shows the interrupt that is activated when the ADC conversion sequence of BEMF voltage,
DC bus current, and DC bus voltage has been completed. In this interrupt, the FTM0 timer counter value
is saved as a BEMF measurement reference point. The zero-crossing detection algorithm is executed in
each ADC conversion complete interrupt after a commutation event. Once the zero-crossing is found, the
detection algorithm is disabled until the new commutation event occurs.
The second row shows the FTM0 timer counter overflow interrupt generated at the time of the
commutation event. The time between each FTM0 timer counter overflow interrupt is dependent on the
actual speed of the motor. The ADC conversion sequence (ADC analog channel FIFO) is reconfigured to
reflect the change in the phase used for the BEMF voltage sensing.
The last row shows the PIT channel 0 time-out interrupt generated every 1 ms. This interrupt is used for
speed loop control and motor current limitation, executing PI controller functions.
3.2.4
Zero-crossing detection processing
For state variable acquisition and zero-crossing detection processing, the ADC conversion sequence
complete interrupt is used. The interrupt service routine is executed once the conversion sequence
consisting of BEMF voltage, DC bus current, and DC bus current conversion is finished. The ADC
conversion sequence complete interrupt service routine flowchart is shown in Figure 3-7.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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ADC_ISR
Save time of the previous
BEMF measurement
void ADC_ISR(void)
{
timeOldBackEmf = timeBackEmf;
timeBackEmf = FTM0_CNT;
ADCResults.BEMFVoltage = (Frac16)(ADC_R << 3);
ADCResults.DCBIVoltage = (Frac16)(ADC_R << 3) - ADCResults.DCBIOffset;
ADCResults.DCBVVoltage = (Frac16)(ADC_R << 3);
Save time of the actual
BEMF measurement
u_dc_bus_filt = \
(Frac16)(GDFLIB_FilterMA_F16(ADCResults.DCBVVoltage, &Udcb_filt));
Read the conversion
sequence results
bemfVoltage = ADCResults.BEMFVoltage - (u_dc_bus_filt >> 1);
if(duty_cycle > DC_THRESHOLD)
{
torque_filt = (Frac16)(GDFLIB_FilterMA_F16(ADCResults.DCBIVoltage,
&Idcb_filt));
}
else
{
/* Ignore DC bus current measurement at low duty cycles */
torque_filt = (Frac16)(GDFLIB_FilterMA_F16((Frac16)0, &Idcb_filt));
}
Scale the 12-bit results in
into Q1.15 format
Filter DC bus voltage
Calculate the BEMF
voltage
if(driveStatus.B.AfterCMT == 1)
{
if(timeBackEmf > timeZCToff)
{
driveStatus.B.AfterCMT = 0;
}
}
Filter DC bus current
Check TOFF period
...
Figure 3-7. Processing measurements in the ADC conversion sequence complete ISR
Before the ADC conversion sequence complete ISR is executed, the ADC stores the results in the ADC
result FIFO. The ADC conversion results are then read from the FIFO (ADC_R register), scaled into Q1.15
fractional format, and saved into the result structure.
The scaled value of the current sense amplifier bias voltage offset is subtracted from the measured DC bus
current value to obtain the bidirectional DC bus current. A filtering of the DC bus voltage and DC bus
current is provided using the moving average filter functions. The BEMF voltage is then calculated as the
difference between the phase voltage and the half of the DC bus voltage. The BEMF voltage value is a
signed number.
The software checks whether the current decay period has already passed (see Section 2.3.3.1, "BEMF
voltage measurement limitations") to initiate the zero-crossing detection. The current decay period is
called TOFF (variable timeZCToff) in the application implementation (Figure 3-7).
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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...
TOFF elapsed AND
zero-cross not found yet AND
Closed-loop mode
if((driveStatus.B.AfterCMT == 0) &&
(driveStatus.B.NewZC == 0) &&
(driveStatus.B.Sensorless == 1))
{
/* If the Back-EMF voltage is falling, invert Back-EMF
voltage value */
if((ActualCmtSector & 0x01) == 0)
{
bemfVoltage = -bemfVoltage;
}
no
yes
Falling BEMF voltage
/* Rising BEMF voltage zero-crossing detection */
...
Invert BEMF voltage value
/* Save actual Back-EMF voltage */
bemfVoltageOld = bemfVoltage;
driveStatus.B.AdcSaved = 1;
Look for zero-cross
(rising BEMF voltage)
}
}
Save actual BEMF
voltage value
Return from
interrupt
Figure 3-8. BEMF zero-crossing detection control
Where the commutation transient time TOFF has not yet expired (driveStatus.B.AfterCMT = 1), the
zero-crossing calculation will not be performed. The calculation will also not be performed if the
zero-crossing point has already been identified in the current commutation period
(driveStatus.B.NewZC = 1), or if the application is running in open-loop mode
(driveStatus.B.Sensorless = 0).
If the above mentioned conditions are not met, the zero-crossing detection routine will be executed. Based
on the current commutation sector, the BEMF slope direction is checked. If the BEMF slope is negative,
the sign of the calculated value is changed. This operation allows usage of a single BEMF zero-crossing
detection function for a positive slope BEMF in all commutation sectors.
When the zero-crossing position calculation is finished, the BEMF voltage value is stored as the old value
as it will be referenced again in the next PWM cycle.
The flow chart and the code listing in Figure 3-9 describe the zero-crossing detection routine that was
called in the interrupt shown before.
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Look for
zero-cross
BEMF voltage
≥ VDCB / 2
yes
BEMF voltage interpolation
Save the time of current and
previous zero-cross event
no
/* Rising Back-EMF zero-crossing detection */
if(bemfVoltage >= 0)
{
/* Rising interpolation */
delta = bemfVoltage - bemfVoltageOld;
if((driveStatus.B.AdcSaved == 1) && (delta > bemfVoltage))
{
timeBackEmf -= MLIB_Mul(MLIB_Div(bemfVoltage, delta),
(timeBackEmf - timeOldBackEmf));
}
else
{
timeBackEmf -= ((timeBackEmf - timeOldBackEmf) >> 1);
}
lastTimeZC = timeZC;
timeZC = timeBackEmf;
Calculate and save zero-cross
period, filter value
periodZC[ActualCmtSector] = (ftm_mod_old - lastTimeZC) + timeZC;
actualPeriodZC = (actualPeriodZC + \
periodZC[ActualCmtSector]) >> 1;
Calculate and set time of the
next commutation event
NextCmtPeriod = MLIB_Mul(actualPeriodZC, advanceAngle);
FTM0_UPDATE_MOD(timeZC + NextCmtPeriod);
Exit
driveStatus.B.NewZC = 1;
}
Figure 3-9. Zero-crossing detection algorithm
In the case of a negative BEMF voltage (VBEMF < VDCB / 2), the zero-crossing point has not been passed
and the zero-crossing is not detectable. The software exits the zero-crossing detecting routine and leaves
the zero-crossing status bit unchanged (driveStatus.B.NewZC = 0). In the case of a zero or a positive
BEMF voltage (VBEMF ≥ VDCB / 2), the zero-crossing point was reached or passed and Equation 2-7 is
calculated, meaning that the BEMF voltage is divided by the delta of the two measured points and
multiplied by the measured PWM period (BEMF measurement period). After this calculation, the old
zero-crossing time and the new one are saved into the appropriate variables. The zero-crossing period is
then calculated based on the calculated time of zero-crossing and the time of the zero-crossing in the
previous commutation cycle. The zero-crossing period is also filtered to improve reliability.
At the end of the routine, the new commutation time is calculated. Here, some motor characteristics have
to be taken into account. Instead of just adding half of a zero-crossing period to the actual zero-crossing
time, a so-called advance angle factor is taken into account, which actually activates the commutation a
bit earlier than calculated. This is usually a constant and depends on the motor characteristics.
Finally, the zero-crossing status bit is set (driveStatus.B.NewZC = 1), so the zero-crossing detection does
not take place anymore in the current commutation cycle.
3.2.5
Speed evaluation and control
The speed controller in Figure 3-10 is executed in a timer interrupt every 1 ms. First of all, the actual speed
is calculated from all of the last six zero-crossing periods, and this is stored in a scaled format as the actual
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Software implementation
speed. The required speed is fed into the ramp function controlling the motor speed slope. The difference
between the speed ramp function output and actual speed defines the speed error.
In the closed-loop mode, the actual speed error is fed into the PI controller function. Inputs to the PI
controller function include the speed error and the PI controller’s parameters such as the proportional and
integral gain constants. The output of the PI controller is the duty cycle, which is scaled to the PWM
resolution.
At the end of the speed control function, the duty cycle is loaded into the FTM2 module.
Look for
zero-cross
void PIT_CH0_ISR(void)
{
uint8_t i;
actualSpeed = [scaled] 1 /
(sum of all zero-cross periods)
PIT_TFLG0 = PIT_TFLG_TIF_MASK;
/* Clear TOF flag */
if(driveStatus.B.CloseLoop == 1)
{
period6ZC = periodZC[0];
for(i=1;i<6;i++)
{
period6ZC += periodZC[i];
}
In closed-loop mode:
- Calculate speed ramp
- Calculate speed error
- Calculate speed PI controller
- Calculate duty cycle (scale PI
output to 0 - FTM2_MOD)
- Update FTM2_CnV values
with duty cycle (n = 1, 3, 5)
actualSpeed = MLIB_Div(SPEED_SCALE_CONST,period6ZC);
requiredSpeedRamp = \
MLIB_ConvertPU_F16F32(GFLIB_Ramp_F32( \
MLIB_ConvertPU_F32F16(requiredSpeed), &speedRampPrms));
speedErr = requiredSpeedRamp - actualSpeed;
speedPIOut = GFLIB_ControllerPIpAW(speedErr, &speedPIPrms);
duty_cycle = MLIB_Mul(speedPIOut, PWM_MODULO);
Return from
interrupt
/* Update PWM duty cycle */
FTM2_C1V = duty_cycle;
FTM2_C3V = duty_cycle;
FTM2_C5V = duty_cycle;
FTM2_PWMLOAD |= FTM_PWMLOAD_LDOK_MASK;
}
else
{
actualSpeed = 0;
}
}
Figure 3-10. Speed evaluation software flow
3.2.6
Motor current limitation
The current limit controller is located in the same 1 ms timer interrupt as the speed controller because the
inputs and outputs of both controllers are linked together.
When the actual speed has been calculated, the current limit PI controller can be called by feeding it with
the difference between the actual current and the maximum allowed current of the motor. The output of
the PI controller is scaled to the number proportional to the PWM period. After the current PI controller
has calculated its duty cycle, both duty cycle output values are compared to each other.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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If the speed PI controller duty cycle output is higher than the current limit PI controller output, then the
speed PI Controller duty cycle output value is limited to the output value of the current limit PI controller.
Otherwise, the speed PI duty cycle output will be taken as the duty cycle update value. The value of the
duty cycle will be used to update the FTM2 module. At the end, the integral portion values of both the PI
controllers need to be synchronized to avoid one of the controllers increasing its internal value as far as
the upper limit. If the duty cycle was limited to the current PI duty cycle output, then the integral portion
of the current PI controller will be copied into the integral portion of the speed controller, and vice versa.
The above described procedure is also described in Figure 3-11.
PIT CH 0
ISR
void PIT_CH0_ISR(void)
{
uint8_t i;
PIT_TFLG0 = PIT_TFLG_TIF_MASK;
- Calculate current error
- Calculate current PI controller
if(driveStatus.B.CloseLoop == 1)
{
torqueErr = MLIB_SubSat(I_DCB_LIMIT, torque_filt);
currentPIOut = GFLIB_ControllerPIpAW_F16(torqueErr, ¤tPIPrms);
actualSpeed = [scaled] 1 /
(sum of all zero-cross periods)
period6ZC = periodZC[0];
for(i=1;i<6;i++)
{
period6ZC += periodZC[i];
}
- Calculate speed ramp
- Calculate speed error
- Calculate speed PI controller
yes
Current PI output
≥ speed PI output
/* Clear TOF flag */
actualSpeed = MLIB_Div(SPEED_SCALE_CONST,period6ZC);
requiredSpeedRamp = \
MLIB_ConvertPU_F16F32(GFLIB_Ramp_F32( \
MLIB_ConvertPU_F32F16(requiredSpeed), &speedRampPrms));
speedErr = requiredSpeedRamp - actualSpeed;
speedPIOut = GFLIB_ControllerPIpAW(speedErr, &speedPIPrms);
duty_cycle = MLIB_Mul(speedPIOut, PWM_MODULO);
no
if(currentPIOut >= speedPIOut)
{
/* If max torque not achieved, use speed PI output */
currentPIPrms.f32IntegPartK_1 = MLIB_ConvertPU_F32F16(speedPIOut);
currentPIPrms.f16InK_1 = 0;
/* PWM duty cycle update <- speed PI */
duty_cycle = MLIB_Mul(speedPIOut, PWM_MODULO);
driveStatus.B.CurrentLimiting = 0;
}
else
{
/* Limit speed PI output by current PI if max. torque achieved */
speedPIPrms.f32IntegPartK_1 = MLIB_ConvertPU_F32F16(currentPIOut);
speedPIPrms.f16InK_1 = 0;
/* PWM duty cycle update <- current PI */
duty_cycle = MLIB_Mul(currentPIOut, PWM_MODULO);
driveStatus.B.CurrentLimiting = 1;
}
- Calculate duty cycle (scale
speed PI output to
0 - FTM2_MOD)
- Calculate duty cycle (scale
current PI output to
0 - FTM2_MOD)
- Update FTM2_CnV values
with duty cycle (n - 1, 3, 5)
/* Update PWM duty cycle */
FTM2_C1V = duty_cycle;
FTM2_C3V = duty_cycle;
FTM2_C5V = duty_cycle;
FTM2_PWMLOAD |= FTM_PWMLOAD_LDOK_MASK;
Return from
interrupt
}
else
{
actualSpeed = 0;
}
}
Figure 3-11. Speed evaluation and phase current limitation
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Software implementation
3.2.7
Automotive Math and Motor Control Library
The application source code uses the Freescale Automotive Math and Motor Control Library Set for
ARM® Cortex®-M0+ (for further information, refer to www.freescale.com/AutoMCLib) which consists
of the following sub-libraries:
• Mathematical Library (MLIB) – includes basic mathematical functions such as addition,
multiplication, etc.
• General Function Library (GFLIB) – includes basic trigonometric and general mathematical
functions such as sine, cosine, ramp, PI controller, etc.
• General Digital Filters Library (GDFLIB) – includes digital FIR and IIR filters
• General Motor Control Library (GMLIB) – includes standard algorithms used for motor control
such as Clarke/Park transformations, Space Vector Modulation, etc.
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Application Control
Chapter 4
Application Control
4.1
FreeMASTER tool
The FreeMASTER run-time debugging tool is used to control the application and monitor application
variables during run-time. The document 3-phase Sensorless BLDC Motor Control Reference Design
using Kinetis KEA128 Quick start Guide, KEA128BLDCRD contains detailed information on how to set
up the FreeMASTER application in order to control the reference design application.
4.2
FreeMASTER graphical user interface
The FreeMASTER window with an opened application project comprises several panes:
• Project Tree – Provides a logical project tree structure containing the main page, several
oscilloscopes and BEMF voltage recorder.
• Variable Stimulus – Allows you to enable automatic motor speed stimulus for motor speed
response observation.
• Variable Watch Grid – Contains the list of watched variables and provides a simple interface to
start/stop the motor and to set the rotation speed of the motor.
• Detailed View Area – Displays the Motor Control Application Tuning (MCAT) tool GUI by
default. Contents of the detailed view area change based on the selected item in the project tree.
Project Tree
Detailed View
Area
Variable
Stimulus
Variable Watch Grid
Figure 4-1. FreeMASTER window with an application project opened
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Application Control
4.2.1
Project tree
Allows selecting the content of the detailed view area, as follows:
• KEA128_BLDC_Sensorless – displays the MCAT GUI
• Speed Scope – displays the actual/required speeds in the oscilloscope
• DC Bus Voltage Scope – displays the DC bus voltage detail in the oscilloscope
• DC Bus Current Scope – displays the DC bus current detail in the oscilloscope
• DC Bus / Speed Scope – displays the actual/required speeds, DC bus voltage, DC bus current and
filtered DC bus current in three separate oscilloscopes
• Back-EMF Voltage Recorder – displays the variable recorder which allows recording of the
BEMF voltage based on a user trigger
4.2.2
Variable watch grid
The variable watch grid provides a simple interface to start/stop the motor and to set the rotation speed of
the motor by modifying the watched variables according to Table 4-1. For an application control using the
MCAT GUI, please refer to Section 4.3.6, "Application control tab".
Table 4-1. FreeMASTER watched variables
4.3
Variable name
Range
Unit
Editable
Description
requiredSpeed
800 .. 8000
RPM
Yes
Sets the required speed of the motor.
actualSpeed
0 .. 2200
RPM
No
Reflects the actual rotation speed of the motor.
duty_cycle
0 .. 100
%
No
Reflects the actual PWM duty cycle.
appSwitchState
0 .. 1
Boolean
Yes
0 Stop the motor
1 Start the motor
Motor Control Application Tuning Tool
The MCAT is a graphical tool with a friendly environment and intuitive control. As shown in Figure 4-2,
the tool consists of a motor selector bar, tab menu, and workspace. The MCAT tool represents a modular
concept that consists of several sub-modules. Each sub-module represents one tab in the tab menu. The
arrangement of the submodules is flexible according to the needs of the embedded application.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Application Control
Figure 4-2. MCAT – project page
The MCAT tool is part of reference software for a dedicated MCU. Since the tuning tool cannot be used
as a standalone, it is included in the FreeMASTER project by default.
The tool supports output header file generation with the calculated constants required for control
algorithms, and also enables on-line updates of those application control variables selected for tuning, for
example, the control loop, speed ramp, and so forth. The variables are updated by clicking the “Update
Target” button on each control tab.
The set motor parameters can be stored in an internal MCAT file by clicking the “Store Data” button or
the data can be reloaded by clicking the “Reload Data” button.
Each parameter and constant contains a short hint that can be activated on a parameter name mouse focus;
see Figure 4-3 for an example of this hint information.
Figure 4-3. Parameter hint information
The MCAT tool workspace is unique for each tab and a detailed overview of each available tab is provided
in the subsequent sections.
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Application Control
4.3.1
Introduction tab
The introduction tab can be considered as a voluntary tab. It provides a room for describing or introducing
the targeted motor control application, as shown in Figure 4-2.
4.3.2
Parameters tab
The parameters tab is dedicated for entering the input application parameters, as shown in Figure 4-4. It is
a mandatory tab due to its high-level dependency with other tabs. Please take care while filling in an
application parameter into a cell. These parameters are used across the MCAT calculations and incorrectly
filled value in the cells can cause unexpected behavior in an application running on the target. The impact
of each required input is described in Table 4-2. The number of input parameters needed to be filled in
depends on the selected application tuning mode:
• Basic – highly recommended for users who are not experienced enough in motor control theory.
The number of required input parameters is reduced. The mandatory cells are with a white
background while the rest of the input parameters are calculated automatically by the MCAT tool
engine. These parameters are read-only and shadowed.
• Expert – all input parameters are accessible and freely editable by the user. However, their settings
require a certain level of expertise in motor control theory.
NOTE
When switching from the Expert to Basic mode, some parameters are
overridden by the automatically calculated parameter values. Values
previously set in the Expert mode are not retained and need to be reloaded
by changing any editable parameter value and clicking the “Reload Data”
button after switching back to Expert mode.
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Application Control
Figure 4-4. Parameters tab – Expert mode
Table 4-2 shows the list of the MCAT tool input parameters with their units, a brief description, typical
range, and their accessibility status in basic mode.
Table 4-2. Parameters tab parameter list
Parameter
name
Unit
Description
Typical range
Basic mode
accessibility
pp
–
Motor pole-pair number
1 .. 10
Yes
Iph nom
A
Motor nominal phase current
0.5 .. 8
Yes
Uph nom
V
Motor nominal phase voltage
10 .. U DCB max
Yes
Motor nominal mechanical speed
1000 .. 40,000
Yes
N nom
RPM
I max
A
HW board current scale
2 .. 20
Yes
U DCB max
V
HW board DC bus voltage scale
20 .. 450
Yes
I DCB over
A
DC bus overcurrent fault threshold voltage
0.5 .. I max
No
U DBC under
V
DC bus undervoltage fault threshold voltage 0 .. U DCB over
No
U DCB over
V
DC bus overcurrent fault threshold voltage
U DCB under .. U DCB max
No
I DBC limit
A
DC bus current limit of control loop
0.5 .. I max
No
U DBC trip
V
Resistor braking DC bus voltage threshold
U DCB over .. U DCB max
No
Speed scale
> 1.1 * N nom
No
N max
RPM
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
43
Application Control
Table 4-2. Parameters tab parameter list (continued)
ke
V.sec/rad Back-EMF constant
0.0005 .. 0.1
No
PWM freq
Hz
Frequency of PWM output signal
4,000 .. 20,000
No
Align voltage
V
Voltage for mechanical rotor alignment
< U DCB max
No
Align duration
sec
Duration of motor alignment
0.1 .. 5 sec
No
The parameters of the controlled motor can be acquired from the motor data sheet provided by the motor
manufacturer, or by laboratory measurement.
4.3.3
Control loop tab
The control loop tab is designed for speed and torque loop tuning. The torque and speed PI controllers run in
parallel with a common output limitation. The tab contains input parameters for the torque and speed control
loops that are used for the PI controller, the speed ramp, and speed filter constant calculations, as shown in
Figure 4-5.
Figure 4-5. Control loop tab – Expert mode
Table 4-3 shows the list of the speed/torque loop input parameters with their physical units, a brief description,
typical range, and their accessibility status in basic mode.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
44
Freescale Semiconductor
Application Control
Table 4-3. Control loop tab parameter list
Parameter name
Unit
Description
Typical range
Basic mode
accessibility
Sample time
s
Control loop period
0.001 .. 0.01
No
Output limit high
%
Control loop output high limit
Output limit low .. 100
No
Output limit low
%
Control loop output low limit
0 .. Output limit high
No
Inc Up
RPM/s
Speed ramp increment up
100 .. 10,000
Yes
Inc Down
RPM/s
Speed ramp increment down
100 .. 10,000
Yes
Filter order
n
Actual speed moving filter order
1 .. 5
No
2 points
Speed Loop Kp
–
Proportional gain of speed PI controller in
time domain
0.00001 .. 0.1
No
Speed Loop Ki
–
Integral gain of speed PI controller in time
domain
0.00001 .. 0.1
No
Torque Loop Kp
–
Proportional gain of torque PI controller in
time domain
0.00001 .. 0.1
No
Torque Loop Ki
–
Integral gain of torque PI controller in time
domain
0.00001 .. 0.1
No
Clicking the “Update Target” button effects an update of the control loop and speed ramp dedicated
variables in the target using the actual inputs from the tab.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
45
Application Control
4.3.4
Sensorless tab
The sensorless tab enables parameter settings for the BLDC sensorless control algorithm. The tab is
divided into two parts, the left-side fields represent those input parameters required for sensorless
algorithm constant calculation and the right-side represents the read-only calculated constants, as shown
in Figure 4-6.
Figure 4-6. Sensorless tab – Expert mode
Table 4-4 shows the list of the speed loop input parameters with their physical units, a brief description,
typical range, and their accessibility status in basic mode.
Table 4-4. Sensorless tab parameter list
Parameter name
Unit
Timer freq
Hz
Speed min
RPM
Freewheel time
OL speed lim
Description
Typical range
Basic mode
accessibility
Frequency of timer used for 500,000 .. 1,000,000
commutation timing and
period measurement
No
Minimal speed threshold for 5 .. 10% of N nom
sensorless speed control
No
s
Freewheel counter value
0.2 .. 5
No
RPM
Target open-loop speed;
threshold to switch to
closed-loop operation
Speed min + 5% of N nom
No
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
46
Freescale Semiconductor
Application Control
Table 4-4. Sensorless tab parameter list (continued)
Cmt count
–
Commutation number for
open-loop start-up
5 .. 15
No
1st cmt period
s
First commutation period
duration
0.01 .. 0.0583
No
Time off
%
Current decay period in
percentage of actual
commutation period
20 .. 40
No
Integ thr corr.1
%
Back-EMF integration
correction factor
N/A
Yes
1
This parameter value is ignored as the BEMF voltage integration method is not used by the application.
Clicking the “Update Target” button effects an update of the control loop and speed ramp dedicated
variables in the target using the actual inputs from the tab.
4.3.5
Output file tab
The output file tab serves as a preview of the application constants corresponding to the tuned motor
control application, as shown in Figure 4-7.
Figure 4-7. Output file tab – Expert mode
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
47
Application Control
The constants are thematically divided into the groups according to selected control tabs as follows:
• Application scales
• Mechanical alignment
• BLDC control loop
• BLDC sensorless module
• FreeMASTER scale variables
Application tuning modes are not available for this tab.
Click the “Generate Configuration File” button to generate the content of the output file tab. The header
file BLDC_appconfig.h is generated and saved to the default path
KEA128_BLDC_Sensorless\Sources\Config.
4.3.6
Application control tab
The last tab available from the tab menu is the application control tab. The application control page is
based on the graphical components to provide a user friendly control interface.
Figure 4-8. Application control tab
In this view, the most important variables and settings are displayed using a graphical representation. The
fan can be switched on or off by using the “ON/OFF” switch or by changing the appSwitchState variable
value in the Variable Watch Grid. The required speed can be selected in the range from 800 to 8000 RPM
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
48
Freescale Semiconductor
Application Control
either by clicking the speed gauge or by manually changing the requiredSpeed variable value in the
Variable Watch Grid.
Where any fault is detected, it has to be cleared manually by clicking the green “Fault Clear” button or by
setting the faultSwitchClear variable value to 0 in the Variable Watch Grid. Then, the application can be
switched on again. Faults present in the system are signalized by the red fault indicators. Pending faults
are signalized by small red circle indicators next to respective fault indicator.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
49
Application Control
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
50
Freescale Semiconductor
Hardware Specification
Chapter 5
Hardware Specification
5.1
Electrical specification
The electrical characteristics in Table 5-1 apply to operations at 25°C and the application circuit shown in
Appendix A, “Reference Design Board Schematics”.
Table 5-1. Electrical characteristics
Characteristic
Symbol
Min
Typical
Max
Unit
Power Input DC Voltage Range
VBAT
8
12
18
V
Supply Current1
VBAT = 12 V
IBAT
–
56
–
mA
VREF
4.9
5.0
5.1
V
VDCB_DIV
–
5
–
–
0
–
25
V
RSH_DCB
–
10
–
mΩ
ADCB
–
12
–
–
VDCB_OS
-15
–
15
mV
-20.833
0
–
–
20.833
41.667
–
12
–
–
–
0
20.83
–
–
POWER INPUT
ANALOG MEASURMENT
ADC and ACMP0/1 Voltage Reference
DC BUS AND PHASE VOLTAGE SENSING
DC Bus and Phase Voltage Divider Ratio
DC Bus and Phase Voltage Measurement Range
VREF = 5 V
VDCB_RANGE
DC BUS CURRENT SENSE AMPLIFIER (MC33937A)
DC Bus Shunt Resistor
DC Bus Current Sense Amplifier Gain
DC Bus Current Amplifier Input Offset Voltage
DC Bus Current Sense Amplifier Measurement Range
R91 populated, R95 not populated, VREF = 5 V, VDCB_OS = 0
R91 not populated, R95 populated, VREF = 5 V, VDCB_OS = 0
DC Bus Current Sense Amplifier Output Voltage Slope
VREF = 5 V
IDCB_RANGE
A
ΔVO_DCB/ΔIPH
mV/A
DC BUS OVERCURRENT COMPARATOR (MC33937A)
DC Bus Overcurrent Comparator Threshold2
R91 populated, R95 not populated, VREF = 5 V, VDCB_OS = 0
R91 not populated, R95 populated, VREF = 5 V, VDCB_OS = 0
IDCB_OC
A
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
51
Hardware Specification
Table 5-1. Electrical characteristics (continued)
Characteristic
Symbol
Min
Typical
Max
Unit
RSH_PH
–
10
–
mΩ
APH
–
12
–
–
VPH_OS
–
0.6
3.2
mV
-20.833
–
20.833
–
12
–
IPH_OC
–
0
–
RBR
–
15
–
Ω
PR_BR
3
–
–
W
PHASE CURRENT SENSE AMPLIFIERS (AD8648)
Phase Shunt Resistor
DC Bus and Phase Current Sense Amplifier Gain
Input Offset Voltage
Phase Current Measurement Range
VREF = 5 V, VPH_OS = 0
Output Voltage Slope
VREF = 5 V
IPH_RANGE
A
ΔVO_PH/ΔIPH
mV/A
PHASE OVERCURRENT COMPARATOR (NCV2903)
Phase Overcurrent Comparator Threshold2
VREF = 5 V, VPH_OS = 0
A
BRAKE RESISTOR
Recommended Brake Resistor3
Recommended Power Rating
1
Application in Stop state.
Configurable by the R75/R80 voltage divider.
3 Requires J13 (brake resistor terminal), Q9, R57, and R58 to be populated.
2
5.2
5.2.1
Functional description
Power supply
The reference design board is designed to be supplied by the voltage VBAT using the input FASTON
terminals J11 (VBAT) and J12 (GND). The board power supply is reverse battery protected.
The power stage DC bus voltage is directly supplied from VBAT and is reverse battery protected.
The MC33903D system basis chip linear regulator provides the 5 V voltage (VDD) for on-board circuitry.
Presence of the VDD voltage is monitored by LED D7. The VDD voltage is then split into:
• 5 V voltage supplying the KEA128 MCU and on-board digital circuitry
• 5 V voltage providing the supply voltage and reference voltage to analog peripherals of the
KEA128 MCU and the supply voltage to the on-board analog circuitry
5.2.2
System basis chip
The MC33903D system basis chip (SBC) integrates a 5 V linear voltage regulator and LIN and CAN
physical layer interfaces. As the SBC includes safety features such as the watchdog, supply voltage
monitoring, VDD voltage level monitoring, VDD linear voltage regulator temperature monitoring, the
behavior of the SBC in the Fail-safe mode needs to be configured. The SBC Fail-safe mode is configurable
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Freescale Semiconductor
Hardware Specification
by the jumper array J6. The SBC Fail-safe mode A is enabled by default. In this mode, the VDD regulator
remains ON under fault conditions, retaining power for the KEA128 and remaining on-board circuitry. For
more information, refer to MC33903/4/5 Data Sheet, MC33903_4_5.
Table 5-2. J6 jumper array description
Position
5.2.3
Description
1-2
MC33903D Debug mode enable.
3-4
MC33903D Fail-safe mode A enable.
5-6
MC33905D/KEA128 RESET signal interconnection enable.
Default setting
Open
Closed
Open
Local Interconnect Network (LIN) and Controller Area Network
(CAN)
The MC33903D LIN transceiver #1 is used as the on-board LIN physical interface hardware. The LIN
node is configured in slave mode by default. To configure it to master mode, D9 and R45 have to be
assembled (see Appendix B, “Bill of Materials” for component part numbers).
Similarly, the MC33903D CAN transceiver is used as the CAN physical interface hardware. The default
120 Ω node termination is enabled by the assembled R42, R43 resistors.
The connector J7 includes both the LIN and CAN signals. Table 5-3 summarizes J7 header pin-out.
Table 5-3. J7 signal description
Pin
Signal name
Description
Direction
1
CAN_LO
CAN bus H
Differential bidirectional
2
GND
Ground
–
3
CAN_HI
CAN bus L
Differential bidirectional
4
LIN
LIN bus
Digital bidirectional
5
GND
Ground
–
6
VSUP
Reverse battery protected VBAT line
–
5.2.4
OpenSDA
OpenSDA is an open-standard serial and debug adapter. It bridges serial and debug communications
between a USB host and an embedded target processor. The hardware circuit is based on a Freescale
Kinetis K20 family microcontroller (MCU) with 128 KB of embedded flash memory and an integrated
USB controller. OpenSDA features a mass storage device (MSD) bootloader, which provides a quick and
easy mechanism for loading different OpenSDA applications such as flash programmers, run-control
debug interfaces, serial-to-USB converters, among others. Two or more OpenSDA applications can run
simultaneously. The run-control debug application and serial-to-USB converter run in parallel to provide
a virtual COM communication interface while allowing code debugging via OpenSDA with just single
USB connection. See the OpenSDA User’s Guide, OSDAUG, for more details.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
53
Hardware Specification
OpenSDA is managed by a Kinetis K20 MCU built on the ARM Cortex-M4 core. The OpenSDA circuit
includes a status LED (D3) and a reset push-button (SW4). The push-button asserts the RESET signal to
the KEA128 target MCU. It can also be used to place the OpenSDA circuit into Bootloader mode, by
holding down the RESET push-button while plugging the USB cable into USB connector J2. Once the
OpenSDA enters bootloader mode, other OpenSDA applications such as a debug application can be
programmed.
SPI and GPIO signals provide an interface to the SWD debug port of the KEA128. Additionally, signal
connections are available to implement a UART serial channel. The OpenSDA circuit receives power
when the USB connector J6 is plugged into a USB host.
5.2.4.1
Debugging interface
Signals with SPI and GPIO capability are used to connect directly to the SWD of the KEA128. These
signals are also brought out to a standard 10-pin (0.05”) Cortex Debug connector (J1) (see Appendix A,
“Reference Design Board Schematics”).
Table 5-4. J1 signal description
Pin
Signal name
Description
Direction
1
5V_MCU
+5 V supply voltage
–
2
SWD_DIO_TGTMCU
Serial Wire Debug Data Input/Output
Bidirectional
3
GND
Ground
–
4
SWD_CLK_TGTMCU
Serial Wire Debug Clock
Input
5
GND
Ground
–
6–9
–
Not connected
–
10
/RESET
MCU Reset
Bidirectional
5.2.4.2
Virtual serial port
A serial port connection is available between the OpenSDA MCU and UART pin PTI0 (UART2_RX) and
PTI1 (UART2_TX) of the KEA128. Several of the default OpenSDA applications provided by Freescale,
including the MSD Flash Programmer and the P&E Debug Application, provide a USB Communications
Device Class (CDC) interface that bridges serial communications between the USB host and this serial
interface on the KEA128.
5.2.5
3-phase power stage
The power stage is configured as a 3-phase power bridge with MOSFET output transistors. It is simplified
considerably by an integrated gate driver that has several safety features. A Freescale MC33937A
pre-driver provides a supply voltage for the low- and high-side MOSFET gates. It integrates an
undervoltage hold-off, desaturation, phase comparators, and overcurrent protection circuits. The dead time
insertion can be configured using SPI. The low- and high-side drivers are capable of providing a typical
current of 1 A. This gate drive current may be limited by an external resistor to achieve a good trade-off
between the efficiency and EMC compliance of the application.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
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Freescale Semiconductor
Hardware Specification
The motor can be connected to the motor phase FASTON terminals J8 (phase A), J9 (phase B), and J10
(phase C).
5.2.6
Analog signal conditioning
This section describes the analog signal conditioning provided by the on-board circuitry.
5.2.6.1
DC bus and phase voltage dividers
The DC bus voltage and phase voltages are divided by the resistor dividers with the divider ratio of
VDCB_DIV. This allows DC bus and phase voltage measurements in range of VDCB_RANGE (see Table 5-1
for actual values). The outputs of the resistor dividers are fed to the KEA128 analog input pins as listed in
Table 5-5.
Table 5-5. DC bus and phase voltages – MCU connection
Signal name
MCU pin(s)
DCBV
PTB4/ACMP1_IN2
PTC3/ADC0_SE11
BEMF_A
PTB2/ADC0_SE6
Phase A voltage / phase A BEMF voltage.
BEMF_B
PTB3/ADC0_SE7
Phase B voltage / phase B BEMF voltage.
BEMF_C
PTF4/ADC0_SE12
Phase C voltage / phase C BEMF voltage.
5.2.6.2
Description
DC bus voltage.
DC bus current sense amplifier
The MC33937A FET pre-driver integrated current sense amplifier is used as a DC bus current-to-voltage
converter. The amplifier behaves as a differential amplifier, amplifying the voltage drop on the DC bus
shunt resistor. The amplifier gain is set to ADCB providing a DC bus current measurement in the range of
IDCB_RANGE (see Table 5-1 for actual values). Default hardware configuration provides measurement of
the bidirectional DC bus current (a bias voltage of VREF/2 is applied to the positive input of the amplifier
by default). The output of the current sense amplifier is fed to pin PTA1/ADC0_SE0/ACMP0_IN1 of the
KEA128.
5.2.6.3
DC bus overcurrent comparator
The MC33927A FET pre-driver integrated overcurrent comparator can be used for DC bus overcurrent
detection. The comparator compares the current sense amplifier output voltage with the voltage on the
OC_TH pin. Once output voltage of the current sense amplifier is greater than the voltage on the pin
OC_TH, the overcurrent condition is signalized by high voltage level on the OC_OUT output pin
connected to the PTE7/KBI1_P7 input pin of the KEA128. The overcurrent threshold can be defined by
the R75/R80 divider ratio according to Equation 5-1 or Equation 5-2 (positive current only).
Eqn. 5-1
I DCB_OC ⋅ R SH_DCB ⋅ A DCB
R 80
---------------------- = -------------------------------------------------------------------- + 0.5, (R91 populated, R95 not populated)
R 75 + R 80
V REF
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
55
Hardware Specification
Eqn. 5-2
I DCB_OC ⋅ R SH_DCB ⋅ A DCB
R 80
---------------------- = -------------------------------------------------------------------- , (R91 not populated, R5 populated)
R 75 + R 80
V REF
The reference application uses the internal analog comparator ACMP1 of the KEA128 to detect the DC
bus overcurrent. The internal overcurrent comparator of the MC33937A pre-driver represents another
potential solution for DC bus overcurrent detection.
5.2.6.4
Phase current sense amplifiers
To allow current measurement on each of the motor phases, the AD8648 quad operational amplifier can
be used as a phase current-to-voltage converter. All three amplifiers used behave as differential amplifiers,
amplifying the voltage drop on the phase shunt resistor. The amplifier gain is set to APH providing a DC
bus current measurement in the range of IPH_RANGE (see Table 5-1 for actual values). The hardware
configuration provides measurement of the bidirectional DC bus current (a bias voltage of VREF/2 is
applied to the positive input of the amplifier). The output of each phase current sense amplifier is fed to
the KEA128 analog input pin as listed in Table 5-6.
Table 5-6. Phase current signals – MCU connection
Signal name
MCU pin(s)
PH_A_I
PTA1/ACMP0_IN1
Phase A current.
PH_B_I
PTB0/ADC0_SE4
Phase B current.
PH_C_I
PTB1/ADC0_SE5
Phase C current.
5.2.6.5
Description
Phase overcurrent comparators
The MC33937A FET pre-driver integrated overcurrent comparator, along with the dedicated NCV2903
dual analog comparator, can be used for the overcurrent condition detection on each of the motor phases.
The output of the U8D amplifier is fed to the KEA128 internal analog comparator ACMP0 and compared
with the threshold voltage of the internal 8-bit DAC. The ACMP0 comparator threshold can be set
according to Equation 5-3. The output of the ACMP0 is then internally connected to the FTM2 fault0
input.
Eqn. 5-3
64 ⋅ I PH_OC ⋅ R SH_PH ⋅ A PH
ACMP0_C1[DACVAL] = Round ⎛ -------------------------------------------------------------------- + 31⎞
⎝
⎠
V REF
The dual analog comparator U10 compares the outputs of current sense amplifiers U8C (phase B) and U8B
(phase C) with the threshold voltage defined by the R75/R80 divider ratio according to Equation 5-4.
Eqn. 5-4
I PH_OC ⋅ R SH_PH ⋅ A PH
R 80
---------------------- = --------------------------------------------------------- + 0.5
V REF
R 75 + R 80
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
56
Freescale Semiconductor
Hardware Specification
NOTE
To provide consistent overcurrent thresholds across all motor phases, the
R75/R80 resistor divider should be set to obtain the same comparator
threshold voltage level as can be obtained using the internal 8-bit DAC of
the ACMP0.
The output of each particular U10 comparator is fed to the KEA128 analog input pin as listed in Table 5-7.
Table 5-7. Phase overcurrent signals– MCU connection
5.2.7
Signal name
MCU pin(s)
Description
PH_B_OC
PTA6/KBI0_P6
Phase B overcurrent.
PH_C_OC
PTA7/KBI0_P7
Phase C overcurrent.
Brake chopper circuit
The brake chopper circuit is included to control the operation of losing energy from the motor through
regenerative braking to an external brake resistor.
The reference design board features pads for an assembly of a logic level MOSFET transistor, Q9, with a
freewheeling diode, D14. Once assembled, an external brake resistor can be connected through the two pin
connector J13. Refer to Appendix B, “Bill of Materials” for component part numbers.
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
57
Hardware Specification
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
58
Freescale Semiconductor
Acronyms and Definitions
Chapter 6
Acronyms and Definitions
Table 6-1. Acronyms and definitions
Term
Definition
ACMP
Analog Comparator
ADC
Analog-to-Digital Converter
BEMF
Back Electromotive Force
BLDC
Brushless DC Motor
CAN
Controller Area Network
CDC
Communications Device Class
COM
Communication Port
CPU
Central Processing Unit
DAC
Digital-to-Analog Converter
DC
Direct Current
EMC
Electromagnetic Compatibility
FET
Field-Effect Transistor
FIFO
First In, First Out
FLL
Frequency-Locked Loop
FTM
FlexTimer
GPIO
General-Purpose Input/Output
GUI
Graphical User Interface
HVAC
Heating, Ventilation and Air Conditioning
ICS
Internal Clock Source
IGBT
Insulated Gate Bipolar Transistor
ISR
Interrupt Service Routine
LED
Light-Emitting Diode
LIN
Local Interconnect Network
MCAT
Motor Control Application Tuning
MCU
Microcontroller Unit
MOSFET
Metal-Oxide-Semiconductor Field-Effect Transistor
MSD
Mass Storage Device
OSC
Oscillator
PC
Personal Computer
PI
Proportional-Integral
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
59
Acronyms and Definitions
Table 6-1. Acronyms and definitions
Term
Definition
PIT
Periodic Interrupt Timer
PWM
Pulse Width Modulation
SBC
System Basis Chip
SIM
System Integration Module
SPI
Serial Peripheral Interface
SWD
Single Wire Debug
UART
Universal Asynchronous Receiver/Transmitter
USB
Universal Serial Bus
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
60
Freescale Semiconductor
References
Chapter 7
References
Table 7-1. Reference list
Document Number
Title
Availability
KEA128RM
KEA128 Sub-Family Reference Manual
freescale.com
SKEA128P80M48SF0
KEA128 Sub-Family Data Sheet
MC33903_4_5
SBC Gen2 with CAN High Speed and LIN Interface Technical Data
MC33937
Three Phase Field Effect Transistor Pre-driver
KEA128BLDCRD
3-phase Sensorless Motor Control Reference Design using Kinetis
KEA128 Quick Start Guide
freescale.com/KEA128BLDCRD
–
3-phase Sensorless Motor Control Reference Design using Kinetis
KEA128
freescale.com/KEA128BLDCRD
–
Automotive Math and Motor Control Library Set for ARM®
Cortex®-M0+
freescale.com/AutoMCLib
–
FreeMASTER Run-time Debugging Tool
freescale.com/FREEMASTER
–
Motor Control Application Tuning Tool
freescale.com/MCAT
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
61
References
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
62
Freescale Semiconductor
Reference Design Board Schematics
Appendix A
Reference Design Board Schematics
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
63
64
A
3
2
Document Number
Tuesday, May 20, 2014
Size
A3
Date:
Approved:
J. KRAMOLIS
FCP: ____
FIUO:
1
Sheet
1
SCH-28289 PDF: SPF-28289
TITLE PAGE
Page Title:
Drawn by:
B. ZUCZEK
XSKEAZ128REFDES
Drawing Title:
Designer:
B. ZUCZEK
ICAP Classification:
of
6
Rev
C
____ PUBI: X
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale and shall not be used for engineering design,
procurement or manufacture in whole or in part without the express written permission of Freescale.
A
B
B
Automotive Product Group
1
C
4
2
C
5
3
D
TITLE PAGE
MCU
DEBUG INTERFACE
SUPPLY
POWER BRIDGE
MOSFET DRIVERS / VI SENSING
4
D
01
02
03
04
05
06
5
Table of Contents
Reference Design Board Schematics
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
A
B
C
D
5
{pg4,6} MC33937A_SCK
{pg4,6} MC33937A_SI
{pg4,6} MC33937A_SO
{pg6} MC33937A_OC
{pg4,6} SBC_SCK
{pg4,6} SBC_MOSI
{pg4,6} SBC_MISO
{pg6} AN_SW
{pg6} MC33937A_EN
{pg4} SBC_INT
{pg3} SWD_CLK_TGTMCU
{pg4} SBC_CS
{pg4} SBC_CAN_RX
{pg4} SBC_CAN_TX
{pg6} PH_B_I
{pg6} PH_C_I
{pg6} BEMF_A
{pg6} BEMF_B
{pg6} DCBV
{pg5} BRAKE_PWM
{pg6} PH_B_OC
{pg6} PH_C_OC
SWB0
SWB1
DCBV
XTAL
EXTAL
/RESET
XTAL
EXTAL
{pg4} SBC_MUX
{pg6} DCBI/PH_A_I
{pg4} SBC_LIN_RX
{pg4} SBC_LIN_TX
{pg3} SWD_DIO_TGTMCU
76
75
68
67
47
21
20
6
2
1
58
57
56
28
27
26
32
31
25
24
78
77
64
63
42
41
40
39
23
22
14
13
62
61
60
59
80
79
46
45
GND
GND
C4
0.1uF
GND
C3
0.1uF
GND
C2
0.1uF
R8
1.0M
C11
12PF
Y1
16MHZ
C10
12PF
4
PTE0/KBI1_P0/SPI0_SCK/TCLK1/I2C1_SDA
PTE1/KBI1_P1/SPI0_MOSI/I2C1_SCL
PTE2/KBI1_P2/SPI0_MISO/PWT_IN0
PTE3/KBI1_P3/SPI0_PCS
PTE4/KBI1_P4
PTE5/KBI1_P5
PTE6/KBI1_P6
PTE7/KBI1_P7/TCLK2/FTM1_CH1/CAN0_TX
PTD0/KBI0_P24/FTM2_CH2/SPI1_SCK
PTD1/KBI0_P25/FTM2_CH3/SPI1_MOSI
PTD2/KBI0_P26/SPI1_MISO
PTD3/KBI0_P27/SPI1_PCS
PTD4/KBI0_P28
PTD5/KBI0_P29/PWT_IN0
PTD6/KBI0_P30/UART2_RX
PTD7/KBI0_P31/UART2_TX
GND
PTC0/KBI0_P16/FTM2_CH0/ADC0_SE8
PTC1/KBI0_P17/FTM2_CH1/ADC0_SE9
PTC2/ADC0_SE10/KBI0_P18/FTM2_CH2
PTC3/ADC0_SE11/KBI0_P19/FTM2_CH3
PTC4/SWD_CLK/KBI0_P20/RTC_CLKOUT/FTM1_CH0/ACMP0_IN2
PTC5/KBI0_P21/FTM1_CH1/RTC_CLKOUT
PTC6/KBI0_P22/UART1_RX/CAN0_RX
PTC7/KBI0_P23/UART1_TX/CAN0_TX
PTB0/ADC0_SE4/KBI0_P8/UART0_RX/PWT_IN1
PTB1/ADC0_SE5/KBI0_P9/UART0_TX
PTB2/ADC0_SE6/KBI0_P10/SPI0_SCK/FTM0_CH0
PTB3/ADC0_SE7/KBI0_P11/SPI0_MOSI/FTM0_CH1
PTB4/NMI/KBI0_P12/FTM2_CH4/SPI0_MISO/ACMP1_IN2
PTB5/KBI0_P13/FTM2_CH5/SPI0_PCS/ACMP1_OUT
PTB6/XTAL/KBI0_P14/I2C0_SDA
PTB7/EXTAL/KBI0_P15/I2C0_SCL
PTA0/ADC0_SE0/KBI0_P0/FTM0_CH0/I2C0_4WSCLOUT/ACMP0_IN0
PTA1/ADC0_SE1/KBI0_P1/FTM0_CH1/I2C0_4WSDAOUT/ACMP0_IN1
PTA2/KBI0_P2/UART0_RX/I2C0_SDA
PTA3/KBI0_P3/UART0_TX/I2C0_SCL
PTA4/SWD_DIO/KBI0_P4/ACMP0_OUT
PTA5/RESET/KBI0_P5/IRQ/TCLK0
PTA6/ADC0_SE2/KBI0_P6/FTM2_FLT1/ACMP1_IN0
PTA7/ADC0_SE3/KBI0_P7/FTM2_FLT2/ACMP1_IN1
U1
C1
2.2uF
VSS_48
VSS_69
GND
48
69
9
GND
C7
2.2uF
PTG0/KBI1_P16
PTG1/KBI1_P17
PTG2/KBI1_P18
PTG3/KBI1_P19
PTG4/KBI1_P20/FTM2_CH2/SPI1_SCK
PTG5/KBI1_P21/FTM2_CH3/SPI1_MOSI
PTG6/KBI1_P22/FTM2_CH4/SPI1_MISO
PTG7/KBI1_P23/FTM2_CH5/SPI1_PCS
PTF0/KBI1_P8/FTM2_CH0
PTF1/KBI1_P9/FTM2_CH1
PTF2/KBI1_P10/UART1_RX
PTF3/KBI1_P11/UART1_TX
PTF4/ADC0_SE12/KBI1_P12
PTF5/ADC0_SE13/KBI1_P13
PTF6/ADC0_SE14/KBI1_P14
PTF7/ADC0_SE15/KBI1_P15
GND
C5
0.1uF
VDDA
3
GND
3
SKEAZ128MLK4
PTI0/IRQ/UART2_RX
PTI1/IRQ/UART2_TX
PTI2/IRQ
PTI3/IRQ
PTI4/IRQ
PTI5/IRQ
PTI6/IRQ
PTH0/KBI1_P24/FTM2_CH0
PTH1/KBI1_P25/FTM2_CH1
PTH2/KBI1_P26/BUSOUT/FTM1_CH0/CAN0_RX
PTH3/KBI1_P27/I2C1_SDA
PTH4/KBI1_P28/I2C1_SCL
PTH5/KBI1_P29
PTH6/KBI1_P30
PTH7/KBI1_P31/PWT_IN1
VDDA
10
VREFH
8
49
70
VDD_8
VDD_49
VDD_70
VSS/VSSA
12
VREFL
4
17
16
66
65
15
30
29
19
18
7
34
33
5
4
3
74
73
72
71
53
52
51
50
55
54
44
43
38
37
36
35
SW_RUN_R
SW_RUN_L
RX_TGTMCU {pg3}
TX_TGTMCU {pg3}
MC33937A_CS {pg6}
MC33937A_INT {pg6}
MC33937A_RST {pg6}
LED0_GRN
LED0_RED
PWMB_HS {pg6}
PWMB_LS {pg6}
PWMC_HS {pg6}
PWMC_LS {pg6}
BEMF_C {pg6}
PWMA_HS {pg6}
PWMA_LS {pg6}
2
A
B
2
KEAZ
3
2
1
SW_RUN_R
R2
4.7K
GND
1
3
5
7
9
J1
2
4
6
8
10
GND
R6
1K
Automotive Product Group
D18
HSMG-C170
R7
1K
5V_MCU
INDICATORS
GND
SW4
GND
SW1
R4
4.7K
/RESET {pg3,4}
D1
HSMA_C170
R5
1K
5V_MCU
GND
SW2
R3
4.7K
5V_MCU
SWB1
SWB0
C9
0.1uF
DNP
D2
HSMS-C170
/RESET
SWD_DIO_TGTMCU
SWD_CLK_TGTMCU
JTAG / SWD CONNECTOR
GND
R1
4.7K
1
2
Document Number
Tuesday, May 20, 2014
Size
A3
Date:
Approved:
J. KRAMOLIS
FCP: ____
FIUO:
1
Sheet
2
SCH-28289 PDF: SPF-28289
of
6
Rev
C
____ PUBI: X
MCU / CONTROLS / INDICATORS / DEBUG
Page Title:
Drawn by:
B. ZUCZEK
XSKEAZ128REFDES
Drawing Title:
Designer:
B. ZUCZEK
ICAP Classification:
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale and shall not be used for engineering design,
procurement or manufacture in whole or in part without the express written permission of Freescale.
GND
C8
0.1uF
5V_MCU
SW3
SW_RUN_L
5V_MCU
APPLICATION CONTROLS
A
C
LED0_RED
11
2
1
A
C
2
1
5V_MCU
1
2
A
C
LED0_GRN
Freescale Semiconductor
1
5
A
B
C
D
Reference Design Board Schematics
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
65
A
B
C
S1
S3
GND
12
GND
74AHCT125
U5D
R109
4.7K
5V_MCU
GND
C24
0.1uF
VOUT33_K20
GND
11
L2
1000OHM
5
4
3
2
1
5
1
3
5
7
9
GND
J3
GND
U3
USB_VBUS
USB_VBUS_SWD
USB_DN_SWD
1000OHM
L1
4.7K
R110
SWD_CLK
SWD_EN
9
2
3
74AHCT125
U5C
GND
8
R26 0
R25 0
GND
C26
0.1uF
74AHCT125
GND
U5A
VCC
5V_MCU
JTAG_TMS_SI
JTAG_TCLK_SI
JTAG_TDO_SI
JTAG_TDI_SI
K20_RESET_SWD
R22
12.0K
GND
R18
12.0K
GND
33
2
19
10
9
6
5
4
3
11
8
7
1
4
{pg2} TX_TGTMCU
SWD_SOUT
SWD_OE_B
5
{pg2} SWD_DIO_TGTMCU
SWD_CLK_TGTMCU {pg2}
RX_TGTMCU {pg2}
ADC0_SE8/TSI0_CH0/PTB0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA
ADC0_SE9/TSI0_CH6/PTB1/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB
EXTAL/PTA18/FTM0_FLT2/FTM_CLKIN0
XTAL/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1
JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/PTA0/UART0_CTS/UART0_COL/FTM0_CH5
JTAG_TDI/EZP_DI/TSI0_CH2/PTA1/UART0_RX/FTM0_CH6
JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/PTA2/UART0_TX/FTM0_CH7
JTAG_TMS/SWD_DIO/TSI0_CH4/PTA3/UART0_RTS/FTM0_CH0
NMI/EZP_CS/TSI0_CH5/PTA4/FTM0_CH1
3
74AHCT125
U5B
6
R27
R24
0
0
3
GND
7
5
1
2
74LVC2G125
2OE
2A
1OE
1A
U6
GND
2Y 3
1Y 6
VOUT33_K20
29
30
31
32
SWD_SIN
2
LED_SI
C
D3
R19
R20
R21
R23
1K
HSMG-C170
A
R12
12.0K
SWD_CLK
SWD_SOUT
SWD_SIN
VOUT33_K20
0
0
0
R10
12.0K
VOUT33_K20
R15
4.7K
VOUT33_K20
6
4
5
OE
A2
A1
U4
1
8
GND
NTS0102
B2
B1
VOUT33_K20 5V_MCU
/RESET {pg2,4}
GND
C20
0.1uF
GND
2
Automotive Product Group
GND
R16
4.7K
X1
8.00MHZ
EXTAL_RES
C19
0.1uF
R11
1.0M
1
FCP: ____
FIUO:
1
Sheet
3
SCH-28289 PDF: SPF-28289
Tuesday, May 20, 2014
Date:
DEBUG INTERFACE
Document Number
Size
A3
Approved:
J. KRAMOLIS
XSKEAZ128REFDES
ICAP Classification:
Page Title:
Drawing Title:
Drawn by:
B. ZUCZEK
Designer:
B. ZUCZEK
of
6
Rev
C
____ PUBI: X
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale and shall not be used for engineering design,
procurement or manufacture in whole or in part without the express written permission of Freescale.
UART1_RX
UART1_TX
SI_SPI0_SCK
SI_SPI0_SOUT
SI_SPI0_SIN
SWD_OE_B
TRESET_OUT
20
21
22
23
24
25
26
27
28
EXTAL_CLK_8MHZ_SWD
XTAL_CLK_8MHZ_SWD
JTAG_TCLK_SI
JTAG_TDI_SI
JTAG_TDO_SI
JTAG_TMS_SI
SWD_EN
2
17
18
12
13
14
15
16
UART1_RX
GND
C25
0.1uF
PTD4/SPI0_PCS1/UART0_RTS/FTM0_CH4/EWM_IN
ADC0_SE6B/PTD5/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/EWM_OUT
ADC0_SE7b/PTD6/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0
PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1
ADC0_SE15/TSI0_CH14/PTC1/SPI0_PCS3/UART1_RTS/FTM0_CH0/I2S0_TXD0
ADC0_SE4B/CMP1_IN0/TSI0_CH15/PTC2/SPI0_PCS2/UART1_CTS/FTM0_CH1/I2S0_TX_FS
CMP1_IN1/PTC3/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUT/I2S0_TX_BCLK
PTC4/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT
PTC5/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUT
CMP0_IN0/PTC6/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLK
CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS
MK20DX128VFM5
EPAD
VSS1
RESET
EXTAL32
XTAL32
VREGIN
VOUT33
USB0_DM
USB0_DP
VBAT
VSSA
VDDA
VDD1
U2
TARGET MCU INTERFACE SIGNALS
C23
4700 PF
DNP
GND
C22
47PF
P5V_USB
VOUT33_K20
GND
C14
0.1uF
K20_RESET_SWD
GND
C21
47PF
USB_K20_DP
R17
6.80K
C13
0.1uF
VOUT33_K20
USB_K20_DN
P5V_USB
R14 33
R13 33
GND
C18
0.1uF
C12
2.2uF
VOUT33_K20
P5V_USB
C15
2.2uF
GND
VOUT33_K20
GSOT05C-GS08
2
UART1_TX
2
4
6
8
10
1
5V
D-
D+
ID
G
S2
S4
13
J2
MICRO USB AB 5
3
3
1
D
7
3
VCCA
DEBUG / SERIAL INTERFACE
1
14
10
VCCB
4
4
8
VCC
GND
4
7
GND
66
2
5
A
B
C
D
Reference Design Board Schematics
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
USB-SHLD
A
B
C
D
GND
VSUP
1
2
4.7K
R30
1
2
12.0K
DNP
R37
2
4
6
5
J7
1
3
5
CAN/LIN
VSUP
D5
MMSZ8V2T1G
VSUP
J12
1
1
C33
0.1uF
GND
GND
GND
SW5
EVQ-PE105K
DNP
12.0K
DNP
D4
C
LIN
0
GND
CAN_HI
CAN_L0
GND
220PF
C44
4700 PF
C43
R42
60.4
C28
47UF
GND
+
VSUP
{pg2,3} /RESET
C39
0.1uF
DNP
SH2
GND
R32
4.7K
PGND
R38
A
MBR230LSFT1G
C27
0.1uF
VBAT
2
4
6
L5
RST
R44
0
1K
DNP
R45
D9
4
MMSD914T1
DNP
C
A
R43
60.4 B82789C0513N002
MASTER OPTION
1
3
5
J6
GND
C35
0.1uF
R28
1K
C42
47PF
SBC_IO_0
13
DBG
17
3
19
4
7
10
8
12
22
5
SAFE
LIN2
LIN-T2/I/O-3
LIN1
LIN-T1/I/O-2
CANH
SPLIT
CANL
IO-0
VSENSE
DBG
SAFE
GND
Close to
Vsup pin
C34
220PF
3
32
VE
2
C
A
2
1
2
3
GND
Q1
MOSI
SCLK
MISO
CS
RST
INT
VDD
U7
MCZ33903CD5EK
TXD-L2
RXD-L2
TXD-L1
RXD-L1
TXD
RXD
5V-CAN
14
16
20
21
30
31
6
11
27
26
28
25
23
24
29
BCP52-16
4
2
MUX-OUT
3
1
2
2
4
GND_CAN
9
VSUP
GND1
GND2
EX_PAD
15
18
33
1
VB
J11
4
1
3
VCAN
GND
0
R34
C40
0.1uF
0
0
R31
R29
GND
C29
10uF
C41
2.2uF
R35
R33
R39
4.7K
DNP
GND
0
0
RST
2
120.0
R36
1000OHM
L4
1000OHM
L3
GND
C32
0.1uF
PGND
{pg2}
GND
R41
1K
D7
HSMG-C170
5V_MCU
Automotive Product Group
PGND
R40
1K
D6
HSMS-C170
5V_MCU
SBC_MUX {pg2}
C37
0.1uF
VDDA
GND
C38
82pF
C36
2.2uF
GND
GND
C31
2.2uF
5V_MCU
1
Tuesday, May 20, 2014
Date:
Approved:
J. KRAMOLIS
FCP: ____
FIUO:
1
Sheet
4
SCH-28289 PDF: SPF-28289
POWER SUPPLY
Document Number
Size
A3
Drawn by:
B. ZUCZEK
XSKEAZ128REFDES
Drawing Title:
Page Title:
Designer:
B. ZUCZEK
ICAP Classification:
of
6
Rev
C
____ PUBI: X
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale and shall not be used for engineering design,
procurement or manufacture in whole or in part without the express written permission of Freescale.
SBC_LIN_TX {pg2}
SBC_LIN_RX {pg2}
SBC_CAN_TX {pg2}
SBC_CAN_RX {pg2}
SBC_MOSI {pg2,6}
SBC_SCK {pg2,6}
SBC_MISO {pg2,6}
SBC_CS {pg2}
SBC_INT {pg2}
2
A
Freescale Semiconductor
C
B
SAFE
E
A
C
C
5
A
B
C
D
Reference Design Board Schematics
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
67
A
B
C
D
{pg2} PGND
3
R52
1.0K
S
PGND
PGND
1
G
Q2
AUIRFR5305
C
A
4
5
D10
MMSZ5248ET1
VBAT
+
C45
220uF
DCB_V_POS
{pg6} PHA_HSG
R46 33
BAS16H
D11
A
0.01
R62
3W MAX
{pg6} PHA_LSG
C
1
R54 33
4
1
{pg6} PHA_HSS
R47 33
4
{pg6} PHA_LSS
DCB_I_POS
{pg6}
4
3
4
3
R48 33
BAS16H
A
{pg6} PHB_LSG
C
OUTPUT TERMINAL
PHA_I_NEG {pg6}
R59
0.01
PHA_I_POS {pg6}
Q6
AUIRFR3607
{pg6} PHB_HSG
Q3
AUIRFR3607
D12
1
PHC_HSS
PHB_HSS
PHA_HSS
{pg6} PHB_LSS
R55 33
3
1
{pg6} PHB_HSS
R49 33
3
4
3
4
2
1
J10
2
1
J9
2
1
J8
3
PHB_I_NEG {pg6}
R60
0.01
PHB_I_POS {pg6}
Q7
AUIRFR3607
{pg6} PHC_HSG
Q4
AUIRFR3607
R50 33
BAS16H
D13
{pg6} PHC_LSG
C
A
1
{pg6} PHC_LSS
R56 33
1
2
{pg6} PHC_HSS
R51 33
2
4
3
4
PHC_I_NEG {pg6}
R61
0.01
PHC_I_POS {pg6}
Q8
AUIRFR3607
Q5
AUIRFR3607
R57 33
DNP
R58
4.7K
DNP
1
D14
DNP
Q9
1702473
DNP
J13
RSR025N05FRA
DNP
2
1
BRAKE RES.
TERMINAL
PGND
Automotive Product Group
{pg2} BRAKE_PWM
1
MBR230LSFT1G
Tuesday, May 20, 2014
Date:
Approved:
J. KRAMOLIS
FCP: ____
FIUO:
1
Sheet
5
SCH-28289 PDF: SPF-28289
POWER BRIDGE
Document Number
Size
A3
Drawn by:
B. ZUCZEK
XSKEAZ128REFDES
Drawing Title:
Page Title:
Designer:
B. ZUCZEK
ICAP Classification:
of
6
Rev
C
____ PUBI: X
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale and shall not be used for engineering design,
procurement or manufacture in whole or in part without the express written permission of Freescale.
3
C
A
D
DCB_I_NEG
{pg6}
3
68
2
5
A
B
C
D
Reference Design Board Schematics
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
A
B
C
D
C59
47UF
D16
R80
12.0K
R75
12.0K
VDDA
OC_TH
GND
C60
0.1uF
MBR230LSFT1G
A
D15
C70
0.1uF
AMP_N
AMP_P
C47
1uF
120.0
R105
3.0K
5
1K
R90
GND
GND
1K
R82
R100
R96
12.0K
GND
PHA_HSS
{pg5} DCB_I_POS
{pg5} DCB_I_NEG
C
12.0K
DNP
12.0K
R95
R91
12.0K
R83
OC_TH
AMP_N
AMP_P
CS
SI
SCLK
SO
PA_LS
PB_LS
PC_LS
PA_HS
PB_HS
PC_HS
RST
EN1
EN2
U9
GND
GND
VREF/2
DCBI
28
25
26
18
19
20
21
13
16
22
12
15
23
5
3
4
C49
0.1uF
PGND
C48
47UF
C80
82pF
BEMF_A {pg2}
R106
3.0K
120.0
R101
R97
12.0K
GND
PHB_HSS
GND
INT
4
24
27
53
52
50
49
33
6
11
10
1
38
37
36
35
43
42
41
40
48
47
46
45
17
VLS_CAP
VLS
4
R107
3.0K
120.0
R102
R98
12.0K
GND
PHC_HSS
C53
0.1uF
C66 0.15UF
C63 0.15UF
DCBI
GND
C61 0.15UF
C52
2.2UF
C55
0.1uF
PHC_LSS {pg5}
PHB_LSS {pg5}
PHA_LSS {pg5}
MC33937A_OC {pg2}
C54
2.2UF
C57
0.1uF
PHC_HSG {pg5}
PHC_HSS {pg5}
PHC_LSG {pg5}
PHB_HSG {pg5}
PHB_HSS {pg5}
PHB_LSG {pg5}
PHA_HSG {pg5}
PHA_HSS {pg5}
PHA_LSG {pg5}
MC33937A_INT {pg2}
C56
2.2uF
3
GND
6
1
3
VCC
5
A
4
120.0
R104
GND
GND
R108
3.0K
120.0
R103
R99
12.0K
DCB_V_POS
GND
C83
82pF
3
DCBV {pg2}
R88
12.0K
VDDA
GND
GND
C78
R92
220PF 12.0K
DCBI/PH_A_I {pg2}
C84
82pF
Close to ADC pin
DC BUS Voltage sensing
5V @ 25V * (3K/(12K+3K))
GND
S
GND
NLVASB3157DFT2G
2
B1
B0
BEMF_C {pg2}
C81
82pF
GND
R112
4.7K
PH_A_I
DCBI
U11
VDDA
DC BUS Current/Phase_A current switch
{pg2} AN_SW
MC33937APEK
AMP_OUT
OC_OUT
NC53
NC52
NC50
NC49
NC33
NC6
PHASEC
PHASEB
PHASEA
PC_BOOT
PC_HS_G
PC_HS_S
PC_LS_G
PB_BOOT
PB_HS_G
PB_HS_S
PB_LS_G
PA_BOOT
PA_HS_G
PA_HS_S
PA_LS_G
BEMF_B {pg2}
C82
82pF
PGND
Back EMF Voltage sensing
AMP_P
C77
47PF
C76
47PF
AMP_N
+
PGND
GND
DC BUS Current Sensing
A = 12K / 1K = 12
Ua = (Idcb * 0.01 * A) + 2.5V
Idcb = <-20.83 .. 20.83> [A]
Ua = <0 .. 5> [V]
{pg2} MC33937A_CS
{pg2,4} MC33937A_SI
{pg2,4} MC33937A_SCK
{pg2,4} MC33937A_SO
{pg2} PWMA_LS
{pg2} PWMB_LS
{pg2} PWMC_LS
{pg2} PWMA_HS
{pg2} PWMB_HS
{pg2} PWMC_HS
{pg2} MC33937A_RST
+
GND
DCB_V_POS
C
A
MBR230LSFT1G
7
8
9
PGND
{pg2} MC33937A_EN
{pg2} PGND
VSS
29
14
32
51
54
30
31
2
44
39
34
GND1
GND2
PGND
PA_LS_S
PB_LS_S
PC_LS_S
VDD
VLS_CAP
VLS
VPWR
EP_PAD
55
PUMP
VPUMP
VSUP
VLS
2 -
3 +
GND
R81
R66
5 +
GND
C74
0.1uF
C73
2.2uF
1K
12.0K
R89
2
12.0K
R77
OC_TH
C79
4700 PF
C75
4700 PF
7
R93
12.0K
R84
1.0M
3
2
5
6
R94
12.0K
R85
1.0M
VREF/2
AD8648WARUZ
U8B
VREF/2
+INA
-INA
+INB
-INB
U10
C69
82pF
PH_C_I {pg2}
PH_B_I {pg2}
PH_C_OC {pg2}
PH_B_OC {pg2}
Inernal pull-up
must be activated in MCU
GND
GND
C65
82pF
Automotive Product Group
GND
NCV2903
1
7
C72
0.1uF
GND
120.0
R74
120.0
R69
Close to ADC pin
C71
2.2uF
OUTA
OUTB
5V_MCU
PH_A_I
1
Date:
FCP: ____
FIUO:
Tuesday, May 20, 2014
1
Sheet
6
SCH-28289 PDF: SPF-28289
MOSFET DRIVERS / VI SENSING
XSKEAZ128REFDES
ICAP Classification:
Document Number
Size
A3
Approved:
J. KRAMOLIS
Drawing Title:
Page Title:
Drawn by:
B. ZUCZEK
Designer:
B. ZUCZEK
of
6
Rev
C
____ PUBI: X
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale and shall not be used for engineering design,
procurement or manufacture in whole or in part without the express written permission of Freescale.
GND
GND
C68
47PF
12.0K
VREF/2
GND
R76
6 -
12.0K
R73
R71
R72
1K
8
VREF/2
AD8648WARUZ
12.0K
C67
47PF
C64
47PF
U8C
1K
R70
GND
9 -
12.0K
R68
1K
14
AD8648WARUZ
U8D
12.0K
R67
10 +
13 -
12 +
R64
12.0K
C62
47PF
C58
47PF
C50
47PF
1K
R65
2
PHASE A/B/C CURRENT SENSING
GND
1K
R63
VAD8648WARUZ
U8A
V+
1
VDDA
{pg5} PHC_I_POS
{pg5} PHC_I_NEG
{pg5} PHB_I_POS
{pg5} PHB_I_NEG
{pg5} PHA_I_POS
{pg5} PHA_I_NEG
4
11
8
GND V+
Freescale Semiconductor
4
5
A
B
C
D
Reference Design Board Schematics
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
69
Reference Design Board Schematics
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
70
Freescale Semiconductor
Bill of Materials
Appendix B
Bill of Materials
Table 7-2. Bill of materials
Item
number
Quantity
Value
1
10
2.2 μF
C1, C7, C12, C15, C31, C36, Murata
C41, C56, C71, C73
GCM188R70J225KE22D
2
29
0.1 μF
C2, C3, C4, C5, C8, C9, C13, Murata
C14, C18, C19, C20, C24,
C25, C26, C27, C32, C33,
C35, C37, C39,C40, C49,
C53, C55, C57, C60, C70,
C72, C74
GCM188R71H104KA57D
3
2
12 pF
C10, C11
AVX
06033A120KAT2A
4
11
47 pF
C21, C22, C42, C50, C58,
C62, C64, C67, C68, C76,
C77
AVX
06035U470KAT2A
5
2
4700 pF
C23, C43, C75, C79
AVX
06035C472JAT2A
6
3
47 μF
C28, C48, C59
Panasonic
EEEFK1H470XP
7
1
10 μF
C29
TDK
CGA4J1X7R0J106K125AC
8
3
220 pF
C34, C44, C78
Kemet
C0603C221K5RAC
9
8
82 pF
C38, C65, C69,C80, C81,
C82, C83, C84
Kemet
C0603C820K5GACTU
10
1
220 μF
C45
Panasonic
EEEFK1H221P
11
1
1.0 μF
C47
Murata
GCM21BR71H105KA03
12
2
2.2 μF
C52, C54
Capax Technologies, Inc.
0805X225J500SNT
13
3
0.15 μF
C61, C63, C66
Venkel Ltd.
C0805X7R250-154KNE
14
1
–
D1
Avago Technologies
HSMA-C170
15
2
–
D2, D6
Avago Technologies
HSMS-C170
16
3
–
D3, D7, D18
Avago Technologies
HSMG-C170
17
4
–
D4, D14, D15, D16
ON Semiconductor
MBR230LSFT1G
18
1
–
D5
ON Semiconductor
MMSZ8V2T1G
19
1
–
D9
ON Semiconductor
MMSD914T1G
20
1
–
D10
ON Semiconductor
MMSZ5248BT1G
21
3
–
D11, D12, D13
ON Semiconductor
BAS16HT1G
22
2
–
J1, J3
Samtec
FTS-105-01-F-DV-P-TR
23
1
–
J2
Molex
47589-0001
24
2
–
J6, J7
Samtec
TSM-103-01-S-DV-P-TR
Part reference
Manufacturer
Manufacturer part number
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
71
Bill of Materials
Table 7-2. Bill of materials (continued)
Item
number
Quantity
Value
25
3
–
J8, J9, J10
TE Connectivity Ltd.
928814-1
26
2
–
J11, J12
TE Connectivity Ltd.
63849-1
27
1
–
J13
Phoenix Contact
1702473
28
4
–
L1, L2, L3, L4
Murata
BLM18AG102SH1
29
1
–
L5
Epcos
B82789C0513N002
30
1
–
Q1
NXP Semiconductors
BCP52-16
31
1
–
Q2
International Rectifier
AUIRFR5305
32
6
–
Q3, Q4, Q5, Q6, Q7, Q8
International Rectifier
AUIRFR3607
33
1
–
Q9
ROHM
RSR025N05FRA
34
13
4.7 kΩ
R1, R2, R3, R4, R15, R16,
R30, R32, R39, R58, R109,
R110, R112
Vishay Intertechnology
CRCW06034K70JNEA
35
16
1.0 kΩ
R5, R6, R7, R23, R28, R40,
R41, R45, R63, R65, R67,
R70, R72, R76, R82, R90
ROHM
ESR03EZPF1001
36
3
1.0 MΩ
R8, R84, R85
Walsin Technology Corp.
WR06X1004FTL
37
27
12.0 kΩ
R10, R12, R18, R22, R37,
R38, R64, R66, R68, R71,
R73, R75, R77, R80, R81,
R83, R88, R89, R91, R92,
R93, R94, R95, R96, R97,
R98, R99
KOA Speer
RK73H1JTTD1202F
38
1
1.0 MΩ
R11
Bourns
CR0603-JW-105ELF
39
12
33 Ω
R13, R14, R46, R47, R48,
R49, R50, R51, R54, R55,
R56, R57
Vishay Intertechnology
CRCW060333R0JNEA
40
1
6.8 kΩ
R17
KOA Speer
RK73H1JTTD6801F
41
13
0Ω
R19, R20, R21, R24, R25,
R26, R27, R29, R31, R33,
R34, R35, R44
Vishay Intertechnology
CRCW06030000Z0EA
42
8
120.0 Ω
R36, R69, R74, R100, R101, KOA Speer
R102, R103, R104
RK73H1JTTD1200F
43
2
60.4 Ω
R42, R43
Vishay Intertechnology
CRCW120660R4FKEA
44
1
1.0 kΩ
R52
Bourns
CR1206-JW-102ELF
45
4
0.01 Ω
R59, R60, R61, R62
Bourns
CRA2512-FZ-R010ELF
46
4
3.0 kΩ
R105, R106, R107, R108
KOA Speer
RK73H1JTTD3001F
48
4
–
SW1, SW2, SW4, SW5
Panasonic
EVQPE105K
49
1
–
SW3
C&K Components
JS102011SAQN
Part reference
Manufacturer
Manufacturer part number
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
72
Freescale Semiconductor
Bill of Materials
Table 7-2. Bill of materials (continued)
Item
number
Quantity
Value
50
1
–
U1
Freescale Semiconductor
SKEAZ128MLK4
51
1
–
U2
Freescale Semiconductor
MK20DX128VFM5
52
1
–
U3
Vishay Intertechnology
GSOT05C-GS08
53
1
–
U4
NXP Semiconductors
NTS0102DP
54
1
–
U6
NXP Semiconductors
74LVC2G125DP,125
55
1
–
U7
Freescale Semiconductor
MCZ33903CD5EK
56
1
–
U9
Freescale Semiconductor
MC33937APEK
57
1
–
U10
ON Semiconductor
NCV2903DMR2G
58
1
–
U11
ON Semiconductor
NLVASB3157DFT2G
59
1
–
U5
NXP Semiconductors
74AHCT125PW
60
1
–
U8
Analog Devices
AD8648WARUZ
61
1
–
X1
Murata
CSTCE8M00G55-R0
62
1
–
Y1
TXC Corp.
AA-16.000MALE-T
Part reference
Manufacturer
Manufacturer part number
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
Freescale Semiconductor
73
Bill of Materials
3-phase Sensorless BLDC Motor Control Reference Design Using Kinetis KEA128, Rev. 0
74
Freescale Semiconductor
Freescale Semiconductor
75
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