Freescale Semiconductor Application Note Document Number: AN4340 Rev. 0, 08/2011 Migration and Device Emulation within the MPC560xB/C/D Family The 32-bit MPC560xB/C/D automotive microcontrollers are a family of System-on-Chip (SoC) devices designed to be central to the development of the next generation of central vehicle body controller, smart junction box, front module, peripheral body, door control, and seat control applications. Jointly developed by Freescale Semiconductor and STMicroelectronics™, the MPC560xB/C/D car body family is a series of automotive microcontrollers based on the Power Architecture™ Book E, and are designed specifically for embedded automotive applications. The MPC560xB/C/D family is a highly scalable and compatible family of devices. However, designing an application that can be easily ported across different members of this family requires knowledge of their specific features and of any significant differences between them. This document focuses specifically on migrating applications between two sets of products among the family: © Freescale Semiconductor, Inc., 2011. All rights reserved. Contents 1 2 3 4 5 6 MPC5607B and MPC5604B comparison overview . . . . . 2 List of differences between MPC5607B and MPC5604B 3 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 eMIOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.4 LinFlex . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Packages and pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Migrating from MPC5604B to MPC5607B. . . . . . . . . . . 23 5.1 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.3 LinFlex . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.4 eMIOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Migrating from MPC5607B to MPC5604B. . . . . . . . . . . 24 6.1 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.2 Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.3 Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.4 RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.5 Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.6 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.7 PIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.8 eMIOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.9 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.10 CTU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.11 LINFlex . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.12 DSPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 MPC5607B and MPC5604B comparison overview • • MPC5604B: For sales type MPC5604B/C, MPC5603B/C, and MPC5062B/C MPC5607B: For sales type MPC5607B, MPC5606B, and MPC5605B The set namings refer to the most featured sale type in each set. The following use cases will be addressed: • • 1 Migrating from MPC5604B to MPC5607B Migrating from MPC5607B to the MPC5604B MPC5607B and MPC5604B comparison overview Features of the MPC5604B are, in general, a subset of ones available on the MPC5607B. However, in some cases additional features have been added or enhancements have been made. Thus when designing an application that may be ported between the MPC5607B and the MPC5604B, it is imperative to understand clearly the differences between them. The diagrams in Figure 1 highlight at a high level the key differences between these devices. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 2 Freescale Semiconductor List of differences between MPC5607B and MPC5604B eDMA DMA Mux JTAG Nexus 2+ e200z0 Core CROSSBAR MPU 10-bit ADC 12-bit ADC CTU 96 KB SRAM eMIOS eMIOS IIC 6 SPI 64 KB Data Flash 1.5 MB Code Flash LinFlex with Dma LinFlex with Dma LinFlex LinFlex LinFlex LinFlex LinFlex LinFlex LinFlex LinFlex I/O Bridge 6 FlexCan CAN Sampler SYSTEM 8 PIT SIU INTC BAM Watchdog VReg FMPLL STM & RTC 32 kHz Osc 1.5M JTAG Nexus 2+ e200z0 Core CROSSBAR MPU 10-bit ADC CTU 48 KB SRAM eMIOS eMIOS 3 x SPI LinFlex LinFlex LinFlex LinFlex 64 KB Data Flash 512 KB Code Flash IIC I/O Bridge 6 FlexCan CAN Sampler SYSTEM 6 PIT SIU INTC BAM Watchdog VReg FMPLL STM & RTC 32 kHz Osc 512K Key: Common to both devices Only available on highlighted device Differences in module implementation Figure 1. MPC5607B and MPC5604B comparison overview 2 List of differences between MPC5607B and MPC5604B 2.1 Introduction For an overview of general differences between member of the MPC560xB/C/D Car Body device family, please refer to “MPC560xB/C/D family — Product Differences”. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 3 List of differences between MPC5607B and MPC5604B The sections hereafter describe in more detail the specific differences between MPC5607B and MPC5604B that the user must be aware of when porting applications between these devices. 2.2 ADC MPC5607B implementation of ADC is the following: • • One 12-bit ADC with: — Sixteen high-precision “ADC1_P” channels; pins shared with ADC 10-bit — Eight normal “ADC1_S” channels; three pins shared with ADC 10-bit — PIT6 injection trigger — Three analog thresholds One 10-bit ADC with: — Sixteen high precision “ADC0_P” channels; pins shared with ADC 12-bit — Twenty-eight normal “ADC0_S” channels; three pins shared with ADC 12-bit — Four normal “ADC0_X”channels that can be entries for external multiplexing for up to thirty-two external channels — PIT2 injection trigger — Six analog thresholds Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 4 Freescale Semiconductor List of differences between MPC5607B and MPC5604B MUX 8 . . . Up to 32 extended channels through external MUX MUX 8 ADC 10-bit system INTC 3 eMIOS_0_0 to Ch0 to eMIOS_0_22 Ch22 trig Analog switch ADC control MUX 32 Digital Interface CTU . . . . . . MA[2:0] ADC0_X[3] ADC0_X[0] Up to 32 channels medium accuracy ADC0_S[27] (3 pins shared with ADC 12b) ADC0_S[0] ADC trigger ADC done eMIOS eMIOS_1_0 to Ch32 to eMIOS_1_22 Ch54 trig D A Injection trigger eMIOS_1_24 to Ch56 to ADC control eMIOS_1_31 Ch63 trig MUX 16 eMIOS_0_24 to Ch24 to eMIOS_0_31 Ch31 trig . . . ADC0_P[15] ADC0_P[0] 16 channels high accuracy (same pins as ADC 12b) ADC 12-bit system ADC trigger Ch55 trig ADC done Digital Interface PIT2 Analog switch MUX 8 PIT7 PIT ADC1_S[7] Ch23 trig . . . Up to 8 channels medium accuracy (3 pins shared with ADC 10b) Injection trigger PIT6 ADC1_S[0] D A INTC MUX 16 PIT3 . . . ADC1_P[15] ADC1_P[0] 16 channels high accuracy (same pins as ADC 10b) Figure 2. ADC implementation of MPC5607B MPC5604B implementation of ADC is the following: • One 10-bit ADC with: — Sixteen high precision “ADC0_P”channels — Sixteen normal “ADC0_S” channels — Four normal “ADC0_X” channels can be entries for external multiplexing for up to thirty-two external channels — PIT2 injection trigger — Four analog thresholds Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 5 List of differences between MPC5607B and MPC5604B MUX 8 . . . Up to 32 extended channels through external MUX MUX 8 ADC 10-bit system INTC 3 CTU ADC control eMIOS_0_23 Ch23 trig eMIOS eMIOS_1_0 to Ch29 to eMIOS_1_23 Ch52 trig Digital Interface Analog switch MUX 20 eMIOS_0_0 to Ch0 to . . . ADC trigger MA[2:0] ADC0_X[3] ADC0_X[0] Up to 20 channels medium accuracy . . . ADC0_S[27] ADC0_S[0] PIT3 PIT D Ch28 trig PIT2 Injection trigger A MUX 16 ADC done . . . ADC0_P[15] ADC0_P[0] 16 channels high accuracy Figure 3. ADC implementation of MPC5604B The results of a conversion are stored in the appropriate result register. Software should account for the effective 2-bit offset of the MSB of the result between 10-bit ADC results and 12-bit ADC results. In addition, analog threshold handling is different between MPC5607B and MPC5604B: • MPC5604B uses four possible analog threshold ranges. Each single range can be allocated to one single channel. • MPC5607B uses six possible analog threshold ranges (on its 10-bit ADC). A single range can be shared between several ADC channels. The 12-bit ADC follows the same rules with three analog thresholds. The respective sets of registers to handle analog thresholds are different. This is therefore important from a migration perspective (see later in this document). 2.3 eMIOS The eMIOS modules can have channel types shown in Table 1. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 6 Freescale Semiconductor List of differences between MPC5607B and MPC5604B Table 1. eMIOS channel types Channel type Description Name Type X Type Y Type F Type G Type H General purpose input/output GPIO x x x x x Single action input capture SAIC x x x x x Single action output compare SAOC x x x x x Modulus counter MC x — — — — Modulus counter buffered (up/down) MCB x — — x — Input pulse width measurement IPWM — — — x x Input period measurement IPM — — — x x Double action output compare DAOC — — — x x Output pulse width and frequency modulation buffered OPWFMB x — — x — Center-aligned output PWM buffered with dead time OPWMCB — — — x — Output pulse width modulation buffered OPWMB x x — x x Output pulse width modulation trigger OPWMT x x — x x MPC5607B contains two eMIOS modules (eMIOS_0 and eMIOS_1) organized as shown in Figure 4. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 7 List of differences between MPC5607B and MPC5604B eMIOS_0 Counter_bus_A Counter_bus_A Ch17 Ch18 Ch19 Ch20 Ch21 Ch22 Ch23 Counter_bus_E Chan Type_Y Ch9 Ch10 Ch11 Ch12 Ch13 Ch14 Ch15 Counter_bus_D Chan Type_X Ch8 Ch16 Counter_bus_E Ch24 Ch25 Ch26 Ch27 Ch28 Ch29 Ch30 Ch31 Global Prescaler Ch1 Ch2 Ch3 Ch4 Ch5 Ch6 Ch7 Counter_bus_D Ch16 Ch17 Ch18 Ch19 Ch20 Ch21 Ch22 Ch23 Clock Ch0 Bus Interface Counter_bus_C Ch8 Ch9 Ch10 Ch11 Ch12 Ch13 Ch14 Ch15 IP Bus Counter_bus_B Global Prescaler Ch1 Ch2 Ch3 Ch4 Ch5 Ch6 Ch7 Counter_bus_C Clock Bus Interface Counter_bus_B IP Bus eMIOS_1 Ch0 Ch24 Ch25 Ch26 Ch27 Ch28 Ch29 Ch30 Ch31 Chan Type_G Chan Type_H Figure 4. eMIOS Implementation of MPC5607B MPC5604B contains two eMIOS modules (eMIOS_0 and eMIOS_1) organized as shown in Figure 5. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 8 Freescale Semiconductor Packages and pinout eMIOS_0 Counter_bus_A Counter_bus_A Ch17 Ch18 Ch19 Ch20 Ch21 Ch22 Ch23 Counter_bus_E Chan Type_Y Ch9 Ch10 Ch11 Ch12 Ch13 Ch14 Ch15 Counter_bus_D Chan Type_X Ch8 Ch16 Counter_bus_E Ch24 Ch25 Ch26 Ch27 Global Prescaler Ch1 Ch2 Ch3 Ch4 Ch5 Ch6 Ch7 Counter_bus_C Ch17 Ch18 Ch19 Ch20 Ch21 Ch22 Ch23 Clock Ch0 Bus Interface Counter_bus_D Ch16 IP Bus Counter_bus_B Global Prescaler Ch8 Ch9 Ch10 Ch11 Ch12 Ch13 Ch14 Ch15 Counter_bus_C Clock Bus Interface Counter_bus_B IP Bus eMIOS_1 Ch0 Ch1 Ch2 Ch3 Ch4 Ch5 Ch6 Ch7 Ch24 Ch25 Ch26 Ch27 Chan Type_F Chan Type_G Chan Type_H Figure 5. eMIOS implementation of MPC5604B 2.4 LinFlex MPC5607B contains ten LinFlex modules. Two of them are enabled to issue DMA requests: • LinFlex 0 and 1 can issue DMA requests • LinFlex 2 to 9 are not DMA enabled MPC5604B contains four LinFlex modules. None of them are enabled to issue DMA requests. 3 Packages and pinout The differences between the analog and digital functionality multiplexed on the pins of the MPC5607B and MPC5604B devices are summarized in the next tables. Only the 100LQFP and 144LQFP packages have been described since these are the only packages common to both of these devices. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 9 Packages and pinout Key Function unique to MPC5604B Function unique to MPC5607B Function Common to MPC5604B and MPC5607B Table 2. 100LQFP MPC5604B to MPC5607B comparison Alternate I/O functions Pin Pad Alternate input functions ALT0 ALT1 ALT2 ALT3 1 PB[3] WKPU[11] LIN0RX GPIO[19] 2 PC[9] WKPU[13] LIN2RX GPIO[41] 3 PC[14] EIRQ[8] GPIO[46] E0UC[14] SCK_2 4 PC[15] EIRQ[20] GPIO[47] E0UC[15] CS0_2 5 PA[2] WKPU[3] GPIO[2] E0UC[2] 6 PE[0] WKPU[6] GPIO[64] E0UC[16] CAN_samp1 _RX 7 PA[1] WKPU[2] GPIO[1] E0UC[1] NMI[0] 8 PE[1] GPIO[65] E0UC[17] CAN5TX 9 PE[8] GPIO[72] CAN2TX E0UC[22] GPIO[73] CAN_samp E0UC[23] 2_RX CAN_sam p3_RX CAN5RX CAN2RX CAN3RX E0UC[31] SCL E0UC[7] MA[2] CAN3TX 10 PE[9] WKPU[7] 11 PE[10] EIRQ[10] GPIO[74] LIN3TX CS3_1 E1UC[30] 12 PA[0] WKPU[19] GPIO[0] E0UC[0] CLKOUT E0UC[13] 13 PE[11] WKPU[14] LIN3RX GPIO[75] E0UC[24] CS4_1 WKPU[5] CAN1RX GPIO[43] CAN_samp CAN_samp4 MA[2] 1_RX _RX 22 PC[10] GPIO[42] CAN1TX CAN4TX MA[1] 23 PB[0] GPIO[16] CAN0TX E0UC[30] LIN0TX GPIO[17] CAN_samp E0UC[31] 0_RX GPIO[38] LIN1TX 14 Vpp 15 VDD_HV 16 VSS_HV 17 RESET 18 VSS_LV 19 VDD_LV 20 VDD_BV 21 PC[11] 24 PB[1] WKPU[4] CAN0RX 25 PC[6] 26 PC[7] WKPU[12] LIN1RX CAN4RX LIN0RX GPIO[39] E1UC[28] E1UC[29] Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 10 Freescale Semiconductor Packages and pinout Table 2. 100LQFP MPC5604B to MPC5607B comparison (continued) Alternate I/O functions Pin Pad Alternate input functions ALT0 ALT1 ALT2 ALT3 27 PA[15] WKPU[10] GPIO[15] CS0_0 SCK_0 E0UC[1] 28 PA[14] EIRQ[4] GPIO[14] SCK_0 CS0_0 E0UC[0] 29 PA[4] WKPU[9] GPIO[4] E0UC[4] GPIO[13] SOUT_0 LIN5RX 30 PA[13] 31 PA[12] EIRQ[17] SIN_0 GPIO[12] 38 PB[9] WKPU[26] ADC1_S[5] ADC0_S[1] GPIO[25] 39 PB[8] WKPU[25] ADC1_S[4] ADC0_S[0] GPIO[24] 40 PB[10] WKPU[8] ADC1_S[6] ADC0_S[2] GPIO[26] 41 PD[0] WKPU[27] ADC1_P[4] ADC0_P[4] GPIO[48] 42 PD[1] WKPU[28] ADC1_P[5] ADC0_P[5] GPIO[49] 43 PD[2] ADC1_P[6] ADC0_P[6] GPIO[50] 44 PD[3] ADC1_P[7] ADC0_P[7] GPIO[51] 45 PD[4] ADC1_P[8] ADC0_P[8] GPIO[52] 46 PD[5] ADC1_P[9] ADC0_P[9] GPIO[53] 47 PD[6] ADC1_P[10] ADC0_P[10] GPIO[54] 48 PD[7] ADC1_P[11] ADC0_P[11] GPIO[55] 49 PD[8] ADC1_P[12] ADC0_P[12] GPIO[56] 50 PB[4] ADC1_P[0] ADC0_P[0] GPIO[20] 53 PB[5] ADC1_P[1] ADC0_P[1] GPIO[21] 54 PB[6] ADC1_P[2] ADC0_P[2] GPIO[22] 55 PB[7] ADC1_P[3] ADC0_P[3] GPIO[23] 56 PD[9] ADC1_P[13] ADC0_P[13] GPIO[57] 57 PD[10] ADC1_P[14] ADC0_P[14] GPIO[58] 58 PD[11] ADC1_P[15] ADC0_P[15] GPIO[59] Vss_HV_ADC1 ADC0_S[3] GPIO[27] CS0_1 E0UC[29] E0UC[28] CS3_1 32 VDD_LV 33 VSS_LV 34 XTAL 35 VSS_HV 36 EXTAL 37 VDD_HV 51 VSS_HV_ADC0 52 VDD_HV_ADC0 *59 PB[11] E0UC[3] CS0_0 Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 11 Packages and pinout Table 2. 100LQFP MPC5604B to MPC5607B comparison (continued) Alternate I/O functions Pin Pad Alternate input functions ALT0 *60 PD[12] Vdd_HV_ADC1 ALT1 ADC0_S[4] GPIO[60] CS5_0 61 PB[12] ADC0_X[0] GPIO[28] E0UC[4] 62 PD[13] ADC0_S[5] GPIO[61] CS0_1 63 PB[13] ADC0_X[1] GPIO[29] E0UC[5] 64 PD[14] ADC0_S[6] GPIO[62] CS1_1 65 PB[14] ADC0_X[2] GPIO[30] E0UC[6] 66 PD[15] ADC0_S[7] GPIO[63] CS2_1 67 PB[15] ADC0_X[3] GPIO[31] E0UC[7] ALT2 E0UC[24] CS1_0 E0UC[25] CS2_0 E0UC[26] CS3_0 E0UC[27] CS4_0 EIRQ[0] ADC1_S[0] GPIO[3] E0UC[3] LIN5TX 71 PA[7] EIRQ[2] ADC1_S[1] GPIO[7] E0UC[7] LIN3TX 72 PA[8] EIRQ[3] ABS[0] GPIO[8] E0UC[8] E0UC[14] 68 PA[3] ALT3 CS4_1 69 VSS_HV 70 VDD_HV LIN3RX 73 PA[9] FAB GPIO[9] E0UC[9] 74 PA[10] ADC1_S[2] GPIO[10] E0UC[10] SDA E0UC[11] SCL CS2_1 75 PA[11] EIRQ[16] ADC1_S[3] LIN2RX GPIO[11] 76 PE[12] EIRQ[11] ADC1_S[7] SIN_2 GPIO[76] 77 PC[3] EIRQ[6] CAN4RX CAN1RX GPIO[35] CS0_1 MA[0] 78 PC[2] EIRQ[5] GPIO[34] SCK_1 CAN4TX GPIO[5] E0UC[5] LIN4TX GPIO[6] E0UC[6] 79 PA[5] 80 PA[6] LIN4RX EIRQ[1] LIN2TX E1UC[19] CS1_1 81 PH[10] GPIO[122] TMS 82 PC[1] GPIO[33] TDO 87 PC[0] GPIO[32] TDI 88 PH[9] GPIO[121] TCK 83 VSS_HV 84 VDD_HV 85 VDD_LV 86 VSS_LV 89 PE[2] EIRQ[21] SIN_1 90 PE[3] 91 PC[5] EIRQ[7] 92 PC[4] EIRQ[18] SIN_1 CAN3RX GPIO[66] E0UC[18] GPIO[67] E0UC[19] SOUT_1 GPIO[37] SOUT_1 CAN3TX GPIO[36] E1UC[31] Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 12 Freescale Semiconductor Packages and pinout Table 2. 100LQFP MPC5604B to MPC5607B comparison (continued) Alternate I/O functions Pin Pad Alternate input functions ALT0 93 PE[4] EIRQ[9] 94 PE[5] ALT1 ALT2 ALT3 GPIO[68] E0UC[20] SCK_1 GPIO[69] E0UC[21] CS0_1 MA[2] 95 PE[6] EIRQ[22] GPIO[70] E0UC[22] CS3_0 MA[1] 96 PE[7] EIRQ[23] GPIO[71] E0UC[23] CS2_0 MA[0] 97 PC[12] EIRQ[19] GPIO[44] E0UC[12] 98 PC[13] GPIO[45] E0UC[13] SOUT_2 99 PC[8] GPIO[40] LIN2TX E0UC[3] 100 PB[2] GPIO[18] LIN0TX SDA SIN_2 E0UC[30] NOTE Pins 59 and 60 are implemented as ADC_1 power supplies pins VSS and VDD respectively on the MPC5607B in the 100LQFP package. Refer to section 5.1 and 6.1 for further details. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 13 Packages and pinout 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 PB[2] / GPIO[18] / LIN0TX / SDA / E0UC[30] PC[8] / GPIO[40] / LIN2TX/ E0UC[3] PC[13] / GPIO[45] / E0UC[13] / SOUT_2 PC[12] / GPIO[44] / E0UC[12] / EIRQ[19] / SIN_2 PE[7] / GPIO[71] / E0UC[23] / CS2_0 / MA[0] / EIRQ[23] PE[6] / GPIO[70] / E0UC[22] / CS3_0 / MA[1] / EIRQ[22] PE[5] / GPIO[69] / E0UC[21] / CS0_1 / MA[2] PE[4] / GPIO[68] / E0UC[20] / SCK_1 / EIRQ[9] PC[4] / GPIO[36] / E1UC[31] / EIRQ[18] / SIN_1 / CAN3RX PC[5] / GPIO[37] / SOUT_1 / CAN3TX / EIRQ[7] PE[3] / GPIO[67] / E0UC[19] / SOUT_1 PE[2] / GPIO[66] / E0UC[18] / EIRQ[21] / SIN_1 PH[9] / GPIO[121] / TCK PC[0] / GPIO[32] / TDI VSS_LV VDD_LV VDD_HV VSS_HV PC[1] / GPIO[33] / TDO PH[10] / GPIO[122] / TMS PA[6] / GPIO[6] / E0UC[6] / CS1_1 / EIRQ[1] / LIN4RX PA[5] / GPIO[5] / E0UC[5] / LIN4TX PC[2] / GPIO[34] / SCK_1 / CAN4TX / EIRQ[5] PC[3] / GPIO[35] / CS0_1 / MA[0] / EIRQ[6] / CAN4RX / CAN1RX PE[12] / GPIO[76] / E1UC[19] / EIRQ[11] / SIN_2 / ADC1_S[7] Here is a package-oriented view: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 LQFP100 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 PA[11] / GPIO[11] / E0UC[11] / SCL / EIRQ[16] / LIN2RX / ADC1_S[3] PA[10] / GPIO[10] / E0UC[10] / SDA / LIN2TX / ADC1_S[2] PA[9] / GPIO[9] / E0UC[9] / CS2_1 / FAB PA[8] / GPIO[8] / E0UC[8] / E0UC[14] / EIRQ[3] / ABS[0] / LIN3RX PA[7] / GPIO[7] / E0UC[7] / LIN3TX / EIRQ[2] / ADC1_S[1] VDD_HV VSS_HV PA[3] / GPIO[3] / E0UC[3] / LIN5TX / CS4_1 / EIRQ[0] / ADC1_S[0] PB[15] / GPIO[31] / E0UC[7] / CS4_0 / ADC0_X[3] PD[15] / GPIO[63] / CS2_1 / E0UC[27] / ADC0_S[7] PB[14] / GPIO[30] / E0UC[6] / CS3_ 0 / ADC0_X[2] PD[14] / GPIO[62] / CS1_1 / E0UC[26] / ADC0_S[6] PB[13] / GPIO[29] / E0UC[5] / CS2_0 / ADC0_X[1] PD[13] / GPIO[61] / CS0_1 / E0UC[25] / ADC0_S[5] PB[12] / GPIO[28] / E0UC[4] / CS1_0 / ADC0_X[0] VDD_HV_ADC1 VSS_HV_ADC1 PD[11] / GPIO[59] / ADC0_P[15] / ADC1_P[15] PD[10] / GPIO[58] / ADC0_P[14] / ADC1_P[14] PD[9] / GPIO[57] / ADC0_P[13] / ADC1_P[13] PB[7] / GPIO[23] / ADC0_P[3] / ADC1_P[3] PB[6] / GPIO[22] / ADC0_P[2] / ADC1_P[2] PB[5] / GPIO[21] / ADC0_P[1] / ADC1_P[1] VDD_HV_ADC0 VSS_HV_ADC0 LIN1RX / WKPU[12] / E1UC[29] / GPIO[39] / PC[7] WKPU[10] / E0UC[1] / SCK_0 / CS0_0 / GPIO[15] / PA[15] EIRQ[4] / E0UC[0] / CS0_0 / SCK_0 / GPIO[14] / PA[14] LIN5RX / WKPU[9] / CS0_1 / E0UC[4] / GPIO[4] / PA[4] E0UC[29] / SOUT_0 / GPIO[13] / PA[13] EIRQ[17] / SIN_0 / CS3_1 / E0UC[28] / GPIO[12] / PA[12] VDD_LV VSS_LV XTAL VSS_HV EXTAL VDD_HV WKPU[26]/ADC1_S[5] / 32KXTA / ADC0_S[1] / GPIO[25] / PB[9] WKPU[25]/ADC1_S[4] / 32KXTA / ADC0_S[0] / GPIO[24] / PB[8] ADC1_S[6] / WKPU[8] / ADC0_S[2] / GPIO[26] / PB[10] WKPU[27] / ADC1_P[4] / ADC0_P[4] / GPIO[48] / PD[0] WKPU[28] / ADC1_P[5] / ADC0_P[5] / GPIO[49] / PD[1] ADC1_P[6] / ADC0_P[6] / GPIO[50] / PD[2] ADC1_P[7] / ADC0_P[7] / GPIO[51] / PD[3] ADC1_P[8] / ADC0_P[8] / GPIO[52] / PD[4] ADC1_P[9] / ADC0_P[9] / GPIO[53] / PD[5] ADC1_P[10] / ADC0_P[10] / GPIO[54] / PD[6] ADC1_P[11] / ADC0_P[11] / GPIO[55] / PD[7] ADC1_P[12] / ADC0_P[12] / GPIO[56] / PD[8] ADC1_P[0] / ADC0_P[0] / GPIO[20] / PB[4] 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 LIN0RX / WKPU[11] / SCL / E0UC[31] / GPIO[19] / PB[3] LIN2RX / WKPU[13] / E0UC[7] / GPIO[41] / PC[9] EIRQ[8] / SCK_2 / E0UC[14] / GPIO[46] / PC[14] EIRQ[20] / CS0_2 / E0UC[15] / GPIO[47] / PC[15] MA[2] / WKPU[3] / E0UC[2] / GPIO[2] / PA[2] CAN5RX/ WKPU[6] / E0UC[16] / GPIO[64] / PE[0] WKPU[2] / NMI[0] / E0UC[1] / GPIO[1] / PA[1] CAN5TX / E0UC[17] / GPIO[65] / PE[1] CAN3TX / E0UC[22] / CAN2TX / GPIO[72] / PE[8] CAN3RX / CAN2RX / WKPU[7] / E0UC[23] / / GPIO[73] / PE[9] EIRQ[10] / E1UC[30] / CS3_1 / LIN3TX / GPIO[74] / PE[10] WKPU[19] / E0UC[13] / CLKOUT / E0UC[0] / GPIO[0] / PA[0] LIN3RX / WKPU[14] / CS4_1 / E0UC[24] / GPIO[75] / PE[11] VSS_HV VDD_HV VSS_HV RESET VSS_LV VDD_LV VDD_BV CAN4RX / CAN1RX / WKPU[5] / MA[2] / GPIO[43] / PC[11] MA[1] / CAN4TX / CAN1TX / GPIO[42] / PC[10] LIN0TX / E0UC[30] / CAN0TX / GPIO[16] / PB[0] CAN0RX / WKPU[4] / LIN0RX / E0UC[31] / GPIO[17] / PB[1] E1UC[28] / LIN1TX / GPIO[38] / PC[6]] Figure 6. MPC5607B LQFP100 package Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 14 Freescale Semiconductor 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 PB[2] / GPIO[18] / LIN0TX / SDA PC[8] / GPIO[40] / LIN2TX PC[13] / GPIO[45] / E0UC[13] / SOUT_2 PC[12] / GPIO[44] / E0UC[12] / SIN_2 PE[7] / GPIO[71] / E0UC[23] / CS2_0 / MA[0] PE[6] / GPIO[70] / E0UC[22] / CS3_0 / MA[1] PE[5] / GPIO[69] / E0UC[21] / CS0_1 / MA[2] PE[4] / GPIO[68] / E0UC[20] / SCK_1 / EIRQ[9] PC[4] / GPIO[36] / SIN1 / CAN3RX PC[5] / GPIO[37] / SOUT_1 / CAN3TX / EIRQ[7] PE[3] / GPIO[67] / E0UC[19] / SOUT_1 PE[2] / GPIO[66] / E0UC[18] / SIN_1 PH[9] / GPIO[121] / TCK PC[0] / GPIO[32] / TDI VSS_LV VDD_LV VDD_HV VSS_HV PC[1] / GPIO[33] / TDO PH[10] / GPIO[122] / TMS PA[6] / GPIO[6] / E0UC[6] / EIRQ[1] PA[5] / GPIO[5] / E0UC[5] PC[2] / GPIO[34] / SCK1 / CAN4TX / EIRQ[5] PC[3] / GPIO[35] / CS0_1 / MA[0] / CAN1RX / CAN4RX / EIRQ[6] PE[12] / GPIO[76] / SIN_2 / E1UC[19] / EIRQ[11] Packages and pinout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 LQFP 100 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 PA[11] / GPIO[11] / E0UC[11] / SCL PA[10] / GPIO[10] / E0UC[10] / SDA PA[9] / GPIO[9] / E0UC[9] / FAB PA[8] / GPIO[8] / E0UC[8] / LIN3RX / EIRQ[3] / ABS[0] PA[7] / GPIO[7] / E0UC[7] / LIN3TX / EIRQ [2] VDD_HV VSS_HV PA[3] / GPIO[3] / E0UC[3] / EIRQ[0] PB[15] / GPIO[31] / CS4_0 / E0UC[7] / ADC0_X[3] PD[15] / GPIO[63] / CS2_1 / ADC0_S[7] / E0UC[27] PB[14] / GPIO[30] / CS3_ 0 / E0UC[6] / ADC0_X[2] PD[14] / GPIO[62] / CS1_1 / ADC0_S[6] / E0UC[26] PB[13] / GPIO[29] / CS2_0 / E0UC[5] / ANX[1] PD[13] / GPIO[61] / CS0_1 / ADC0_S[5] / E0UC[25] PB[12] / GPIO[28] / CS1_0 / E0UC[4] / ANX[0] PD[12] / GPIO[60] / CS5_0 / ADC0_S[4] / E0UC[24] PB[11] / GPIO[27] / E0UC[3] / ADC0_S[3] / CS0_0 PD[11] / GPIO[59] / ADC0_P[15] PD[10] / GPIO[58] / ADC0_P[14] PD[9] / GPIO[57] / ADC0_P[13] PB[7] / GPIO[23] / ADC0_P[3] PB[6] / GPIO[22] / ADC0_P[2] PB[5] / GPIO[21] / ADC0_P[1] VDD_HV_ADC VSS_HV_ADC WKPU[12] / LIN1RX / GPIO[39] / PC[7] WKPU[10] / SCK0 / CS0_0 / GPIO[15] / PA[15] EIRQ[4] / CS0_0 / SCK0 / GPIO[14] / PA[14] WKPU[9] / E0UC[4] / GPIO[4] / PA[4] SOUT_0 / GPIO[13] / PA[13] SIN_0 / GPIO[12] / PA[12] VDD_LV VSS_LV XTAL VSS_HV EXTAL VDD_HV OSC32K_EXTAL / ADC0_S[1] / GPIO[25] / PB[9] OSC32K_XTAL / ADC0_S[0] / GPIO[24] / PB[8] WKPU[8] / ADC0_S[2] / GPIO[26] / PB[10] ADC0_P[4] / GPIO[48] / PD[0] ADC0_P[5] / GPIO[49] / PD[1] ADC0_P[6] / GPIO[50] / PD[2] ADC0_P[7] / GPIO[51] / PD[3] ADC0_P[8] / GPIO[52] / PD[4] ADC0_P[9] / GPIO[53] / PD[5] ADC0_P[10] / GPIO[54] / PD[6] ADC0_P[11] / GPIO[55] / PD[7] ADC0_P[12] / GPIO[56] / PD[8] ADC0_P[0] / GPIO[20] / PB[4] 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 WKPU[11] / SCL / LIN0RX / GPIO[19] / PB[3] WKPU[13] / LIN2RX / GPIO[41] / PC[9] EIRQ[8] / SCK2 / E0UC[14] / GPIO[46] / PC[14] CS0_2 / E0UC[15] / GPIO[47] / PC[15] WKPU[3] / E0UC[2] / GPIO[2] / PA[2] WKPU[6] / CAN5RX / E0UC[16] / GPIO[64] / PE[0] WKPU[2] / NMI / E0UC[1] / GPIO[1] / PA[1] CAN5TX / E0UC[17] / GPIO[65] / PE[1] CAN3TX / E0UC[22] /CAN2TX / GPIO[72] / PE[8] WKPU[7] / CAN3RX / E0UC[23] /CAN2RX / GPIO[73] / PE[9] EIRQ[10] / CS3_1 / LIN3TX / GPIO[74] / PE[10] WKPU[19] / CLKOUT / E0UC[0] / GPIO[0] / PA[0] WKPU[14] / CS4_1 / LIN3RX / GPIO[75] / PE[11] VSS_HV VDD_HV VSS_HV RESET VSS_LV VDD_LV VDD_BV WKPU[5] / CAN4RX / CAN1RX / GPIO[43] / PC[11] MA[1] / CAN4TX / CAN1TX / GPIO[42] / PC[10] CAN0TX / GPIO[16] / PB[0] WKPU[4] / CAN0RX / GPIO[17] / PB[1] LIN1TX / GPIO[38] / PC[6] Figure 7. MPC5604B LQFP100 package Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 15 Packages and pinout This is the description of the LQFP 144 packages: Table 3. 144 LQFP MPC5604B to MPC5607B comparison Alternate I/O functions Pin Pad Alternate input functions ALT0 ALT1 ALT2 ALT3 1 PB[3] WKPU[11] LIN0RX GPIO[19] 2 PC[9] WKPU[13] LIN2RX GPIO[41] 3 PC[14] EIRQ[8] GPIO[46] E0UC[14] SCK_2 4 PC[15] EIRQ[20] GPIO[47] E0UC[15] CS0_2 5 PG[5] WKPU[18] GPIO[101] E1UC[14] GPIO[100] E1UC[13] SCK_3 GPIO[99] E1UC[12] CS0_3 GPIO[98] E1UC[11] SOUT_3 GPIO[2] E0UC[2] GPIO[64] E0UC[16] CAN_samp1 _RX GPIO[1] E0UC[1] NMI[0] 12 PE[1] GPIO[65] E0UC[17] CAN5TX 13 PE[8] GPIO[72] CAN2TX E0UC[22] GPIO[73] CAN_samp E0UC[23] 2_RX CAN_sam p3_RX SIN_3 6 PG[4] 7 PG[3] WKPU[17] 8 PG[2] 9 PA[2] WKPU[3] 10 PE[0] WKPU[6] 11 PA[1] WKPU[2] CAN5RX CAN2RX CAN3RX E0UC[31] SCL E0UC[7] MA[2] CAN3TX 14 PE[9] WKPU[7] 15 PE[10] EIRQ[10] GPIO[74] LIN3TX CS3_1 E1UC[30] 16 PA[0] WKPU[19] GPIO[0] E0UC[0] CLKOUT E0UC[13] 17 PE[11] WKPU[14] LIN3RX GPIO[75] E0UC[24] CS4_1 25 PG[9] EIRQ[21] LIN7RX GPIO[105] E1UC[18] 26 PG[8] EIRQ[15] GPIO[104] E1UC[17] 27 PC[11] WKPU[5] GPIO[43] CAN_samp CAN_samp4 MA[2] 1_RX _RX GPIO[42] CAN1TX CAN4TX GPIO[103] E1UC[16] E1UC[30] GPIO[102] E1UC[15] LIN6TX 18 Vpp 19 VDD_HV 20 VSS_HV 21 RESET 22 VSS_LV 23 VDD_LV 24 VDD_BV CAN1RX 28 PC[10] 29 PG[7] 30 PG[6] WKPU[20] LIN6RX CAN4RX SCK_2 LIN7TX CS0_2 MA[1] Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 16 Freescale Semiconductor Packages and pinout Table 3. 144 LQFP MPC5604B to MPC5607B comparison (continued) Alternate I/O functions Pin Pad Alternate input functions 31 PB[0] ALT0 ALT1 ALT2 ALT3 GPIO[16] CAN0TX E0UC[30] LIN0TX 32 PB[1] WKPU[4] CAN0RX LIN0RX GPIO[17] CAN_samp E0UC[31] 0_RX 33 PF[9] WKPU[22] CAN2RX CAN3RX GPIO[89] E1UC[1] CS5_0 34 PF[8] GPIO[88] CAN3TX CS4_0 35 PF[12] GPIO[92] E1UC[25] LIN5TX 36 PC[6] GPIO[38] LIN1TX E1UC[28] 37 PC[7] WKPU[12] LIN1RX GPIO[39] 38 PF[10] 39 PF[11] WKPU[15] 40 PA[15] WKPU[10] 41 PF[13] WKPU[16] 42 PA[14] EIRQ[4] 43 PA[4] WKPU[9] LIN4RX LIN5RX LIN5RX 44 PA[13] E1UC[29] GPIO[90] CS1_0 LIN4TX GPIO[91] CS2_0 E1UC[3] GPIO[15] CS0_0 SCK_0 E0UC[1] GPIO[93] E1UC[26] GPIO[14] SCK_0 CS0_0 E0UC[0] GPIO[4] E0UC[4] GPIO[13] SOUT_0 GPIO[12] E1UC[2] CS0_1 E0UC[29] EIRQ[17] SIN_0 52 PB[9] WKPU[26] ADC1_S[5] ADC0_S[1] GPIO[25] 53 PB[8] WKPU[25] ADC1_S[4] ADC0_S[0] GPIO[24] 54 PB[10] WKPU[8] ADC1_S[6] ADC0_S[2] GPIO[26] 55 PF[0] ADC0_S[8] GPIO[80] E0UC[10] CS3_1 56 PF[1] ADC0_S[9] GPIO[81] E0UC[11] CS4_1 57 PF[2] ADC0_S[10] GPIO[82] E0UC[12] CS0_2 58 PF[3] ADC0_S[11] GPIO[83] E0UC[13] CS1_2 59 PF[4] ADC0_S[12] GPIO[84] E0UC[14] CS2_2 60 PF[5] ADC0_S[13] GPIO[85] E0UC[22] CS3_2 61 PF[6] ADC0_S[14] GPIO[86] E0UC[23] CS1_1 62 PF[7] ADC0_S[15] GPIO[87] ADC0_P[4] GPIO[48] 45 PA[12] CAN2TX E0UC[28] CS3_1 46 VDD_LV 47 VSS_LV 48 XTAL 49 VSS_HV 50 EXTAL 51 VDD_HV 63 PD[0] WKPU[27] ADC1_P[4] CS2_1 Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 17 Packages and pinout Table 3. 144 LQFP MPC5604B to MPC5607B comparison (continued) Alternate I/O functions Pin Pad Alternate input functions ALT0 64 PD[1] WKPU[28] ALT1 ALT2 ADC1_P[5] ADC0_P[5] GPIO[49] 65 PD[2] ADC1_P[6] ADC0_P[6] GPIO[50] 66 PD[3] ADC1_P[7] ADC0_P[7] GPIO[51] 67 PD[4] ADC1_P[8] ADC0_P[8] GPIO[52] 68 PD[5] ADC1_P[9] ADC0_P[9] GPIO[53] 69 PD[6] ADC1_P[10] ADC0_P[10] GPIO[54] 70 PD[7] ADC1_P[11] ADC0_P[11] GPIO[55] 71 PD[8] ADC1_P[12] ADC0_P[12] GPIO[56] 72 PB[4] ADC1_P[0] ADC0_P[0] GPIO[20] 75 PB[5] ADC1_P[1] ADC0_P[1] GPIO[21] 76 PB[6] ADC1_P[2] ADC0_P[2] GPIO[22] 77 PB[7] ADC1_P[3] ADC0_P[3] GPIO[23] 78 PD[9] ADC1_P[13] ADC0_P[13] GPIO[57] 79 PD[10] ADC1_P[14] ADC0_P[14] GPIO[58] 80 PD[11] ADC1_P[15] ADC0_P[15] GPIO[59] 81 PB[11] Vss_HV_ADC1 ADC0_S[3] GPIO[27] E0UC[3] 82 PD[12] Vdd_HV_ADC1 ADC0_S[4] GPIO[60] CS5_0 83 PB[12] ADC0_X[0] GPIO[28] E0UC[4] 84 PD[13] ADC0_S[5] GPIO[61] CS0_1 85 PB[13] ADC0_X[1] GPIO[29] E0UC[5] 86 PD[14] ADC0_S[6] GPIO[62] CS1_1 87 PB[14] ADC0_X[2] GPIO[30] E0UC[6] 88 PD[15] ADC0_S[7] GPIO[63] CS2_1 89 PB[15] ADC0_X[3] GPIO[31] E0UC[7] GPIO[3] E0UC[3] LIN5TX 91 PG[13] GPIO[109] E0UC[27] SCK_4 92 PG[12] GPIO[108] E0UC[26] SOUT_4 GPIO[112] E1UC[2] 94 PH[1] GPIO[113] E1UC[3] SOUT_1 95 PH[2] GPIO[114] E1UC[4] SCK_1 96 PH[3] GPIO[115] E1UC[5] CS0_1 ALT3 73 VSS_HV_ADC0 74 VDD_HV_ADC0 90 PA[3] 93 PH[0] EIRQ[0] ADC1_S[0] SIN_1 CS0_0 E0UC[24] CS1_0 E0UC[25] CS2_0 E0UC[26] CS3_0 E0UC[27] CS4_0 CS4_1 Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 18 Freescale Semiconductor Packages and pinout Table 3. 144 LQFP MPC5604B to MPC5607B comparison (continued) Alternate I/O functions Pin Pad Alternate input functions ALT0 97 PG[1] EIRQ[14] CAN5RX ALT1 GPIO[97] 98 PG[0] ALT2 ALT3 E1UC[24] GPIO[96] CAN5TX E1UC[23] GPIO[95] E1UC[4] 102 PF[14] GPIO[94] CAN4TX E1UC[27] 103 PE[13] GPIO[77] SOUT_2 E1UC[20] GPIO[7] E0UC[7] LIN3TX GPIO[8] E0UC[8] E0UC[14] 99 VSS_HV 100 VDD_HV 101 PF[15] EIRQ[13] CAN1RX 104 PA[7] EIRQ[2] ADC1_S[1] 105 PA[8] EIRQ[3] ABS[0] CAN4RX LIN3RX CS2_1 106 PA[9] FAB GPIO[9] E0UC[9] 107 PA[10] ADC1_S[2] GPIO[10] E0UC[10] SDA E0UC[11] SCL 108 PA[11] EIRQ[16] ADC1_S[3] LIN2RX GPIO[11] 109 PE[12] EIRQ[11] ADC1_S[7] SIN_2 GPIO[76] 110 PG[14] LIN8RX 111 PG[15] 112 PE[14] EIRQ[12] 113 PE[15] SIN_4 114 PG[10] 115 PG[11] 116 PC[3] EIRQ[6] 117 PC[2] EIRQ[5] CAN4RX CAN1RX 118 PA[5] 119 PA[6] EIRQ[1] LIN4RX CAN1TX LIN2TX E1UC[19] GPIO[110] E1UC[0] GPIO[111] E1UC[1] GPIO[78] SCK_2 E1UC[21] GPIO[79] CS0_2 E1UC[22] GPIO[106] E0UC[24] E1UC[31] GPIO[107] E0UC[25] CS0_4 GPIO[35] CS0_1 MA[0] GPIO[34] SCK_1 CAN4TX GPIO[5] E0UC[5] LIN4TX GPIO[6] E0UC[6] LIN8TX CS1_1 120 PH[10] GPIO[122] TMS 121 PC[1] GPIO[33] TDO 126 PC[0] GPIO[32] TDI 127 PH[9] GPIO[121] TCK 122 VSS_HV 123 VDD_HV 124 VDD_LV 125 VSS_LV 128 PE[2] EIRQ[21] 129 PE[3] SIN_1 GPIO[66] E0UC[18] GPIO[67] E0UC[19] SOUT_1 Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 19 Packages and pinout Table 3. 144 LQFP MPC5604B to MPC5607B comparison (continued) Alternate I/O functions Pin Pad Alternate input functions ALT0 ALT1 ALT2 GPIO[37] SOUT_1 CAN3TX GPIO[36] E1UC[31] GPIO[68] E0UC[20] SCK_1 133 PE[5] GPIO[69] E0UC[21] CS0_1 134 PH[4] GPIO[116] E1UC[6] 135 PH[5] GPIO[117] E1UC[7] 136 PH[6] GPIO[118] E1UC[8] 137 PH[7] GPIO[119] E1UC[9] CS3_2 MA[1] 138 PH[8] GPIO[120] E1UC[10] CS2_2 MA[0] 130 PC[5] EIRQ[7] 131 PC[4] EIRQ[18] 132 PE[4] EIRQ[9] SIN_1 CAN3RX ALT3 MA[2] MA[2] 139 PE[6] EIRQ[22] GPIO[70] E0UC[22] CS3_0 MA[1] 140 PE[7] EIRQ[23] GPIO[71] E0UC[23] CS2_0 MA[0] 141 PC[12] EIRQ[19] GPIO[44] E0UC[12] 142 PC[13] GPIO[45] E0UC[13] SOUT_2 143 PC[8] GPIO[40] LIN2TX E0UC[3] 144 PB[2] GPIO[18] LIN0TX SDA SIN_2 E0UC[30] Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 20 Freescale Semiconductor 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 PB[2]/GPIO[18]/LIN0TX/SDA/E0UC[30] PC[8]/GPIO[40]/LIN2TX/E0UC[3] PC[13]/GPIO[45]/E0UC[13]/SOUT_2 PC[12]/GPIO[44]/E0UC[12]/EIRQ[19]/SIN_2 PE[7]/GPIO[71]/E0UC[23]/CS2_0/MA[0]/EIRQ[23] PE[6]/GPIO[70]/E0UC[22]/CS3_0/MA[1]/EIRQ[22] PH[8]/GPIO[120]/E1UC[10]/CS2_2/MA[0] PH[7]/GPIO[119]/E1UC[9]/CS3_2/MA[1] PH[6]/GPIO[118]/E1UC[8]/MA[2] PH[5]/GPIO[117]/E1UC[7] PH[4]/GPIO[116]/E1UC[6] PE[5]/GPIO[69]/E0UC[21]/CS0_1/MA[2] PE[4]/GPIO[68]/E0UC[20]/SCK_1/EIRQ[9] PC[4]/GPIO[36]/E1UC[31]/EIRQ[18]/SIN_1/CAN3RX PC[5]/GPIO[37]/SOUT_1/CAN3TX/EIRQ[7] PE[3]/GPIO[67]/E0UC[19]/SOUT_1 PE[2]/GPIO[66]/E0UC[18]/EIRQ[21]/SIN_1 PH[9]/GPIO[121]/TCK PC[0]/GPIO[32]/TDI VSS_LV VDD_LV VDD_HV VSS_HV PC[1]/GPIO[33]/TDO PH[10]/GPIO[122]/TMS PA[6]/GPIO[6]/E0UC[6]/EIRQ[1]/LIN4RX/CS1_1 PA[5]/GPIO[5]/E0UC[5]/LIN4TX PC[2]/GPIO[34]/SCK_1/CAN4TX/EIRQ[5] PC[3]/GPIO[35]/CS0_1/MA[0]/EIRQ[6]/CAN4RX/CAN1RX PG[11]/GPIO[107]/E0UC[25]/CS0_4 PG[10]/GPIO[106]/E0UC[24]/E1UC[31]/SIN_4 PE[15]/GPIO[79]/CS0_2/E1UC[22] PE[14]/GPIO[78]/SCK_2/E1UC[21]/EIRQ[12] PG[15]/GPIO[111]/E1UC[1]/LIN8RX PG[14]/GPIO[110]/E1UC[0]/LIN8TX PE[12]/GPIO[76]/E1UC[19]/EIRQ[11]/SIN_2/ADC1_S[7] Packages and pinout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 144 LQFP Top view 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 PA[11]/GPIO[11]/E0UC[11]/SCL/EIRQ[16]/LIN2RX/ADC1_S[3] PA[10]/GPIO[10]/E0UC[10]/SDA/LIN2TX/ADC1_S[2] PA[9]/GPIO[9]/E0UC[9]/FAB/CS2_1 PA[8]/GPIO[8]/E0UC[8]/E0UC[14]/EIRQ[3]/ABS[0]/LIN3RX PA[7]/GPIO[7]/E0UC[7]/LIN3TX/EIRQ[2]/ADC1_S[1] PE[13]/GPIO[77]/SOUT_2/E1UC[20] PF[14]/GPIO[94]/CAN4TX/E1UC[27]/CAN1TX PF[15]/GPIO[95]/E1UC[4]/EIRQ[13]/CAN4RX/CAN1RX VDD_HV VSS_HV PG[0]/GPIO[96]/CAN5TX/E1UC[23] PG[1]/GPIO[97]/E1UC[24]/EIRQ[14]/CAN5RX PH[3]/GPIO[115]/E1UC[5]/CS0_1 PH[2]/GPIO[114]/E1UC[4]/SCK_1 PH[1]/GPIO[113]/E1UC[3]/SOUT_1 PH[0]/GPIO[112]/E1UC[2]/SIN_1 PG[12]/GPIO[108]/E0UC[26]/SOUT_4 PG[13]/GPIO[109]/E0UC[27]/SCK_4 PA[3]/GPIO[3]/E0UC[3]/LIN5TX/EIRQ[0]/CS4_1/ADC1_S[0] PB[15]/GPIO[31]/E0UC[7]/CS4_0/ADC0_X[3] PD[15]/GPIO[63]/CS2_1/E0UC[27]/ADC0_S[7] PB[14]/GPIO[30]/E0UC[6]/CS3_ 0/ADC0_X[2] PD[14]/GPIO[62]/CS1_1/E0UC[26]/ADC0_S[6] PB[13]/GPIO[29]/E0UC[5]/CS2_0/ADC0_X[1] PD[13]/GPIO[61]/CS0_1/E0UC[25]/ADC0_S[5] PB[12]/GPIO[28]/E0UC[4]/CS1_0/ADC0_X[0] VDD_HV_ADC1 VSS_HV_ADC1 PD[11]/GPIO[59]/ADC0_P[15]/ADC1_P[15] PD[10]/GPIO[58]/ADC0_P[14]/ADC1_P[14] PD[9]/GPIO[57]/ADC0_P[13]/ADC1_P[13] PB[7]/GPIO[23]/ADC0_P[3]/ADC1_P[3] PB[6]/GPIO[22]/ADC0_P[2]/ADC1_P[2] PB[5]/GPIO[21]/ADC0_P[1]/ADC1_P[1] VDD_HV_ADC0 VSS_HV_ADC0 LIN1RX/WKPU[12]/E1UC[29]/GPIO[39]/PC[7] E1UC[2]/LIN4TX/CS1_0/GPIO[90]/PF[10] LIN4RX/WKPU[15]/E1UC[3]/CS2_0/GPIO[91]/PF[11] WKPU[10]/E0UC[1]/SCK_0/CS0_0/GPIO[15]/PA[15] LIN5RX/WKPU[16]/E1UC[26]/GPIO[93]/PF[13] EIRQ[4]/E0UC[0]/CS0_0/SCK_0/GPIO[14]/PA[14] CS0_1\LIN5RX/WKPU[9]/E0UC[4]/GPIO[4]/PA[4] E0UC[29]/SOUT_0/GPIO[13]/PA[13] CS3_1\EIRQ[17]/SIN_0/E0UC[28]/GPIO[12]/PA[12] VDD_LV VSS_LV XTAL VSS_HV EXTAL VDD_HV ADC1_S[5]/32KXTAL/WKPU[26]/ADC0_S[1]/GPIO[25]/PB[9] ADC1_S[4]\32KXTAL/WKPU[25]/ADC0_S[0]/GPIO[24]/PB[8] ADC1_S[6]\WKPU[8]/ADC0_S[2]/GPIO[26]/PB[10] ADC0_S[8]/CS3_1/E0UC[10]/GPIO[80]/PF[0] ADC0_S[9]/CS4_1/E0UC[11]/GPIO[81]/PF[1] ADC0_S[10]/CS0_2/E0UC[12]/GPIO[82]/PF[2] ADC0_S[11]/CS1_2/E0UC[13]/GPIO[83]/PF[3] ADC0_S[12]/CS2_2/E0UC[14]/GPIO[84]/PF[4] ADC0_S[13]/CS3_2/E0UC[22]/GPIO[85]/PF[5] ADC0_S[14]/CS1_1/E0UC[23]/GPIO[86]/PF[6] ADC0_S[15]/CS2_1/GPIO[87]/PF[7] ADC1_P[4]\ADC0_P[4]/WKPU[27]/GPIO[48]/PD[0] ADC1_P[5]\ADC0_P[5]/WKPU[28]/GPIO[49]/PD[1] ADC1_P[6]/ADC0_P[6]/GPIO[50]/PD[2] ADC1_P[7]/ADC0_P[7]/GPIO[51]/PD[3] ADC1_P[8]/ADC0_P[8]/GPIO[52]/PD[4] ADC1_P[9]/ADC0_P[9]/GPIO[53]/PD[5] ADC1_P[10]/ADC0_P[10]/GPIO[54]/PD[6] ADC1_P[11]/ADC0_P[11]/GPIO[55]/PD[7] ADC1_P[12]/ADC0_P[12]/GPIO[56]/PD[8] ADC1_P[0]/ADC0_P[0]/GPIO[20]/PB[4] 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 LIN0RX/WKPU[11]/SCL/E0UC[31]/GPIO[19]/PB[3] LIN2RX/WKPU[13]/E0UC[7]/GPIO[41]/PC[9] EIRQ[8]/SCK2/E0UC[14]/GPIO[46]/PC[14] EIRQ[20]/CS0_2/E0UC[15]/GPIO[47]/PC[15] SIN_3/WKPU[18]/E1UC[14]/GPIO[101]/PG[5] SCK_3/E1UC[13]/GPIO[100]/PG[4] WKPU[17]/CS0_3/E1UC[12]/GPIO[99]/PG[3] SOUT_3/E1UC[11]/GPIO[98]/PG[2] MA[2]/WKPU[3]/E0UC[2]/GPIO[2]/PA[2] CAN5RX/WKPU[6]/E0UC[16]/GPIO[64]/PE[0] WKPU[2]/NMI[0]/E0UC[1]/GPIO[1]/PA[1] CAN5TX/E0UC[17]/GPIO[65]/PE[1] CAN3TX/E0UC[22]/CAN2TX/GPIO[72]/PE[8] CAN3RX/CAN2RX/WKPU[7]/E0UC[23]/GPIO[73]/PE[9] EIRQ[10]/E1UC[30]/CS3_1/LIN3TX/GPIO[74]/PE[10] WKPU[19]/E0UC[13]/CLKOUT/E0UC[0]/GPIO[0]/PA[0] LIN3RX/WKPU[14]/CS4_1/E0UC[24]/GPIO[75]/PE[11] VSS_HV VDD_HV VSS_HV RESET VSS_LV VDD_LV VDD_BV LIN7RX/EIRQ[21]/SCK_2/E1UC[18]/GPIO[105]/PG[9] EIRQ[15]/CS0_2/LIN7TX/E1UC[17]/GPIO[104]/PG[8] CAN4RX/CAN1RX/WKPU[5]/MA[2]/GPIO[43]/PC[11] MA[1]/CAN4TX/CAN1TX/GPIO[42]/PC[10] LIN6RX/WKPU[20]/E1UC[30]/E1UC[16]/GPIO[103]/PG[7] LIN6TX/E1UC[15]/GPIO[102]/PG[6] LIN0TX/E0UC[30]/CAN0TX/GPIO[16]/PB[0] LIN0RX/CAN0RX/WKPU[4]/E0UC[31]/GPIO[17]/PB[1] CAN2RX/CAN3RX/WKPU[22]/CS5_0/E1UC[1]/GPIO[89]/PF[9] CAN2TX/CS4_0/CAN3TX/GPIO[88]/PF[8] LIN5TX/E1UC[25]/GPIO[92]/PF[12] E1UC[28]/LIN1TX/GPIO[38]/PC[6] Figure 8. MPC5607B LQFP144 package Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 21 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 PB[2]/GPIO[18]/LIN0TX/SDA PC[8]/GPIO[40]/LIN2TX PC[13]/GPIO[45]/E0UC[13]/SOUT_2 PC[12]/GPIO[44]/E0UC[12]/SIN_2 PE[7]/GPIO[71]/E0UC[23]/CS2_0/MA[0] PE[6]/GPIO[70]/E0UC[22]/CS3_0/MA[1] PH[8]/GPIO[120]/E1UC[10]/CS2_2/MA[0] PH[7]/GPIO[119]/E1UC[9]/CS3_2/MA[1] PH[6]/GPIO[118]/E1UC[8]/MA[2] PH[5]/GPIO[117]/E1UC[7] PH[4]/GPIO[116]/E1UC[6] PE[5]/GPIO[69]/E0UC[21]/CS0_1/MA[2] PE[4]/GPIO[68]/E0UC[20]/SCK_1/EIRQ[9] PC[4]/GPIO[36]/EIRQ[18]/SIN_1/CAN3RX PC[5]/GPIO[37]/SOUT_1/CAN3TX/EIRQ[7] PE[3]/GPIO[67]/E0UC[19]/SOUT_1 PE[2]/GPIO[66]/E0UC[18]/SIN_1 PH[9]/GPIO[121]/TCK PC[0]/GPIO[32]/TDI VSS_LV VDD_LV VDD_HV VSS_HV PC[1]/GPIO[33]/TDO PH[10]/GPIO[122]/TMS PA[6]/GPIO[6]/E0UC[6]/EIRQ[1] PA[5]/GPIO[5]/E0UC[5] PC[2]/GPIO[34]/SCK_1/CAN4TX/EIRQ[5] PC[3]/GPIO[35]/CS0_1/MA[0]/EIRQ[6]/CAN4RX/CAN1RX PG[11]/GPIO[107]/E0UC[25] PG[10]/GPIO[106]/E0UC[24] PE[15]/GPIO[79]/CS0_2/E1UC[22] PE[14]/GPIO[78]/SCK_2/E1UC[21]/EIRQ[12] PG[15]/GPIO[111]/E1UC[1] PG[14]/GPIO[110]/E1UC[0] PE[12]/GPIO[76]/E1UC[19]/EIRQ[11]/SIN_2 Device ID 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 144 LQFP Top view 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 PA[11]/GPIO[11]/E0UC[11]/SCL PA[10]/GPIO[10]/E0UC[10]/SDA PA[9]/GPIO[9]/E0UC[9]/FAB PA[8]/GPIO[8]/E0UC[8]/EIRQ[3]/ABS[0]/LIN3RX PA[7]/GPIO[7]/E0UC[7]/LIN3TX/EIRQ[2] PE[13]/GPIO[77]/SOUT_2/E1UC[20] PF[14]/GPIO[94]/CAN4TX/E1UC[27]/CAN1TX PF[15]/GPIO[95]/EIRQ[13]/CAN4RX/CAN1RX VDD_HV VSS_HV PG[0]/GPIO[96]/CAN5TX/E1UC[23] PG[1]/GPIO[97]/E1UC[24]/EIRQ[14]/CAN5RX PH[3]/GPIO[115]/E1UC[5]/CS0_1 PH[2]/GPIO[114]/E1UC[4]/SCK_1 PH[1]/GPIO[113]/E1UC[3]/SOUT_1 PH[0]/GPIO[112]/E1UC[2]/SIN_1 PG[12]/GPIO[108]/E0UC[26] PG[13]/GPIO[109]/E0UC[27] PA[3]/GPIO[3]/E0UC[3]/EIRQ[0]/ADC1_S[0] PB[15]/GPIO[31]/E0UC[7]/CS4_0/ADC0_X[3] PD[15]/GPIO[63]/CS2_1/E0UC[27]/ADC0_S[7] PB[14]/GPIO[30]/E0UC[6]/CS3_ 0/ADC0_X[2] PD[14]/GPIO[62]/CS1_1/E0UC[26]/ADC0_S[6] PB[13]/GPIO[29]/E0UC[5]/CS2_0/ADC0_X[1] PD[13]/GPIO[61]/CS0_1/E0UC[25]/ADC0_S[5] PB[12]/GPIO[28]/E0UC[4]/CS1_0/ADC0_X[0] PB[11]/GPIO[27]/ADC0_S[3]/E0UC[3]/CS0_0 PD[12]/GPIO[60]/ADC0_S[4]/E0UC[24]/CS5_0 PD[11]/GPIO[59]/ADC0_P[15] PD[10]/GPIO[58]/ADC0_P[14] PD[9]/GPIO[57]/ADC0_P[13] PB[7]/GPIO[23]/ADC0_P[3] PB[6]/GPIO[22]/ADC0_P[2] PB[5]/GPIO[21]/ADC0_P[1] VDD_HV_ADC0 VSS_HV_ADC0 LIN1RX/WKPU[12]/GPIO[39]/PC[7] GPIO[90]/PF[10] WKPU[15]/GPIO[91]/PF[11] WKPU[10]/SCK_0/CS0_0/GPIO[15]/PA[15] WKPU[16]/E1UC[26]/GPIO[93]/PF[13] EIRQ[4]/CS0_0/SCK_0/GPIO[14]/PA[14] LIN5RX/WKPU[9]/E0UC[4]/GPIO[4]/PA[4] SOUT_0/GPIO[13]/PA[13] EIRQ[17]/SIN_0/GPIO[12]/PA[12] VDD_LV VSS_LV XTAL VSS_HV EXTAL VDD_HV 32KXTAL/ADC0_S[1]/GPIO[25]/PB[9] 32KXTAL/ADC0_S[0]/GPIO[24]/PB[8] WKPU[8]/ADC0_S[2]/GPIO[26]/PB[10] ADC0_S[8]/CS3_1/E0UC[10]/GPIO[80]/PF[0] ADC0_S[9]/CS4_1/E0UC[11]/GPIO[81]/PF[1] ADC0_S[10]/CS0_2/E0UC[12]/GPIO[82]/PF[2] ADC0_S[11]/CS1_2/E0UC[13]/GPIO[83]/PF[3] ADC0_S[12]/CS2_2/E0UC[14]/GPIO[84]/PF[4] ADC0_S[13]/CS3_2/E0UC[22]/GPIO[85]/PF[5] ADC0_S[14]/E0UC[23]/GPIO[86]/PF[6] ADC0_S[15]/GPIO[87]/PF[7] ADC0_P[4]/GPIO[48]/PD[0] ADC0_P[5]/GPIO[49]/PD[1] ADC0_P[6]/GPIO[50]/PD[2] ADC0_P[7]/GPIO[51]/PD[3] ADC0_P[8]/GPIO[52]/PD[4] ADC0_P[9]/GPIO[53]/PD[5] ADC0_P[10]/GPIO[54]/PD[6] ADC0_P[11]/GPIO[55]/PD[7] ADC0_P[12]/GPIO[56]/PD[8] ADC0_P[0]/GPIO[20]/PB[4] 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 LIN0RX/WKPU[11]/SCL/GPIO[19]/PB[3] LIN2RX/WKPU[13]/GPIO[41]/PC[9] EIRQ[8]/SCK2/E0UC[14]/GPIO[46]/PC[14] CS0_2/E0UC[15]/GPIO[47]/PC[15] WKPU[18]/E1UC[14]/GPIO[101]/PG[5] E1UC[13]/GPIO[100]/PG[4] WKPU[17]/E1UC[12]/GPIO[99]/PG[3] E1UC[11]/GPIO[98]/PG[2] WKPU[3]/E0UC[2]/GPIO[2]/PA[2] CAN5RX/WKPU[6]/E0UC[16]/GPIO[64]/PE[0] WKPU[2]/NMI[0]/E0UC[1]/GPIO[1]/PA[1] CAN5TX/E0UC[17]/GPIO[65]/PE[1] CAN3TX/E0UC[22]/CAN2TX/GPIO[72]/PE[8] CAN3RX/CAN2RX/WKPU[7]/E0UC[23]/GPIO[73]/PE[9] EIRQ[10]/CS3_1/LIN3TX/GPIO[74]/PE[10] WKPU[19]/CLKOUT/E0UC[0]/GPIO[0]/PA[0] LIN3RX/WKPU[14]/CS4_1/GPIO[75]/PE[11] VSS_HV VDD_HV VSS_HV RESET VSS_LV VDD_LV VDD_BV SCK_2/E1UC[18]/GPIO[105]/PG[9] EIRQ[15]/CS0_2/E1UC[17]/GPIO[104]/PG[8] CAN4RX/CAN1RX/WKPU[5]/GPIO[43]/PC[11] MA[1]/CAN4TX/CAN1TX/GPIO[42]/PC[10] E1UC[16]/GPIO[103]/PG[7] E1UC[15]/GPIO[102]/PG[6] CAN0TX/GPIO[16]/PB[0] CAN0RX/WKPU[4]/GPIO[17]/PB[1] CAN2RX/CAN3RX/CS5_0/GPIO[89]/PF[9] CAN2TX/CS4_0/CAN3TX/GPIO[88]/PF[8] E1UC[25]/GPIO[92]/PF[12] LIN1TX/GPIO[38]/PC[6] Figure 9. MPC5604B LQFP144 package 4 Device ID The MCU ID registers MIDR1 and MIDR2 contain information pertaining to the device including part number, package type, mask set information, and parametric data such as flash size and inclusion of data flash. The device identification register within the JTAG controller is read by debuggers to identify the device under test. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 22 Freescale Semiconductor Migrating from MPC5604B to MPC5607B Table 4 details the register contents for each device and package option. Software that depends on the contents of this register should be modified. Refer to the respective device reference manuals for full bit level descriptions of these registers. : Table 4. Device ID Registers (table to be updated) Device Package Flash size MIDR1 MIDR2 JTAGC ID MPC5604C 100LQFP 512 KB 0x5604_34XX 0x2800_4310 TBD MPC5604B 144LQPF 512 KB 0x5604_34XX 0x2800_4210 TBD MPC5604B 100LQFP 512 KB 0x5604_24XX 0x2800_4210 TBD MPC5603C 100LQPF 384 KB 0x5603_24XX 0x2200_4310 TBD MPC5603B 144LQPF 384 KB 0x5603_34XX 0x2200_4210 TBD MPC5603B 100LQPF 384 KB 0x5603_24XX 0x2200_4210 TBD MPC5602C 100LQPF 256 KB 0x5602_24XX 0x2000_4310 TBD MPC5602B 144LQPF 256 KB 0x5602_34XX 0x2000_4210 TBD MPC5602B 100LQPF 256 KB 0x5602_24XX 0x2000_4210 TBD MPC5601D 100LQPF 128 KB 0x5601_24XX 0x1800_4410 0x0AE4401D MPC5601D 64LQPF 128 KB 0x5601_04XX 0x1800_4410 0x0AE4401D MPC5602D 100LQPF 256 KB 0x5602_24XX 0x2000_4410 0x0AE4401D MPC5602D 64LQPF 256 KB 0x5602_04XX 0x2000_4410 0x0AE4401D NOTE 0xXX denote mask set and revision number. 5 Migrating from MPC5604B to MPC5607B While migrating an application from MPC5604B to MPC5607B, the user should pay attention to: • Pins • ADC • LinFlex • eMIOS 5.1 Pins PB11 and PD12 are available on MPC5604B on all packages. PB11 and PD12 are not available on MPC5607B on the LQFP100 and LQFP144 packages. If an application on the MPC5604B uses these pins then a modification will be mandatory to route these features to other IOs. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 23 Migrating from MPC5607B to MPC5604B 5.2 ADC MPC5607B and MPC5604B have the same number of ADC0 10-bit channels (sixteen precise, twenty-eight standard, and four extended). However, threshold implementation is different. An application using them on MPC5604B should be modified as follows to migrate to MPC5607B: • Do not use Threshold Control Registers (TRC[0..3]) since they are unavailable on MPC5607B. — Instead use Channel Watchdog Enable Register (CWEN0), with Channel Watchdog Selection Registers (CWSEL[0..1]). • Rewrite usage of Watchdog Threshold Interrupt Mask Register (WTIMR) and Watchdog Threshold Interrupt Status Register (WTISR). — MPC5604B low and high threshold bits are grouped in the registers. — MPC5607B low and high threshold bits are grouped two by two. Therefore usage of these registers must be rewritten. — In addition, MPC5607B Analog Watchdog Out of Range Register (AWORR0) gives information about channel numbers that were out of analog range. 5.3 LinFlex The two first LinFlex modules of the MPC5607B are actually LinFlexD modules, which can handle DMA requests and FIFO for UART mode. Since this module is a superset of the standard LinFlex module present on MPC5604B, there will be no issue in migration, due to this upward compatibility. 5.4 eMIOS Implementation of MPC5607B is a superset of the one present on MPC5604B. Therefore, there will be no issue in migration, due to this upward compatibility. 6 Migrating from MPC5607B to MPC5604B While migrating an application from MPC5607B to MPC5604B, the user should pay attention to: • Pins • Regulator • Clocks • RAM • Flash • DMA • PIT • eMIOS • ADC • CTU • LINFlex Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 24 Freescale Semiconductor Migrating from MPC5607B to MPC5604B • 6.1 DSPI Pins On their common set of features, there will be no issue on pin mapping while migrating. Refer to the pin mapping differences for further details. 6.2 Regulator MPC5607B ballast feature is not available on MPC5604B. 6.3 Clocks MPC5607B ability to have system or RTC clock on the CLKOUT is not available with MPC5604B. Any application relying on this feature will not work. 6.4 RAM MPC5604B has less available RAM in Power Domain 2 than MPC5607B. An application will have to be recoded to fit the smaller RAM size. 6.5 Flash MPC5604B has less available code flash than MPC5607B. An application will have to be recoded to fit the smaller code flash size. Data flash is the same in both cases. 6.6 DMA MPC5607B has a DMA with DMAMUX — MPC5604B does not. Therefore, any code or usage of registers or interrupts related to DMA will not work. An application will need to be recoded without DMA usage. 6.7 PIT MPC5607B has eight PITs. MPC5604B has six. Table 5 and Table 6 show respective implementation details regarding internal connections. Table 5. MPC5607B PIT details PIT Interrupt Peripheral trigger DMA trigger 0 YES NO YES 1 YES NO YES 2 YES 10-bit ADC NO 3 YES CTU ch28 NO Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 25 Migrating from MPC5607B to MPC5604B Table 5. MPC5607B PIT details (continued) PIT Interrupt Peripheral trigger DMA trigger 4 YES NO YES 5 YES NO YES 6 YES 12-bit ADC NO 7 YES CTU ch51 NO Table 6. MPC5604B PIT details PIT Interrupt Peripheral trigger DMA trigger 0 YES NO Not applicable 1 YES NO Not applicable 2 YES 10-bit ADC Not applicable 3 YES CTU ch28 Not applicable 4 YES NO Not applicable 5 YES NO Not applicable Therefore, an application using PIT6 and PIT7 will not work with MPC5604B and must be reworked. 6.8 eMIOS MPC5604B has fewer channels on each eMIOS, and its channels have a different feature set than MPC5607B. Refer to eMIOS comparison to see how to adapt an application for migration. 6.9 ADC MPC5607B has two ADCs, one with 10-bit resolution (ADC0 10-bit) and one with 12-bit resolution (ADC1 12-bit). MPC5604B has only one ADC 10 bit. Any application using ADC1 on MPC5607B will have to be modified to use the ADC0 of MPC5604B. In addition, an application that uses the analog threshold feature will have to be recoded with scheme and quantities of thresholds available on MPC5604B. 6.10 CTU All CTU channels above 31 in MPC5607B do not exist on MPC5604B. 6.11 LINFlex MPC5607B LinFlex 4 to 9 can’t be used on MPC5604B. In addition, LinFlex 0 and 1 lose their DMA ability, FIFO on UART mode, and byte length in UART mode, on MPC5604B. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 26 Freescale Semiconductor Migrating from MPC5607B to MPC5604B 6.12 DSPI MPC5607B DSPI 3 to 5 cannot be used on MPC5604B. Migration and Device Emulation within the MPC560xB/C/D Family, Rev. 0 Freescale Semiconductor 27 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516 2100 East Elliot Road Tempe, Arizona 85284 +1-800-521-6274 or +1-480-768-2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) www.freescale.com/support Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 [email protected] Asia/Pacific: Freescale Semiconductor China Ltd. Exchange Building 23F No. 118 Jianguo Road Chaoyang District Beijing 100022 China +86 10 5879 8000 [email protected] For Literature Requests Only: Freescale Semiconductor Literature Distribution Center 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 [email protected] Document Number: AN4340 Rev. 0 08/2011 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. For information on Freescale’s Environmental Products program, go to http://www.freescale.com/epp. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org © Freescale Semiconductor, Inc. 2011. All rights reserved.