a ONE TECHNOLOGY WAY • P.O. AN-404 APPLICATION NOTE BOX 9106 • NORWOOD, MASSACHUSETTS 02062-9106 • 617/329-4700 Considerations for Mixed Signal Circuit Board Design (How to Design a PCB Layout/Assembly Compatible with the AD1845 and CS4231 Codecs) INTRODUCTION Analog Devices’ AD1845 Parallel-Port, 16-Bit, SoundPort®, Stereo Codec and Crystal Semiconductor’s CS4231 Parallel Interface, Multimedia Audio Codec are “pin-for-pin” compatible. Many customers have had difficulties using these codecs interchangeably because they have slightly different external interface requirements and the parts’ documentation recommend differing power supply circuitry. These design details contribute to the challenges of PC OEMs trying to design a compatible “socket” (a PCB layout compatible with both codecs) for these highly popular audio codecs. This application note shows designers how to put a “socket” in their PC motherboard or plug-in card design that is compatible with both parts (with some minor assembly differences). In addition to the recommended design (provides the highest performance, but requires the most assembly differences), this note describes cost and performance tradeoffs that are available with “compromise” components (reducing the number of assembly differences with compatible external circuitry). Table I lists the assembly differences between an AD1845 and CS4231 system for the recommended codec “socket,” shown in Figure 1. USING A CODEC ON YOUR PCB This application note was inspired by the difficulties several Analog Devices customers reported when putting an AD1845 into PC boards laid out using the specification in the Crystal Semiconductor CS4231 (AD1845 pincompatible codec) data sheet. Reported problems varied from reduced performance to complete part breakdown. This application note explains the design issues involved in designing a codec “socket” that provides the highest performance from both parts. For simplicity, all figures in this application note use AD1845/CS4231 PLCC package pin numbers, but the design principles covered apply as well to other Analog Devices package types. Including a codec in your PC motherboard or plug-in card design (and getting reasonable performance from the part) requires some effort. For the AD1845 and CS4231, a small group of design considerations have a profound influence on the performance of your final design. The design considerations that relate to creating a compatible codec “socket” (a PCB layout compatible with both codecs) for these codecs include the following: • Input Circuit Design This section describes input circuit design and assembly differences between the two codecs for the highest performance, compatible “socket” (shown in Figure 1). • Power Supply Design This section describes compatible codec “socket” power supply design (including the two recommended power supply layouts) and explains what makes some codec vendors’ recommended power supply design incompatible with the AD1845. • Layout Design This section describes layout principles (component placement priorities and grounding) for the highest performance compatible codec “socket.” • Cost/Performance Tradeoffs This section describes a compatible codec socket that does not require any assembly differences for the two codecs (at the expense of lower performance). The application circuits shown in this note are suggestions only. You should choose component values that it the needs of your own design and fall with the specifications of the AD1845 and CS4231 data sheets. SoundPort is a registered trademark of Analog Devices, Inc. FERRITE BEAD +5V REGULATOR VIN VOUT +12V 1µF 10µF 0.1µF 0.1µF FERRITE BEAD +5V 0.1µF 0.1µF 0.1µF 0.1µF 36 19 35 15 7 45 VDD (VD4, VD3, VD1, VD2, NC, NC) VCC (VA2, VA1) CS4231 ONLY 0.1µF 1 0.1µF 10µF 0.1µF 54 +5V 100kΩ PWRDWN (PDWN) 23 33pF 1µF 16.9344MHz 33pF 1µF RESET (NC) 24 21 XTAL21 M_OUT (MOUT) 47 22 XTAL20 47kΩ 33pF 1µF 17 XTAL11 R_OUT (ROUT) 41 24.576MHz 33pF 47kΩ 18 XTAL10 1µF L_OUT (LOUT) 40 47kΩ 1µF 1kΩ AD1845 PLCC (CS4231 PLCC) 29 L_MIC (LMIC) 1000pF AD1845 ONLY 28 R_MIC (RMIC) SA 19:2 ADDRESS DECODE CS (CS) 59 AEN ADR1 (A1) 9 SAI ADR0 (A0) 10 SAO 30 L_LINE (LLINE) 27 R_LINE (RLINE) WR (WR) 61 IOWC RD (RD) 60 IORC XCLL0 (XCTL0) 56 39 L_AUX1 (LAUX1) (SEE L_MIC CIRCUIT) ISA BUS 18 74_245 XCTL1 (XCTL1) 58 42 R_AUX1 (RAUX1) 38 L_AUX2 (LAUX2) 43 R_AUX2 (RAUX2) DATA7 (D7) 65 D7 DATA6 (D6) 66 D6 DATA5 (D5) 67 46 M_IN (MIN) D5 DATA4 (D4) 68 DATA 1µF (1000pF) 26 R_FILT (RFILT) 1µF (1000pF) 31 L_FILT (LFILT) DATA3 (D3) 3 D4 DATA2 (D2) 4 D3 DATA1 (D1) 5 DATA0 (D0) 6 D2 D1 DIR G DBDIR (BDIR) 62 DBEN (DBEN) 63 D0 10µF 32 VREF (VREF) 33 VREF_F (VREFI) 10µF 0.1µF PDRQ (PDRQ) 14 DRQx CDRQ (CDRQ) 12 DRQy PDAK (PDAK) 13 DAKx CDAK (CDAK) 11 DAKy INT (IRQ) 57 GNDA (AGND1, 2) 34 NC (TEST) 37 55 GNDD (DGND3, 4, 7, 8, 1, 2, NC, NC) 16 20 53 64 2 8 44 25 IRQz ANALOG AND DIGITALGND CONNECTED AT ONE POINT BENEATH CODEC ANALOG GND DIGITAL GND Figure 1. Highest Performance AD1845/CS4231 Codec System Diagram Table I. Assembly Differences Between AD1845 And CS4231 For Codec “Socket” (In Figure 1) Component Function For AD1845 Install . . . For CS4231 Install . . . Crystal oscillator and capacitors on XTAL2 input Not required Antialiasing filter on L_MIC, R_MIC, L_LINE, R_LINE, L_AUX1, R_AUX1, L_AUX2, R_AUX2, and M_IN inputs 1 kΩ and 1000 pF 16.9334 MHz crystal and 33 pF (2) Not required, (but can be left installed) External filtering capacitors for L_FILT and R_FILT inputs 1 µF (2) –2– 1000 pF (2) The CS4231 applies its internal low pass antialiasing filtering after the input multiplexer stage and uses the external filter pins to attach 1000 pF capacitors for the low pass filtering. Input Circuit Design Figure 2 shows a portion of the AD1845/CS4231 system and highlights the differences between input circuit designs for an optimum performance codec “socket.” This section describes the following input structure differences between the codecs. • • Note that for a compatible codec “socket” the external low pass antialiasing filter required for the AD1845 is completely compatible with the CS4231 inputs, but the capacitors on the external filter pins MUST change for best performance. If you are (for example) replacing a CS4231 with an AD1845 in your system, the two 1000 pF capacitors must be replaced with 1 µF caps. If the 1000 pF caps are left in, the AD1845’s high pass filter break point moves from 2.6 Hz to 2.4 kHz seriously reducing the audio band frequency performance. This performance reduction includes a nonlinear gain vs. frequency response and an overall reduction in gain. The gain loss can be as much as –30 dB at 20 Hz. Crystal oscillators Analog input filtering Crystal Oscillator As shown in Figure 2, the CS4231 requires two crystal inputs, 24.575 MHz (XTAL1) and 16.9344 MHz (XTAL2). The AD1845 defaults to one crystal input (24.576 MHz), but also can use other frequency sources including the 14.31818 MHz PC bus clock. The AD1845 uses its Variable Sample Frequency Generator to generate any of 50,000 selectable sample rates from the single crystal input. CS4231 ONLY Optional Input Level Scaler The two codecs have slightly different input impedances and their data sheets provide differing designs for scaling 2 V rms line level inputs. (The AD1845 and CS4231 codecs can handle 1 V rms signals.) Figure 3 shows an example voltage divider circuit for use with 2 V rms line level inputs that is compatible with both codecs. For other application related circuits, see the AD1845 and CS4231 Data Sheets. 33pF 21 XTAL21 16.9344MHz 33pF 22 XTAL20 33pF 17 XTAL11 24.576MHz 33pF CRYSTAL OSCILLATOR INPUT DIFFERENCES 18 XTAL10 1kΩ 1µF L_MIC (LMIC) 2kΩ 1µF R_MIC (RMIC) 1000pF L_LINE (LLINE) AD1845 ONLY 1000pF 2kΩ R_LINE (RLINE) L_AUX1 (LAUX1) R_AUX1 (RAUX1) L_AUX2 (LAUX2) R_AUX2 (RAUX2) 1µF (1000pF) M_IN (MIN) ANALOG INPUT FILTER DIFFERENCES THE 2kΩ RESISTORS ACT AS A VOLTAGE DIVIDER L_MIC (LMIC) R_MIC (RMIC) L_LINE (LLINE) R_LINE (RLINE) L_AUX1 (LAUX1) AD1845 (CS4231) R_AUX1 (RAUX1) L_AUX2 (LAUX2) R_AUX2 (RAUX2) M_IN (MIN) 26 R_FILT (RFILT) Figure 3. AD1845/CS4231 Codec Input Structures with Voltage Dividers Diagram 1µF (1000pF) 31 L_FILT (LFILT) 10µF 32 VREF (VREF) Power Supply Design Your power supply distribution strategy must account for the mixed signal (analog & digital) nature of the AD1845 and CS4231 codecs. For power supply design considerations, think of these codecs as having a digital section (digital portions of ADC, DAC, and ISA bus drivers) and analog section (analog portions of ADC, DAC, multiplexer, and output mixer stages). AD1845 PLCC (CS4231 PLCC) 33 VREF_F (VREFI) 10µF 0.1µF Figure 2. AD1845/CS4231 Codec Input Structures Diagram This section presents two successful strategies for compatible power supply design and explains what makes the power supply strategy described by other codec vendors’ documentation incompatible with the AD1845. Input Filtering As shown in Figure 2, each of the AD1845’s ADC analog inputs (MIC, LINE, AUX1, AUX2, & M_IN) require an external low pass antialiasing filter (1 kΩ and 1000 pF), and the AD1845 uses 1 µF capacitors on the external filter pins to apply a 2.6 Hz high pass filter to the ADC. –3– Recommended Power Supply Design Figure 4 shows the recommended power supply design. This method regulates the codec’s +5 volt analog supply from the PC’s +12 volt supply and uses the PC’s +5 volt supply directly for the codec’s digital supply. While this method does require more parts, the regulated analog supply provides better noise isolation for the analog side of the chip and yields improved converter performance. The dynamic range of this design is 1.5 dB better than the alternate power supply method shown in Figure 5. +12V +5V FERRITE REGULATOR BEAD VIN VOUT FERRITE BEAD +5V 10µF 0.1µF 1µF 36 0.1µF 0.1µF 19 35 0.1µF 15 VCC (VA2, VA1) 0.1µF 0.1µF 0.1µF 1 7 45 VDD (VD4, VD3, VD1, VD2, NC, NC) 10µF 0.1µF 0.1µF 54 RECOMMENDED P/S FOR AD1845 PLCC (CS4231 PLCC) 34 GNDD (DGND3, 4, 7, 8, 1, 2, NC, NC) NC (TEST) GNDA (AGND1, 2) 55 37 16 20 53 64 2 44 8 ANALOG AND DIGITALGND CONNECTED AT ONE POINT BENEATH CODEC 25 ANALOG GND Figure 4. AD1845/CS4231 Codec Recommended Power Supply Diagram Alternative Recommended Power Supply Design Figure 5 shows an alternative power supply design. This design uses the PC’s +5 volt supply for the codec’s analog and digital supplies, isolating the supplies with small inductors (ferrite beads) to minimize stray noise causing currents. The advantages of this supply design are its low part count and cost reduction; each at the expense of a slightly lower dynamic range than the system shown in Figure 4. +5V FERRITE BEAD 1µF 0.1µF 1µF 1Ω 0.1µF 0.1µF 19 36 35 VCC (VA2, VA1) FERRITE BEAD 0.1µF 15 0.1µF 0.1µF 0.1µF 0.1µF 7 45 VDD (VD4, VD3, VD1, VD2, NC, NC) 1 0.1µF 1µF 54 ALTERNATE P/S FOR AD1845 PLCC (CS4231 PLCC) GNDA (AGND1, 2) 34 37 NC (TEST) 55 GNDD (DGND3, 4, 7, 8, 1, 2, NC, NC) 16 20 53 64 2 8 44 25 ANALOG AND DIGITAL GND CONNECTED AT ONE POINT BENEATH CODEC Figure 5. AD1845/CS4231 Codec Alternate Power Supply Diagram –4– DIGITAL GND Avoid Vendor/Codec Specific Power Supply Design! A third strategy for power supply design, shown in Figure 6, divides the codec into three sections (analog and two digital). The sections are analog, internal digital, and external digital (ISA bus drivers). Unfortunately this power supply design strategy yields a vendor/codec specific system and should be avoided if you want to design a compatible codec socket. FERRITE BEAD +12V The problem with this particular power supply design (recommended in some codec vendors’ documentation) is the assumption that all codec manufacturers assign digital power pins in the same manner. Tables II and III show how the supply pinouts for the AD1845 and CS4231 are (virtually) identical for a two supply design, but differ greatly for a three supply design. FERRITE BEAD +5V REGULATOR VIN VOUT +5V 10µF 0.1µF 0.1µF 1µF 0.1µF 0.1µF INTERNAL DIGITAL RETURN ANALOG RETURN 0.1µF 0.1µF 1µF 1µF EXTERNAL DIGITAL RETURN VENDOR/CODEC SPECIFIC TRIPLE P/S NOT RECOMMENDED ANALOG SUPPLY INTERNAL DIGITAL RETURN EXTERNAL DIGITAL RETURN ANALOG AND DIGITALGND CONNECTED AT ONE POINT BENEATH CODEC Figure 6. Vendor/Codec Specific Power Supply Diagram—Not Recommended Table II shows that in the dual supply design the codecs’ power supply pinouts are identical, and Table III shows the difference between the two codecs’ power supply pinouts in a triple supply design. If you use this triple supply design, you are designing a vendor specific system. Table II. AD1845 vs. CS4231 Codec Dual Power Supply Pinout Codec Power Supply Line AD1845 Pinout CS4231 Pinout Digital +5 V 1, 7, 15, 19, 45, 54 1, 7, 15, 19 45 and 54–NC) Digital Ground 2, 8, 16, 20, 25, 44, 2, 8, 16, 20, 53, 53, 64 64 (25 and 44–NC) Analog +5 V 35, 36 35, 36 Analog Ground 34, 37 34, 37 Suppose, for example, that you designed a triple supply system for the AD1845. In such a system, the +5 V regulator’s output is tied to all of the AD1845’s internal digital power pins (15, 45), and all of the ISA driver power pins (1, 7, 19, 54) are tied to the ISA supply. If you needed to install the CS4231 in this system for some reason, you would find that the Crystal part will not work because “socket” Pin 19 is connected to the ISA supply and Pin 15 to the regulator to support the AD1845. These two pins are connected together in the CS4231 codec and the triple supply design for the AD1845 uses the Crystal part as a short between the ISA supply and the regulator’s output. If there is any substantial difference between the ISA +5 V and the regulator +5 V, the CS4231 will (at worst) burn out or (at best) the system will not achieve optimum performance because the digital noise from the ISA supply is coupled through the codec onto the analog supply. Table III. AD1845 vs. CS4231 Codec Triple Power Supply Pinout Codec Power Supply Line* AD1845 Pinout CS4231 Pinout External Digital (ISA Bus Driver) +5 V External Digital (ISA Bus Driver) Ground Internal Digital +5 V Internal Digital Ground Analog +5 V Analog Ground 1, 7, 19, 54 1, 7 2, 8, 20, 53, 64 15, 45 16, 25, 44 35, 36 34, 37 2, 8 15, 19 16, 20, 53, 64 35, 36 34, 37 Because triple power supply designs (recommended in some codec vendors’ documentation) tend to treat other vendors’ parts as a short (either through the part’s power pins or substrate), these designs produce vendor/ codec specific systems. *NOTE: Division of digital power among internal/external digital power pins on Analog Devices codecs is subject to change without notice. Do NOT base power distribution designs on the information in Table III. Note: If you want to design a system that can use any AD1845 compatible codec, do not use a triple power supply design. –5– etch—the greater the inductance. Figure 7 shows a representation of a bypassing circuit between a codec power pin and ground as a capacitor in series with an inductor. Note that the value of the inductor in Figure 7 is directly related to the etch length between the capacitor and the power pin. Layout Design When laying out a PCB for mixed signal devices, like codecs, be aware that a small set of layout geometry issues have a profound effect on component performance. This section examines the following mixed signal PCB layout issues. • Effects of “long-etch” impedance (impedance associated with trace between chip pin and capacitor) on the performance of bypass capacitors, VREF capacitors, and antialiasing circuits. CODEC POWER PIN +5V "LONG-ETCH" INDUCTANCE EFFECT, APPROXIMATELY 1nH/mm • Effects of ground and supply plane geometry on performance of mixed signal components. 0.1µF This section concludes with the following guidelines for AD1845 codec PCB design. BYPASS CAPACITOR Figure 7. “Long-Etch” Inductance Effect Model • A recommended ground and supply plane geometry. A bypassing circuit is supposed to be a low impedance point for high frequency currents. Because the impedance of the bypassing circuit is dependent on the distance between the capacitor and the power pin, the “long-etch” inductance effect can force stray high frequency currents on the power pin into the part when the part become the path of least resistance to the ground plane. At typical codec operating frequencies for example, a “bypass” capacitor connected to a power pin with a 20 mm (0.5 in) trace is actually a 3.55 MHz bandpass filter. • A priority list for close placement of external components. • A summary of recommendations for mixed signal PCB layout. Effects of “Long-Etch” Impedance Bypass capacitors on your PCB are suppose to reduce noise by acting as shorts for noise generated by digital components and the digital side of mixed signal components. For example, a codec generates noise as it operates when its internal digital circuitry turns currents on and off. These current changes show up on the power and ground pins for the associated section of the codec. For each change in power pin current, there is a change in ground pin current. A bypass capacitor placed in close proximity to the part couples stray power currents back into the codec through the nearest ground pin. Without bypass capacitors, these stray currents move over nearby power/ground planes and increase the noise of the PCB. To avoid “long-etch” effects, use the shortest possible traces for bypass and filter capacitors. Also note that using 3 to 5 mm wide etches for capacitor connections reduces inductance effects as well (highly recommended). The AD1845 is available in PLCC or TQFP packages. The small physical dimensions of these packages can make it challenging to place all the required capacitors close to the part. Because some pins have a much greater effect on performance than others, use the information in Table IV to prioritize component placement. Pins with an “A” priority in Table IV should be connected to their associated capacitors with the shortest traces possible. Figure 8 also shows the distribution of codec bypass and filter capacitor locations and placement priorities. Close placement of bypass and filter capacitors to the codec is crucial for a low noise PCB. The need for close placement of these external components stems from the effects of long etch length between capacitors and codec pins. At the operating frequency of the codec, lengths of etch act as small inductors; the longer the Table IV. AD1845 Compatible Codec Capacitor Placement Priorities Priority of Close Proximity to Chip Pin Placement of Filter and Decoupling Capacitors Signal Description PLCC Package Pins Voltage Reference (VREF) 32 A Voltage Reference Filter (VREF_F) 33 A Digital Supply Voltage, +5 V (VDD) 1, 7, 15, 19, 45, 54 B Channel Filters (L_FILT and R_FILT) 26, 31 B Analog Supply Voltage, +5 V (VCC) 35, 36 C Analog Signal Inputs (Filter and Decouple) (L_LINE, R_LINE, L_MIC, R_MIC, L_AUX1, R_AUX1, L_AUX2, R_AUX2, & M_IN) 27, 28, 29, 30, 38, 39, 42, 43, 46 D –6– Effects of Ground and Supply Plane Geometry Figure 8 shows an example ground plane layout for an AD1845 PLCC package. This layout separates the analog and digital ground planes with a 2 to 3 mm gap and connects them at one point beneath the codec with a single 3 to 4 mm wide link. The ground planes reduce board noise by “shielding” analog lines from digital interference. The link between the planes, as close to the codec as possible, prevents any potential difference due to ESD or fault currents. Without the link, these currents could flow through the codec’s substrate degrading performance. You should try to avoid running any digital or analog signal traces across the gap between the digital and analog planes. B Digital noise coupled onto the analog portion of the chip has three possible current return routes. The first return path is back through VCC and VDD where the currents are capacitively coupled to their respective ground planes. The second possible path is through the component’s substrate which has an ≈10 Ω characteristic impedance. The final return path is through the external analog and digital ground plane connection. By keeping the ground plane connection as close to the part as possible, the ground connection becomes the path of least resistance and minimizes the amount of digital current pushed into the substrate. If the ground connection is a long distance from the part, returning current tends to use the substrate connection— increasing signal noise in the part. DIGITAL GROUND PLANE CODEC PIN NUMBERS 9 pins (mentioned above), the importance of power/ ground planes in reducing overall PCB noise cannot be over emphasized. B 61 10 This current path example is simplistic and is only a model of how a PCB’s layout can help reduce noise. For more information on how noise coupling really works, see any of the texts listed in the References section. 60 B AD1845 COMPATIBLE PLCC FOOTPRINT B B Codec PCB Layout Strategy Summary This section summarizes the layout suggestions for an AD1845 compatible codec “socket.” To get the best performance from the codec in your system, apply the following principles to your board’s layout: D B B 26 • Locate filter and decoupling capacitors as close as possible to their corresponding codec pins (Table IV and Figure 8 describe the specifics and priorities this process entails for an AD1845/CS4231 “socket”). Close placement of capacitors to the chip pins helps to avoid noise related to long-trace inductance effects. 44 43 27 DDDDBAA CC DD PRIORITY LEVEL FOR CLOSE PROXIMITY PLACEMENT OF FILTER & DECOUPLING CAPACITORS (A, B, & C) DD ANALOG GROUND PLANE • Use a split (separate analog and digital) ground plane and matching non-overlapping +5 V supply planes. The power and ground planes should be separated by approximately 1 mm (i.e., four layer PCB). A single 3 to 4 mm wide link under the codec connects the ground planes (see Figure 8). Matching ground and power planes provide a highly effective low ESR and low ESL bypass capacitor for the system. Figure 8. AD1845 Compatible Codec Recommended Ground Plane and Capacitor Placement During PCB development, you may find it useful to provide removable links between the ground planes in several PCB locations, to permit debugging and testing for ground isolation. Another way to reduce PCB noise, in addition to ground planes, is to include separate digital and analog power supply planes directly over their respective ground planes—no overlapping of supply planes. The supply and ground plane pairs should be separated by approximately 1 mm. This recommendation implies that you use a four layer PCB (at least) with the ground and power planes forming a high capacitive “sandwich.” This layout technique yields an extremely effective, low ESR/low ESL power distribution scheme. • Locate analog and digital components only over their respective ground planes and decouple their power pins as closely to the chip pin as possible. Route analog and digital signal traces only over their respective ground planes. These steps greatly reduce noise in the analog section. • Avoid using IC sockets for any analog components. • Enable only a single oscillator on a PC board at a time (if possible). This is not always a problem, but be aware that some system problems can occur as a result of interference frequencies between multiple crystal oscillators entering the codec through the analog or digital supplies or signal/reference pins. For a layout that helps reduce noise, locate all digital components over the digital power/ground plane sandwich and all analog components over the analog power/ ground plane sandwich. Though this technique does not eliminate the need for bypass capacitors at the power –7– Cost Reduction Design Choice Resulting Performance Tradeoff Use .3 µF capacitors on the external filter pins for both the AD1845 and CS4231. While this method eliminates an assembly difference between using the codecs, the drawback of using .3 µF capacitors is degraded performance of both parts. A CS4231 in such a design has reduced high frequency performance and an AD1845 has reduced low frequency performance. Eliminate external antialiasing filter circuits. While it is possible to use the AD1845 without antialiasing filters (the CS4231 does not need them), the drawback of this design choice is that codec performance can be dramatically affected if noise is capacitively coupled into the ADC’s inputs. Reduce the number of bypass capacitors through having common sectional power pins use the same capacitor for bypassing. While this method does reduces part count and cost, the placement of of the remaining capacitors becomes more difficult, bypassing efficiency is reduced, and the sound card has more noise problems. • Minimize capacitive loading on digital output pins. For digital signals, driving “long” traces, you may have to terminate the trace in its characteristic impedance (typically 100 Ω) to prevent over/undershoot and ringing. E2039–5–8/95 Table V. Codec System Design Cost/Performance Tradeoffs CONCLUSION Placing an AD1845/CS4231 compatible codec “socket” on your PC motherboard or plug-in card design is not difficult. For optimum performance from each part, such a “socket”—using a PCB layout common to both parts— does entail minor assembly differences between the codecs (see Table I and Figure 1). Using the guidelines in the Cost Vs. Performance Design section, you can design a compatible codec “socket” that does not require any external component differences besides the codec (with some loss in performance). For more information on application circuits for the AD1845, see the AD1845 data sheet and the reference documents listed. • Be aware of the effects that inductor/transformer’s external magnetic fields may have on analog circuitry. Use electrostatic and magnetically shielded components as necessary. RF decoupling chokes mounted at right angles minimize mutual inductance. Mount power transformers off the board and orient them with the most intense area of their external fields away from critical analog circuits. Use toroidal power transformers to minimize external fields. REFERENCES The sources listed below contributed information to this applications note. They provide recommendations and techniques for high-speed and mixed-signal design: • Shield analog I/O lines by running “shield” traces between them and/or running them over an analog ground plane. Mixed Signal Processing Design Seminar, Analog Devices, Inc., 1991, ISBN-0-916550-08-7. COST VS. PERFORMANCE DESIGN Sometimes lower cost is much more important than high performance. Table V lists methods for cutting systems costs and describes their corresponding performance reduction. High Speed Design Seminar, Analog Devices, Inc., 1990, ISBN 0-916550-07-9. Noise Reduction Techniques in Electronic Systems, 2nd Ed, Henry W. Ott, Wiley Interscience, 1988. Interfacing Techniques in Digital Design With Emphasis on Microprocessors, Ronald L. Krutz, John Wiley, 1988. Audio/Video Reference Manual, Analog Devices, Inc., 1992. Systems Application Guide, Analog Devices, Inc., 1993, ISBN 0-916550-13-3. High-Speed Digital Design, A Handbook of Black Magic, H. W. Johnson, M. Graham, PTR Prentice Hall, 1993. ISBN 0-13-395724-1. –8– PRINTED IN U.S.A. Applications Reference Manual, Analog Devices, Inc., 1993. Especially refer to collected Application Notes— Section 24—AN-214, AN-280, AN-282, AN-345, AN-346, AN-347, AN-353, AN-362.