NT IA PL M CO S oH *R Features Applications ■ Lead free as standard ■ Personal Digital Assistants (PDAs) ■ RoHS compliant* ■ Notebook and PC computers ■ Low capacitance - 1.3 pF ■ Memory card protection ■ ESD protection >25 kV ■ SIM card port protection ■ Surge protection ■ Portable electronics CDSC706-0504C - Surface Mount TVS Diode Array General Information The CDSC706-0504C device provides ESD, EFT and Surge protection for high speed data ports meeting IEC 61000-4-2 (ESD), IEC 61000-4-4 (EFT) and IEC 61000-4-5 (Surge) requirements. The Transient Voltage Suppressor array, protecting up to 4 data lines, offers a Working Peak Reverse Voltage of 5 V and Minimum Breakdown Voltage of 6 V. The SC70-6L packaged device will mount directly onto the industry standard SC70-6 footprint. Bourns® Chip Diodes conform to JEDEC standards, are easy to handle with standard pick and place equipment and the flat configuration minimizes roll away. 5 1 3 4 6 2 Thermal Characteristics (@ TA = 25 °C Unless Otherwise Noted) Parameter Symbol CDSC706-0504C Unit IPP 6.5 A Storage Temperature TSTG -55 to +150 ºC Operating Temperature TOPR -55 to +85 ºC VDC 6 V Vesd IO 18 14 kV Vesd VCC 30 30 kV VIO (GND-0.5) to (VCC+0.5) V Symbol CDSC706-0504C Unit VRWM 5.0 V IL 5.0 µA ICD 1.0 µA VBR 6.0 V Maximum Forward Voltage 4 @ IF = 15 mA VF 1.0 V Maximum Clamping Voltage 2 @ 5 A 8/20us VC 9.0 V Vclamp io 12.5 V CIN 1.6 pF Max. Channel to Channel Input Capacitance 3 @ VPIN5=5 V, VPIN2=0 V, VIN=2.5 V, f=1 MHz CCROSS 0.14 pF Max. Variation of Channel Input Capacitance @ VPIN5=5 V, VPIN2=0 V, VIN=2.5 V, f=1 MHz (I/O Pin to GND) ΔCIN 0.07 pF Peak Pulse Power (tp = 8/20 µs) Operating Supply Voltage ESD per IEC61000-4-2 (Air) (I/O Pins) ESD per IEC61000-4-2 (Contact) (I/O Pins) ESD per IEC61000-4-2 (Air) (VCC to GND) ESD per IEC61000-4-2 (Contact) (VCC to GND) DC Voltage at any I/O Pin Electrical Characteristics (@ TA = 25 °C Unless Otherwise Noted) Parameter Maximum Reverse Standoff Voltage 1 Maximum Leakage Current 1 @ VRWM Maximum Channel Leakage Current @ VRWM Minimum Reverse Breakdown Voltage @ IBV=1 mA 1 Typical ESD Clamping Voltage- I/O 2 Maximum Channel Input Capacitance 2 @ VPIN5=5 V, VPIN2=0 V, VIN=2.5 V, f=1 MHz Notes: 1: Pin 5 to Pin 2 (ground) 2: Pin 1, 3, 4 or 6 to Pin 2 (ground) *RoHS Directive 2002/95/EC Jan 27 2003 including Annex. Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications 3: Between any two of pins 1, 3, 4, 6. 4: Pin 2 (ground) to Pin 5 CDSC706-0504C - Surface Mount TVS Diode Array Product Dimensions Recommended Footprint This is a molded JEDEC SC70-6L package with lead free 100 % Matte Sn on the lead frame. It weighs approximately 7 mg and has a flammability rating of UL 94V-0. 1.72 (0.068) 0.15 - 0.30 (0.006 - 0.012) 0.65 (0.026) 6 5 1.30 (0.051) 4 2.00 - 2.20 (0.078 - 0.087) 1 2 0.10 (0.004) 0.50 (0.020) 3 0.08 - 0.25 (0.003 - 0.001) 1.15 - 1.35 (0.045 - 0.055) 1.30 (0.512) 0.65 (0.026) 0 - 10 ° 0.60 (0.024) 0.26 - 0.46 (0.010 - 0.018) 1.90 - 2.15 (0.074 - 0.084) DIMENSIONS = MILLIMETERS (INCHES) 0.80 - 1.00 (0.031 - 0.040) 0.80 - 1.10 (0.031 - 0.043) DIMENSIONS = MILLIMETERS (INCHES) Typical Part Marking CDSC706-0504C ....................................................................... C05 How to Order Configuration CD SC706 - 05 04 C I/O 4 VDD I/O 3 6 5 4 Common Diode Chip Diode Package SC706 = SC70-6L Package Working Peak Reverse Voltage 05 = 5 VRWM (Volts) Number of Lines 04 = 4 Data Lines Suffix C = Low Capacitance 1 2 3 I/O 1 GND 1/O 2 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications CDSC706-0504C - Surface Mount TVS Diode Array Rating & Characteristic Curves 12 11 10 9 8 7 6 5 4 3 2 1 0 Pulse Waveform IPP – Peak Pulse Current (% of IPP) Clamping Voltage - Volts Clamping Voltage vs. Peak Pulse Current Waveform Parameters: tr = 8 µs td = 20 µs I/O pin to GND pin 120 80 et 60 40 td = t|IPP/2 20 0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 0 5 10 Peak Pulse Current (Amps) 25 15 0.2 5 2 % of Rated Power or IPP 5 Volts per Division 20 25 30 Power Derating Curve 30 -5 -72.000 ns 15 t – Time (µs) Overshoot and Clamping Voltage 28.000 ns 128.000 ns 110 100 90 80 70 60 50 40 30 20 10 0 0 25 50 ESD Test Pulse: 25 kilovolt, 1/30 ns (waveshape) 75 100 125 150 Ambient Temperature, TA (°C) Forward Voltage vs. Forward Current Typical Variation of Cin vs. Vin 4.0 2.0 1.8 3.5 3.0 Input Capacitance (pF) Forward Voltage - Volts Test Waveform Parameters tt = 8 µs td = 20 µs tt 100 2.5 2.0 1.5 1.0 Waveform Parameters: tr = 8 µs td = 20 µs I/O pin to GND pin 0.5 0.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 Peak Pulse Current (Amps) Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications 1.6 1.4 1.2 1.0 0.8 0.6 VDD = 5 V, GND = 0 V, f = 1 MHz, T = 25 °C 0.4 0.2 0.0 0 1 2 3 Input Voltage (V) 4 6 CDSC706-0504C - Surface Mount TVS Diode Array Packaging Information The product is packaged in an 8 mm x 4 mm tape and reel format per EIA-481-A standard. P 0 P 1 d T E Index Hole 120 ° F D2 W B D1 D P A Trailer ....... ....... End C Device ....... ....... ....... ....... Leader ....... ....... W1 Start DIMENSIONS: MM (INCHES) 10 pitches (min.) 10 pitches (min.) Direction of Feed Item Symbol SC70-6L Carrier Width A 2.25 ± 0.10 (0.088 ± 0.004) Carrier Length B 2.34 ± 0.10 (0.092 ± 0.004) Carrier Depth C 1.22 ± 0.10 (0.048 ± 0.004) Sprocket Hole d 1.55 ± 0.05 (0.061 ± 0.002) Reel Outside Diameter D 178 (7.008) Reel Inner Diameter D1 50.0 MIN. (1.969) Feed Hole Diameter D2 13.0 ± 0.20 (0.512 ± 0.008) Sprocket Hole Position E 1.75 ± 0.10 (0.069 ± 0.004) Punch Hole Position F 3.50 ± 0.05 (0.138 ± 0.002) Punch Hole Pitch P 4.00 ± 0.10 (0.157 ± 0.004) Sprocket Hole Pitch P0 4.00 ± 0.10 (0.157 ± 0.004) Embossment Center P1 2.00 ± 0.05 (0.079 ± 0.002) Overall Tape Thickness T 0.20 ± 0.10 (0.008 ± 0.004) Tape Width W 8.00 ± 0.20 (0.315 ± 0.008) Reel Width W1 Quantity per Reel -- 14.4 MAX. (0.567) 3000 07/09 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications