DM74LS469 8-Bit Up/Down Counter General Description The ’LS469 is an 8-bit synchronous up/down counter with parallel load and hold capability. Three function-select inputs (LD, UD, CBI) provide one of four operations which occur synchronously on the rising edge of the clock (CK). The LOAD operation loads the inputs (D7–D0) into the output register (Q7–Q0). The HOLD operation holds the previous value regardless of clock transitions. The INCREMENT operation adds one to the output register when the carry-in input is TRUE (CBI = LOW), otherwise the operation is a HOLD. The carry-out (CBO) is TRUE (CBO = LOW) when the output register (Q7–Q0) is all HIGHs, otherwise FALSE (CBO = HIGH). The DECREMENT operation subtracts one from the output register when the borrow-in input is TRUE (CBI = LOW), otherwise the operation is a HOLD. The borrow-out (CBO) is TRUE (CBO = LOW) when the output register (Q7–Q0) is all LOWs, otherwise FALSE (CBO = HIGH). Connection Diagram The output register (Q7–Q0) is enabled when OE is LOW, and disabled (HI-Z) when OE is HIGH. The output drivers will sink the 24 mA required for many bus-interface standards. Two or more ’LS469 octal up/down counters may be cascaded to provide larger counters. Features/Benefits n 8-bit up/down counter for microprogram-counter, DMA controller and general-purpose counting applications n 8 bits matches byte boundaries n Bus-structured pinout n 24-pin SKINNYDIP saves space n 3-STATE outputs drive bus lines n Low current PNP inputs reduce loading n Expandable in 8-bit increments Standard Test Load Top View DS008333-3 DS008333-1 Order Number DM54LS469J, DM74LS469J or DM74LS469N See Package Number J24F or N24C © 1998 Fairchild Semiconductor Corporation DS008333 www.fairchildsemi.com DM74LS469 8-Bit Up/Down Counter April 1998 Function Table OE CK LD UD CBI D7–D0 Q7–Q0 H X X X X X Z HI-Z L ↑ L X X D D LOAD L ↑ H L H X Q HOLD L ↑ H L L X Q plus 1 INCREMENT L ↑ H H H X Q HOLD L ↑ H H L X Q minus 1 DECREMENT www.fairchildsemi.com Operation 2 Absolute Maximum Ratings (Note 1) Off-State Output Voltage Storage Temperature 7V 5.5V Supply Voltage VCC Input Voltage 5.5V −65˚C to +150˚C Operating Conditions Symbol Parameter Military Min Typ 5 VCC Supply Voltage 4.5 TA Operating Free-Air Temperature −55 tW Width of Clock Commercial Min Typ Max 5.5 4.75 5 5.25 V 125 (Note 2) 0 75 ˚C Low 40 35 High 30 25 tSU Set Up Time 60 th Hold Time 0 Units Max 10 ns 50 −15 0 ns −15 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Note 2: Case Temperature Electrical Characteristics Over Operating Conditions Symbol Parameter VIL Low-Level Input Voltage VIH High-Level Input Voltage VIC Input Clamp Voltage Test Conditions VCC = MIN VCC = MAX II = −18 mA VI = 0.4V VI = 2.4V VI = 5.5V IIL Low-Level Input Current High-Level Input Current II Maximum Input Current VCC = MAX VCC = MAX IOL = 12 mA Low-Level Output Voltage VCC = MIN VIL = 0.8V MIL VOL VIH = 2V VCC = MIN COM MIL IOL = 24 mA IOH = −2 mA VIL = 0.8V VIH = 2V COM High-Level Output Voltage Off-State Output Current VIL = 0.8V VIH = 2V IOS Output Short-Circuit Current (Note 3) VCC = 5.0V ICC Supply Current VCC = MAX IOZH Max Units 0.8 V −1.5 V −0.25 mA V 25 µA 1 mA 0.5 V 2.4 VCC = MAX IOZL Typ (Note 4) 2 IIH VOH Min V IOH = −3.2 mA VO = 0.4V VO = 2.4V VO = 0V −100 −30 120 µA 100 µA −130 mA 180 mA Note 3: No more than one output should be shorted at a time and duration of the short-circuit should not exceed one second Note 4: All typical values are VCC = 5V, TA = 25˚C. 3 www.fairchildsemi.com Switching Characteristics Over Operating Conditions Symbol Parameter Test Conditions Military (See Test Load/Waveforms) fMAX Maximum Clock Frequency Min Typ Commercial Max 10.5 Min Typ Units Max 12.5 MHz tPD CBI to CBO Delay 60 35 50 ns Clock to Q CL = 50 pF R1 = 200Ω 35 tPD 20 35 20 30 ns tPD Clock to CBO R2 = 390Ω 55 95 55 80 ns tPZX Output Enable Delay 20 45 20 35 ns tPXZ Output Disable Delay 20 45 20 35 ns www.fairchildsemi.com 4 Logic Diagram LS469 DS008333-2 5 www.fairchildsemi.com 6 Physical Dimensions inches (millimeters) unless otherwise noted 24-Pin Narrow Ceramic Dual-In-Line Package (J) Order Number DM54LS469J or DM74LS469J Package Number J24F 24-Pin Narrow Plastic Dual-In-Line Package (N) Order Number DM74LS469N Package Number N24C 7 www.fairchildsemi.com DM74LS469 8-Bit Up/Down Counter LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and (c) whose device or system, or to affect its safety or effectiveness. failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. Fairchild Semiconductor Corporation Americas Customer Response Center Tel: 1-888-522-5372 www.fairchildsemi.com Fairchild Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 8 141-35-0 English Tel: +44 (0) 1 793-85-68-56 Italy Tel: +39 (0) 2 57 5631 Fairchild Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: +852 2737-7200 Fax: +852 2314-0061 National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.