Revised March 2005
74ALVC86
Low Voltage Quad 2-Input Exclusive-OR Gate with
3.6V Tolerant Inputs and Outputs
General Description
Features
The ALVC86 contains four 2-input exclusive OR gates.
This product is designed for low voltage (1.65V to 3.6V)
VCC applications with I/O compatibility up to 3.6V
■ 1.65V to 3.6V VCC supply operation
The 74ALVC86 is fabricated with an advanced CMOS
technology to achieve high-speed operation while maintaining low CMOS power dissipation.
■ 3.6V tolerant inputs and outputs
■ tPD
3.5 ns max for 3.0V to 3.6V VCC
4.4 ns max for 2.3V to 2.7V VCC
7.8 ns max for 1.65V to 1.95V VCC
■ Power-off high impedance inputs and outputs
■ Uses patented Quiet Series¥ noise/EMI reduction
circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
Human body model ! 2000V
Machine model ! 250V
Ordering Code:
Order Number
Package
74ALVC86M
Package Description
Number
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ALVC86MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ALVC86MTCX_NL
(Note 1)
MTC14
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
An , Bn
Inputs
On
Outputs
Quiet Series¥ is a trademark of Fairchild Semiconductor Corporation
© 2005 Fairchild Semiconductor Corporation
DS500718
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74ALVC86 Low Voltage Quad 2-Input Exclusive-OR Gate with 3.6V Tolerant Inputs and Outputs
December 2001
74ALVC86
Absolute Maximum Ratings(Note 2)
Supply Voltage (VCC)
DC Input Voltage (VI)
Output Voltage (VO) (Note 3)
Recommended Operating
Conditions (Note 4)
0.5V to 4.6V
0.5V to 4.6V
0.5V to VCC 0.5V
Power Supply
Operating
DC Input Diode Current (IIK)
VI 0V
0V to VCC
50 mA
Output Voltage (VO)
0V to VCC
50 mA
Minimum Input Edge Rate ('t/'V)
DC Output Diode Current (IOK)
Free Air Operating Temperature (TA)
VO 0V
DC Output Source/Sink Current
VIN
r50 mA
(IOH/IOL)
Supply Pin (I CC or GND)
0.8V to 2.0V, VCC
40qC to 85qC
3.0V
10 ns/V
Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
DC VCC or GND Current per
Storage Temperature Range (TSTG)
1.65V to 3.6V
Input Voltage (VI)
r100 mA
65qC to 150qC
Note 3: IO Absolute Maximum Rating must be observed.
Note 4: Floating or unused inputs must be held HIGH or LOW.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
Parameter
VCC
Conditions
(V)
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
Min
1.65 -1.95
0.65 x VCC
2.3 - 2.7
1.7
2.7 - 3.6
2.0
Max
V
1.65 -1.95
0.35 x VCC
2.3 - 2.7
0.7
2.7 - 3.6
0.8
IOH
100 PA
1.65 - 3.6
VCC - 0.2
IOH
4 mA
1.65
1.2
IOH
6 mA
2.3
2
IOH
12 mA
2.3
1.7
2.7
2.2
Units
V
V
3.0
2.4
IOH
24 mA
3.0
2
IOL
100 PA
1.65 - 3.6
0.2
IOL
4 mA
1.65
0.45
IOL
6 mA
2.3
0.4
IOL
12mA
2.3
0.7
IOL
24 mA
2.7
0.4
3
0.55
V
II
Input Leakage Current
0 d VI d 3.6V
3.6
r5.0
PA
IOZ
3-STATE Output Leakage
0 d VO d 3.6V
3.6
r10
PA
ICC
Quiescent Supply Current
VI
3.6
40
PA
'ICC
Increase in ICC per Input
VIH
3 -3.6
750
PA
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VCC or GND, IO
VCC 0.6V
2
0
TA
Symbol
CL
Parameter
V CC
tPHL, tPLH
Propagation Delay
Bus to Bus
40qC to 85qC, RL
500:
50 pF
3.3V r 0.3V
V CC
2.7V
V CC
CL
30 pF
2.5V r 0.2V
V CC
1.8V r 0.15V
Min
Max
Min
Max
Min
Max
Min
Max
1.1
3.5
1.3
4.4
0.8
3.9
1.0
7.8
Units
ns
Capacitance
Symbol
Parameter
TA
Conditions
25qC
VCC
Typical
Units
CIN
Input Capacitance
VI
0V or VCC
3.3
6
pF
COUT
Output Capacitance
VI
0V or VCC
3.3
7
pF
CPD
Power Dissipation Capacitance
3.3
20
2.5
20
Outputs Enabled f
10 MHz, CL
50 pF
pF
AC Loading and Waveforms
TABLE 1. Values for Figure 1
TEST
SWITCH
tPLH,tPHL
Open
FIGURE 1. AC Test Circuit
TABLE 2. Variable Matrix
(Input Characteristics: f 1MHz; tr tf 2ns; Z0
Symbol
50:
VCC
3.3V r 0.3V
2.7V
2.5V r 0.2V
1.8V r 0.15V
Vmi
1.5V
1.5V
VCC /2
VCC/2
Vmo
1.5V
1.5V
VCC /2
VCC/2
FIGURE 2. Waveform for Inverting and Non-inverting Functions
3
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74ALVC86
AC Electrical Characteristics
74ALVC86
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
www.fairchildsemi.com
4
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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5
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74ALVC86 Low Voltage Quad 2-Input Exclusive-OR Gate with 3.6V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)