TC74AC174P/F/FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74AC174P,TC74AC174F,TC74AC174FT
Hex D-Type Flip Flop with Clear
The TC74AC174 is an advanced high speed CMOS HEX
D-TYPE FLIP FLOP fabricated with silicon gate and
double-layer metal wiring C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
Information signals applied to D inputs are transferred to the
Q output on the positive going edge of the clock pulse.
When the CLR input is held low, the Q output are in the low
logic level independent of the other inputs.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74AC174P
TC74AC174F
Features
•
High speed: fmax = 180 MHz (typ.) at VCC = 5 V
•
Low power dissipation: ICC = 8 μA (max) at Ta = 25°C
•
High noise immunity: VNIH = VNIL = 28% VCC (min)
•
Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
•
Capability of driving 50 Ω
transmission lines.
∼ tpHL
Balanced propagation delays: tpLH −
•
Wide operating voltage range: VCC (opr) = 2 to 5.5 V
•
Pin and function compatible with 74F174
TC74AC174FT
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
TSSOP16-P-0044-0.65A
1
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.06 g (typ.)
2012-02-29
TC74AC174P/F/FT
Pin Assignment
IEC Logic Symbol
CLR
CK
1
16
VCC
Q1
2
15
Q6
D1
3
14
D6
D1
D2
4
13
D5
D3
CLR
Q2
12
5
D2
D4
Q5
D3
6
11
D4
Q3
7
10
Q4
GND
8
9
CK
D5
D6
(1)
R
(9)
C1
(3)
(2)
1D
(4)
(5)
(6)
(7)
(11)
(10)
(13)
(12)
(14)
(15)
Q1
Q2
Q3
Q4
Q5
Q6
(top view)
Truth Table
Inputs
Output
Function
CLR
D
CK
Q
L
X
X
L
Clear
H
L
L
―
H
H
H
―
H
X
Qn
No Change
X: Don’t care
System Diagram
CLR
1
D1
3
D2
4
D R
CK
CK
D3
6
D R
Q
CK
D4
11
D R
Q
CK
D5
13
D R
Q
CK
D6
14
D R
Q
CK
D R
Q
CK
Q
9
2
Q1
5
7
Q2
Q3
2
10
Q4
12
Q5
15
Q6
2012-02-29
TC74AC174P/F/FT
Absolute Maximum Ratings (Note 1)
Characteristics
Symbol
Rating
Unit
Supply voltage range
VCC
−0.5 to 7.0
V
DC input voltage
VIN
−0.5 to VCC + 0.5
V
VOUT
−0.5 to VCC + 0.5
V
DC output voltage
Input diode current
IIK
±20
mA
Output diode current
IOK
±50
mA
DC output current
IOUT
±50
mA
DC VCC/ground current
ICC
±150
mA
Power dissipation
PD
500 (DIP) (Note 2)/180 (SOP/TSSOP)
mW
Storage temperature
Tstg
−65 to 150
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C should be
applied up to 300 mW.
Operating Ranges (Note)
Characteristics
Symbol
Rating
Unit
Supply voltage
VCC
2.0 to 5.5
V
Input voltage
VIN
0 to VCC
V
VOUT
0 to VCC
V
Operating temperature
Topr
−40 to 85
°C
Input rise and fall time
dt/dV
Output voltage
Note:
0 to 100 (VCC = 3.3 ± 0.3 V)
0 to 20 (VCC = 5 ± 0.5 V)
ns/V
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
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TC74AC174P/F/FT
Electrical Characteristics
DC Characteristics
Ta =
−40 to 85°C
Ta = 25°C
Characteristics
High-level input
voltage
Low-level input
voltage
Symbol
Test Condition
VCC
(V)
Min
Typ.
Max
Min
Max
2.0
1.50
―
―
1.50
―
3.0
2.10
―
―
2.10
―
5.5
3.85
―
―
3.85
―
2.0
―
―
0.50
―
0.50
3.0
―
―
0.90
―
0.90
5.5
―
―
1.65
―
1.65
2.0
1.9
2.0
―
1.9
―
3.0
2.9
3.0
―
2.9
―
4.5
4.4
4.5
―
4.4
―
3.0
2.58
―
―
2.48
―
4.5
3.94
―
―
3.80
―
5.5
―
―
―
3.85
―
2.0
―
0.0
0.1
―
0.1
IOL = 50 μA
3.0
―
0.0
0.1
―
0.1
VIN
= VIH or
IOL = 12 mA
VIL
4.5
―
0.0
0.1
―
0.1
3.0
―
―
0.36
―
0.44
4.5
―
―
0.36
―
0.44
5.5
―
―
―
―
1.65
VIH
―
VIL
―
IOH = −50 μA
High-level output
voltage
VOH
VIN
= VIH or
IOH = −4 mA
VIL
IOH = −24 mA
IOH = −75 mA
Low-level output
voltage
VOL
(Note)
IOL = 24 mA
IOL = 75 mA
(Note)
Unit
V
V
V
V
Input leakage
current
IIN
VIN = VCC or GND
5.5
―
―
±0.1
―
±1.0
μA
Quiescent supply
current
ICC
VIN = VCC or GND
5.5
―
―
8.0
―
80.0
μA
Ta =
25°C
Ta =
−40 to
85°C
Unit
VCC (V)
Limit
Limit
3.3 ± 0.3
7.0
7.0
5.0 ± 0.5
5.0
5.0
3.3 ± 0.3
7.0
7.0
5.0 ± 0.5
5.0
5.0
3.3 ± 0.3
7.0
7.0
5.0 ± 0.5
4.0
4.0
3.3 ± 0.3
1.0
1.0
5.0 ± 0.5
1.0
1.0
3.3 ± 0.3
6.0
6.0
5.0 ± 0.5
3.5
3.5
Note:
This spec indicates the capability of driving 50 Ω transmission lines.
One output should be tested at a time for a 10 ms maximum duration.
Timing Requirements (input: tr = tf = 3 ns)
Characteristics
Symbol
Minimum pulse width
tw (L)
(CK)
tw (H)
Minimum pulse width
Test Condition
―
tw (L)
―
Minimum set-up time
ts
―
Minimum hold time
th
―
trem
―
( CLR )
Minimum removal time
( CLR )
4
ns
ns
ns
ns
ns
2012-02-29
TC74AC174P/F/FT
AC Characteristics (CL = 50 pF, RL = 500 Ω, input: tr = tf = 3 ns)
Characteristics
Symbol
Propagation delay
time
tpLH
(CK-Q)
tpHL
Propagation delay
time
―
tpHL
―
Maximum clock
frequency
fmax
―
Input capacitance
CIN
Power dissipation
capacitance
CPD
( CLR -Q)
Note:
Ta =
−40 to 85°C
Ta = 25°C
Test Condition
Unit
VCC (V)
Min
Typ.
Max
Min
Max
3.3 ± 0.3
―
8.5
14.4
1.0
16.6
5.0 ± 0.5
―
6.7
9.6
1.0
11.0
3.3 ± 0.3
―
8.2
13.9
1.0
16.0
5.0 ± 0.5
―
6.3
9.0
1.0
10.4
3.3 ± 0.3
60
110
―
60
―
5.0 ± 0.5
90
150
―
90
―
―
5
10
―
10
pF
―
74
―
―
―
pF
―
(Note)
ns
ns
MHz
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC/6 (per F/F)
And the total CPD when n pcs of flip flop operate can be gained by the following equation:
CPD (total) = 34 + 40·n
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2012-02-29
TC74AC174P/F/FT
Package Dimensions
Weight: 1.00 g (typ.)
6
2012-02-29
TC74AC174P/F/FT
Package Dimensions
Weight: 0.18 g (typ.)
7
2012-02-29
TC74AC174P/F/FT
Package Dimensions
Weight: 0.06 g (typ.)
8
2012-02-29
TC74AC174P/F/FT
RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
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TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
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responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
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2012-02-29