TOSHIBA TC4013BF_12

TC4013BP/BF
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC4013BP,TC4013BF
TC4013B Dual D-Type Flip Flop
TC4013B contains two independent circuits of D type flip-flop.
The input level applied to DATA input are transferred to Q and
Q output by rising edge of the clock pulse. When SET input is
placed at “H”, and RESET input is placed at “L”, outputs become
Q = “H”, and Q = “L”. When RESET input is placed at “H”, and
SET input is placed at “L”, outputs become Q = “L”, and Q =
“H”. When both of RESET input and SET input are at “H”,
outputs become Q = “H” and Q = “H”.
TC4013BP
Pin Assignment
TC4013BF
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
: 0.96 g (typ.)
: 0.18 g (typ.)
Block Diagram
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TC4013BP/BF
Truth Table
Inputs
Outputs
RESET
SET
DATA
CKΔ
Qn + 1
Qn + 1
L
H
*
*
H
L
H
L
*
*
L
H
H
H
*
*
H
H
L
L
L
L
H
L
L
H
H
L
L
L
*
Qn・
Qn ・
*: Don’t care
Δ: Level change
・: No change
Logic Diagram
Absolute Maximum Ratings (Note)
Characteristics
Symbol
Rating
Unit
DC supply voltage
VDD
VSS − 0.5~VSS + 20
V
Input voltage
VIN
VSS − 0.5~VDD + 0.5
V
VOUT
VSS − 0.5~VDD + 0.5
V
DC input current
IIN
±10
mA
Power dissipation
PD
300 (DIP)/180 (SOIC)
mW
Operating temperature range
Topr
−40~85
°C
Storage temperature range
Tstg
−65~150
°C
Output voltage
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
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TC4013BP/BF
Operating Ranges (VSS = 0 V) (Note)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
DC supply voltage
VDD
⎯
3
⎯
18
V
Input voltage
VIN
⎯
0
⎯
VDD
V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VDD or VSS.
Static Electrical Characteristics (VSS = 0 V)
Characteristics
High-level output
voltage
Low-level output
voltage
Symbol
VOH
VOL
IOH
25°C
85°C
VDD
(V)
Min
Max
Min
Typ.
Max
Min
Max
5
4.95
⎯
4.95
5.00
⎯
4.95
⎯
10
9.95
⎯
9.95
10.00
⎯
9.95
⎯
15
14.95
⎯
14.95
15.00
⎯
14.95
⎯
5
⎯
0.05
⎯
0.00
0.05
⎯
0.05
10
⎯
0.05
⎯
0.00
0.05
⎯
0.05
15
⎯
0.05
⎯
0.00
0.05
⎯
0.05
5
−0.61
⎯
−0.51
−1.0
⎯
−0.42
⎯
VOH = 2.5 V
5
−2.50
⎯
−2.10
−4.0
⎯
−1.70
⎯
VOH = 9.5 V
10
−1.50
⎯
−1.30
−2.2
⎯
−1.10
⎯
VOH = 13.5 V
15
−4.00
⎯
−3.40
−9.0
⎯
−2.80
⎯
VOL = 0.4 V
5
0.61
⎯
0.51
1.2
⎯
0.42
⎯
VOL = 0.5 V
10
1.50
⎯
1.30
3.2
⎯
1.10
⎯
VOL = 1.5 V
15
4.00
⎯
3.40
12.0
⎯
2.80
⎯
VOUT = 0.5 V, 4.5 V
5
3.5
⎯
3.5
2.75
⎯
3.50
⎯
VOUT = 1.0 V, 9.0 V
10
7.0
⎯
7.0
5.50
⎯
7.00
⎯
VOUT = 1.5 V, 13.5 V
15
11.0
⎯
11.0
8.25
⎯
11.00
⎯
⎪IOUT⎪ < 1 μA
VIN = VSS, VDD
⎪IOUT⎪ < 1 μA
VIN = VSS, VDD
VOH = 4.6 V
Output high current
−40°C
Test Condition
Unit
V
V
mA
VIN = VSS, VDD
Output low current
IOL
mA
VIN = VSS, VDD
Input high voltage
VIH
V
⎪IOUT⎪ < 1 μA
Input low voltage
VIL
VOUT = 0.5 V, 4.5 V
5
⎯
1.5
⎯
2.25
1.5
⎯
1.5
VOUT = 1.0 V, 9.0 V
10
⎯
3.0
⎯
4.50
3.0
⎯
3.0
VOUT = 1.5 V, 13.5 V
15
⎯
4.0
⎯
6.75
4.0
⎯
4.0
18
⎯
0.1
⎯
10−
5
0.1
⎯
1.0
−5
−0.1
⎯
−1.0
30
V
⎪IOUT⎪ < 1 μA
Input
current
“H” level
“L” level
Quiescent supply
current
IIH
IIL
IDD
VIH = 18 V
VIL = 0 V
VIN = VSS, VDD
(Note)
18
⎯
−0.1
⎯
−10
5
⎯
1
⎯
0.002
1
⎯
10
⎯
2
⎯
0.004
2
⎯
60
15
⎯
4
⎯
0.008
4
⎯
120
μA
μA
Note: All valid input combinations.
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TC4013BP/BF
Dynamic Electrical Characteristics (Ta = 25°C, VSS = 0 V, CL = 50 pF)
Characteristics
Output transition time
(low to high)
Output transition time
(high to low)
(CK-Q, Q )
tpHL
Propagation delay time
(SET, RESET-Q, Q )
Max clock frequency
tfCL
Min set-up time
(DATA-CK)
Min hold time
(DATA-CK)
Min removal time
(SET, RESET-CK)
Input capacitance
⎯
⎯
⎯
fCL
Max clock input fall time
Min clock pulse width
⎯
tpHL
trCL
(SET, RESET)
⎯
tpLH
Max clock input rise time
Min pulse width
⎯
tTHL
tpLH
(SET, RESET-Q, Q )
VDD (V)
tTLH
Propagation delay time
Propagation delay time
Test Condition
Symbol
Min
Typ.
Max
5
⎯
70
200
10
⎯
35
100
15
⎯
30
80
5
⎯
70
200
10
⎯
35
100
15
⎯
30
80
5
⎯
130
300
10
⎯
65
130
15
⎯
50
90
5
⎯
110
300
10
⎯
50
130
15
⎯
40
90
5
⎯
110
300
10
⎯
50
130
15
⎯
40
90
5
3.5
8
⎯
10
8.0
16
⎯
15
12.0
20
⎯
Unit
ns
ns
ns
ns
ns
MHz
5
⎯
10
μs
No limit
15
⎯
tW
⎯
tW
⎯
tsu
⎯
tH
⎯
trem
⎯
CIN
4
5
⎯
60
180
10
⎯
30
80
15
⎯
25
50
5
⎯
60
140
10
⎯
30
60
15
⎯
25
40
5
⎯
⎯
40
10
⎯
⎯
20
15
⎯
⎯
15
5
⎯
20
40
10
⎯
10
20
15
⎯
6
15
5
⎯
⎯
40
10
⎯
⎯
20
15
⎯
⎯
15
⎯
5
7.5
ns
ns
ns
ns
ns
pF
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TC4013BP/BF
Waveform for Measurement of Dynamic Characteristics
Waveform 1
Waveform 2
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TC4013BP/BF
Package Dimensions
Weight: 0.96 g (typ.)
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TC4013BP/BF
Package Dimensions
Weight: 0.18 g (typ.)
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TC4013BP/BF
RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with
TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR
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