TOSHIBA TPCP8405

TPCP8405
MOSFETs
Silicon P-/N-Channel MOS (U-MOS/U-MOS-H)
TPCP8405
1. Applications
•
Cell Phones
•
Motor Drivers
2. Features
(1)
Low drain-source on-resistance
P-channel RDS(ON) = 24 mΩ (typ.) (VGS = -10 V),
N-channel RDS(ON) = 20 mΩ (typ.) (VGS = 10 V)
(2)
Low leakage current
P-channel IDSS = -10 µA (VDS = -30 V),
N-channel IDSS = 10 µA (VDS = 30 V)
(3)
Enhancement mode
P-channel Vth = -0.8 to -2.0 V (VDS = -10 V, ID = -0.1 mA),
N-channel Vth = 1.3 to 2.3 V (VDS = 10 V, ID = 0.1 mA)
3. Packaging and Internal Circuit
1: Source 1
2: Gate 1
3: Source 2
4: Gate 2
5, 6: Drain 2
7, 8: Drain 1
PS-8
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Rev.2.0
TPCP8405
 unless otherwise specified)
4. Absolute Maximum Ratings (Note) (Ta = 25
25
Characteristics
Drain-source voltage
P/N
Symbol
Rating
Unit
P-ch
VDSS
-30
V
N-ch
Drain-gate voltage
(RGS = 20 kΩ)
P-ch
30
VDGR
N-ch
Gate-source voltage
P-ch
(Note 1)
P-ch
VGSS
(Note 1)
P-ch
ID
(t = 5 s)
(Note 2), (Note 4)
Power dissipation (per device for dual
operation)
(t = 5 s)
(Note 2), (Note 5)
Power dissipation (single operation)
(t = 5 s)
(Note 3), (Note 4)
Power dissipation (per device for dual
operation)
(t = 5 s)
(Note 3), (Note 5)
P-ch
IDP
PD(1)
(Note 6)
P-ch
P-ch
P-ch
IAR
P-ch
N-ch
Note:
1.23
W
0.58
W
0.36
W
9.36
mJ
-6
A
6.5
Tch
150
Tstg
-55 to 150
N-ch
Storage temperature
W
10.9
N-ch
Channel temperature
1.48
0.36
EAS
N-ch
Avalanche current
A
0.58
PD(2)
N-ch
Single-pulse avalanche energy
-24
1.23
PD(1)
N-ch
P-ch
A
1.48
PD(2)
N-ch
P-ch
-6
26
N-ch
P-ch
V
6.5
N-ch
Power dissipation (single operation)
±20
±20
N-ch
Drain current (pulsed)
V
30
N-ch
Drain current (DC)
-30

150

-55 to 150
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
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TPCP8405
5. Thermal Characteristics
Characteristics
Symbol
Max
Unit
/W
Channel-to-ambient thermal resistance (single
operation)
(t = 5 s)
(Note 2), (Note 4)
Rth(ch-a)(1)
84.5
Channel-to-ambient thermal resistance (per device for
dual operation)
(t = 5 s)
(Note 2), (Note 5)
Rth(ch-a)(2)
101.6
Channel-to-ambient thermal resistance (single
operation)
(t = 5 s)
(Note 3), (Note 4)
Rth(ch-a)(1)
215.5
Channel-to-ambient thermal resistance (per device for
dual operation)
(t = 5 s)
(Note 3), (Note 5)
Rth(ch-a)(2)
347.2
Note 1: Ensure that the channel temperature does not exceed 150.
Note 2: Device mounted on a glass-epoxy board (a), Figure 5.1
Note 3: Device mounted on a glass-epoxy board (b), Figure 5.2
Note 4: Power dissipation and thermal resistance values per device with the other device being off (During single
operation, power is supplied to only one of the two devices.)
Note 5: Power dissipation and thermal resistance values per device for dual operation (During dual operation, power
is evenly supplied to both devices.)
Note 6: P channel: VDD = -24 V, Tch = 25 (initial), L = 0.2 mH, RG = 25 Ω, IAR = -6 A
N channel: VDD = 24 V, Tch = 25 (initial), L = 0.2 mH, RG = 25 Ω, IAR = 6.5 A
Fig. 5.1 Device Mounted on a Glass-Epoxy
Board (a)
Note:
Fig. 5.2 Device Mounted on a Glass-Epoxy
Board (b)
This transistor is sensitive to electrostatic discharge and should be handled with care.
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TPCP8405
6. Electrical Characteristics
 unless otherwise specified)
6.1. Static Characteristics (Ta = 25
25
Characteristics
Gate leakage current
P/N
Symbol
P-ch
IGSS
Min
Typ.
Max
Unit
VGS = ±20 V, VDS = 0 V


±0.1
µA
VGS = ±20 V, VDS = 0 V


±0.1
VDS = -30 V, VGS = 0 V


-10
N-ch
VDS = 30 V, VGS = 0 V


10
P-ch
V(BR)DSS ID = -10 mA, VGS = 0 V
-30


30


N-ch
Drain cut-off current
P-ch
Drain-source breakdown voltage
IDSS
N-ch
Drain-source breakdown voltage
Gate threshold voltage
(Note 7)
ID = 10 mA, VGS = 0 V
P-ch
V(BR)DSX ID = -10 mA, VGS = 10 V
-21


N-ch
ID = 10 mA, VGS = -20 V
15


VDS = -10 V, ID = -0.1 mA
-0.8

-2.0
VDS = 10 V, ID = 0.1 mA
1.3

2.3
RDS(ON) VGS = -4.5 V, ID = -3 A

32
42
VGS = -10 V, ID = -3 A

24
31.3
VGS = 4.5 V, ID = 3.3 A

22
29
VGS = 10 V, ID = 3.3 A

20
26
P-ch
Vth
N-ch
Drain-source on-resistance
Test Condition
P-ch
N-ch
µA
V
V
V
mΩ
Note 7: If a reverse bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the drainsource breakdown voltage is lowered in this mode.
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TPCP8405
 unless otherwise specified)
6.2. Dynamic Characteristics (Ta = 25
25
Characteristics
Input capacitance
P/N
Symbol
P-ch
Ciss
N-ch
Reverse transfer capacitance
P-ch
Crss
N-ch
Output capacitance
P-ch
Coss
N-ch
Switching time (rise time)
P-ch
tr
N-ch
Switching time (turn-on time)
P-ch
ton
N-ch
Switching time (fall time)
P-ch
tf
N-ch
Switching time (turn-off time)
P-ch
toff
N-ch
Test Condition
Min
Typ.
Max
Unit
VDS = -10 V, VGS = 0 V,
f = 1 MHz

1075

pF
VDS = 10 V, VGS = 0 V,
f = 1 MHz

830

VDS = -10 V, VGS = 0 V,
f = 1 MHz

190

VDS = 10 V, VGS = 0 V,
f = 1 MHz

53

VDS = -10 V, VGS = 0 V,
f = 1 MHz

234

VDS = 10 V, VGS = 0 V,
f = 1 MHz

177

See Figure 6.2.1.

7.3

See Figure 6.2.2.

4.1

See Figure 6.2.1.

13.6

See Figure 6.2.2.

10.8

See Figure 6.2.1.

42

See Figure 6.2.2.

11

See Figure 6.2.1.

136

See Figure 6.2.2.

31

Fig. 6.2.1 Switching Time Test Circuit (P-ch)
pF
pF
ns
ns
ns
ns
Fig. 6.2.2 Switching Time Test Circuit (N-ch)
 unless otherwise specified)
25
6.3. Gate Charge Characteristics (Ta = 25
Characteristics
Total gate charge (gate-source plus
gate-drain)
P/N
Symbol
P-ch
Qg
N-ch
Gate-source charge 1
P-ch
Qgs1
N-ch
Gate-drain charge
P-ch
N-ch
Qgd
Test Condition
Min
Typ.
Max
Unit
VDD ≈ -24 V, VGS = -10 V,
ID = -6 A

24.1

nC
VDD ≈ 24 V, VGS = 10 V,
ID = 6.5 A

13.8

VDD ≈ -24 V, VGS = -10 V,
ID = -6 A

3.3

VDD ≈ 24 V, VGS = 10 V,
ID = 6.5 A

3.0

VDD ≈ -24 V, VGS = -10 V,
ID = -6 A

5.6

VDD ≈ 24 V, VGS = 10 V,
ID = 6.5 A

2.3

5
nC
nC
2011-03-14
Rev.2.0
TPCP8405
 unless otherwise specified)
6.4. Source-Drain Characteristics (Ta = 25
25
Characteristics
Reverse drain current
(pulsed)
Diode forward voltage
(Note 8)
P/N
Symbol
P-ch
IDRP
Test Condition
Min
Typ.
Max
Unit


-24
A


26
IDR = -6 A, VGS = 0 V


1.2
IDR = 6.5 A, VGS = 0 V


-1.2

N-ch
P-ch
N-ch
VDSF
V
Note 8: Ensure that the channel temperature does not exceed 150.
7. Marking
Fig. 7.1 Marking
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TPCP8405
8. Characteristics Curves (Note)
8.1. P-Channel MOSFET
Fig. 8.1.1 ID - VDS
Fig. 8.1.2 ID - VDS
Fig. 8.1.3 ID - VGS
Fig. 8.1.4 VDS - VGS
Fig. 8.1.5 RDS(ON) - ID
Fig. 8.1.6 RDS(ON) - Ta
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TPCP8405
Fig. 8.1.7 IDR - VDS
Fig. 8.1.8 Capacitance - VDS
Fig. 8.1.9 Vth - Ta
Fig. 8.1.10 Dynamic Input/Output Characteristics
Fig. 8.1.11 PD - Ta
(Guaranteed Maximum)
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TPCP8405
Fig. 8.1.12 rth - tw
(Guaranteed Maximum)
Fig. 8.1.13 Safe Operating Area
(Guaranteed Maximum)
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Rev.2.0
TPCP8405
8.2. N-Channel MOSFET
Fig. 8.2.1 ID - VDS
Fig. 8.2.2 ID - VDS
Fig. 8.2.3 ID - VGS
Fig. 8.2.4 VDS - VGS
Fig. 8.2.5 RDS(ON) - ID
Fig. 8.2.6 RDS(ON) - Ta
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TPCP8405
Fig. 8.2.7 IDR - VDS
Fig. 8.2.8 Capacitance - VDS
Fig. 8.2.9 Vth - Ta
Fig. 8.2.10 Dynamic Input/Output Characteristics
Fig. 8.2.11 PD - Ta
(Guaranteed Maximum)
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TPCP8405
Fig. 8.2.12 rth - tw
(Guaranteed Maximum)
Fig. 8.2.13 Safe Operating Area
(Guaranteed Maximum)
Note:
The above characteristics curves are presented for reference only and not guaranteed by production test,
unless otherwise noted.
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TPCP8405
Package Dimensions
Unit: mm
Weight: 0.017 g (typ.)
Package Name(s)
TOSHIBA: 2-3V1S
Nickname: PS-8
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TPCP8405
RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
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for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating
and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample
application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications.
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noncompliance with applicable laws and regulations.
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