74LVQ244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The LVQ244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. n Ideal for low power/low noise 3.3V applications n Implements patented EMI reduction circuitry n Available in SOIC JEDEC, SOIC EIAJ and QSOP packages n Guaranteed simultaneous switching noise level and dynamic threshold performance n Improved latch-up immunity n Guaranteed incident wave switching into 75Ω n 4 kV minimum ESD immunity Ordering Code: Order Number Package Number 74LVQ244SC 74LVQ244SJ 74LVQ244QSC M20B Package Description 20-Lead (0.300" Wide) Molded Small Outline Package, SOIC, JEDEC M20D 20-Lead Shrink Molded Small Outline Package, SOIC, EIAJ MQA20 20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP, JEDEC Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Assignment for SOIC and QSOP DS011356-2 DS011356-1 © 1998 Fairchild Semiconductor Corporation DS011356 www.fairchildsemi.com 74LVQ244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs May 1998 Truth Tables Inputs OE1 Outputs In (Pins 12, 14, 16, 18) L L L L H H H X Z Inputs Outputs OE2 In L L L L H H H X Z (Pins 3, 5, 7, 9) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Pin Descriptions Pin Names www.fairchildsemi.com Description OE1, OE2 3-STATE Output Enable Inputs I0–I7 Inputs O0–O7 Outputs 2 Absolute Maximum Ratings (Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) DC Latch-Up Source or Sink Current Recommended Operating Conditions (Note 2) −0.5V to +7.0V Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate ∆V/∆t VIN from 0.8V to 2.0V VCC @ 3.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V 2.0V to 3.6V 0V to VCC 0V to VCC −40˚C to +85˚C 125 mV/ns Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. ± 50 mA ± 400 mA −65˚C to +150˚C Note 2: Unused inputs must be held HIGH or LOW. They may not float. ± 300 mA DC Electrical Characteristics Symbol Parameter VCC (V) TA = +25˚C TA = −40˚C to +85˚C Typ VIH VIL VOH Minimum High Level Input Voltage 3.0 Maximum Low Level Input Voltage 3.0 Minimum High Level Output Voltage 1.5 Units Conditions Guaranteed Limits 2.0 2.0 V VOUT = 0.1V or VCC − 0.1V 1.5 0.8 0.8 V VOUT = 0.1V or VCC − 0.1V 2.9 2.9 V IOUT = −50 µA 2.58 2.48 V VIN = VIL or VIH (Note 3) 0.1 0.1 V IOUT = 50 µA 3.0 0.36 0.44 V VIN = VIL or VIH (Note 3) 3.6 ± 0.1 ± 1.0 µA 3.0 2.99 3.0 IOH = −12 mA VOL Maximum Low Level Output Voltage 3.0 0.002 IOL = 12 mA IIN Maximum Input Leakage Current IOLD Minimum Dynamic (Note 4) Output Current IOHD ICC IOZ Maximum Quiescent Supply Current Maximum 3-STATE Leakage Current VI = VCC, GND 3.6 36 mA VOLD = 0.8V Max (Note 5) 3.6 −25 mA VOHD = 2.0V Min (Note 5) 40.0 µA 3.6 4.0 VIN = VCC or GND VI (OE) = VIL, VIH ± 0.25 3.6 ± 2.5 µA VI = VCC, GND VO = VCC, GND VOLP Quiet Output Maximum Dynamic VOL 3.3 0.4 0.8 V (Notes 6, 7) VOLV Quiet Output Minimum Dynamic VOL 3.3 −0.4 −0.8 V (Notes 6, 7) VIHD Minimum High Level Dynamic Input Voltage 3.3 1.7 2.0 V (Notes 6, 8) VILD Maximum Low Level Dynamic Input Voltage 3.3 1.7 0.8 V (Notes 6, 8) Note 3: All outputs loaded thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed for 74LVQ. Note 6: Worst case package. Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND. Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz. 3 www.fairchildsemi.com AC Electrical Characteristics Symbol tPHL Propagation Delay tPLH Data to Output tPZL Output Enable Time tPZH Output Disable Time tPHZ TA = +25˚C CL = 50 pF VCC (V) Parameter tPLZ tOSHL Output to Output tOSLH Skew Data to Output (Note 9) TA = −40˚C to +85˚C CL = 50 pF Min Typ Max Min Max 2.7 2.0 8.4 12.7 2.0 14.0 3.3 ± 0.3 2.0 7.0 9.0 2.0 9.5 2.7 2.5 9.6 16.9 2.5 18.0 3.3 ± 0.3 2.5 8.0 12.0 2.5 12.5 2.7 1.0 10.8 19.0 1.0 20.0 3.3 ± 0.3 1.0 9.0 13.5 1.0 14.0 2.7 1.0 1.5 1.5 3.3 ± 0.3 1.0 1.5 1.5 Units ns ns ns ns Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design. Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.5 pF VCC = Open CPD (Note 10) Power Dissipation Capacitance 70 pF VCC = 3.3V Note 10: CPD is measured at 10 MHz. www.fairchildsemi.com 4 Conditions Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead (0.300" Wide) Molded Small Outline Package, SOIC, JEDEC Package Number M20B 20-Lead Shrink Molded Small Outline Package, SOIC, EIAJ Package Number M20D 5 www.fairchildsemi.com 74LVQ244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP, JEDEC (also known as QSOP) Package Number MQA20 LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and (c) whose device or system, or to affect its safety or effectiveness. failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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