Standard ICs Dual 4-channel analog multiplexer / demultiplexer BU4052BC / BU4052BCF / BU4052BCFV The BU4052BC, BU4052BCF, and BU4052BCFV are multiplexers / demultiplexers capable of selecting and combining analog signals and digital signals with a configuration of 4 ch × 2. Inhibit signals and control signals are used to turn on the switch of the corresponding channel. In addition, even if the logical amplitude (VDD-VSS) of the control signal is low, signals with a large amplitude (VDD-VEE) can be switched. In addition, as each switch has a low ON resistance, it can be connected to a low impedance circuit. •Block diagram Y0 1 Y2 2 16 VDD 15 X2 Y0 COMMON 3 Y Y3 4 Y1 5 INH 6 Y2 Y OUT / IN X2 14 X1 X1 X OUT / IN Y3 Y1 X0 INH X3 VEE A 13 COMMON X 12 X0 11 X3 B VEE 7 10 A VSS 8 9 B 1 Standard ICs BU4052BC / BU4052BCF / BU4052BCFV •Logic circuit diagram •Truth table INH VDD (16) A B ON SWITCH L L L X0 Y0 L H L X1 Y1 X2 Y2 INH (6) L L H B (9) L H H X3 Y3 VSS (8) VEE (7) H X X NONE A (10) LEVEL CONVERTER BINARY TO 1of 4 DECODER WITH INH X: Irrelevant X0 (12) X1 (14) X2 (15) (13) X X3 (11) Y0 (1) Y1 (5) Y2 (2) (3) Y Y3 (4) •Absolute maximum ratings (Ta = 25°C) Parameter Limits Unit Power supply voltage 1 VDD – 0.5 ~ + 20 V Power supply voltage 2 VDD — VEE – 0.5 ~ + 20 V Pd 1000 (DIP), 500 (SOP), 400 (SSOP) mW Operating temperature Topr – 40 ~ + 85 °C Storage temperature Tstg – 55 ~ + 150 °C – 0.5 ~ VDD + 0.5 V Power dissipation Input voltage 2 Symbol VIN Standard ICs BU4052BC / BU4052BCF / BU4052BCFV characteristics •DCElectrical characteristics (unless otherwise noted, Ta = 25°C, V Parameter High-level input voltage Symbol VIH Low-level input voltage VIL High-level input current IIH Low-level input current IIL ON resistance ON resistance deflexion OFF-channel leakage current Static current dissipation RON ∆RON IOFF IDD EE = VSS = 0V) Min. Typ. Max. 3.5 — — 7.0 — — 11.0 — — Unit VDD (V) Conditions Measurement circuit — Fig.1 — Fig.1 5 V 10 15 — — 1.5 — — 3.0 — — 4.0 — — 0.3 µA 15 VIH = 15V Fig.1 — — – 0.3 µA 15 VIL = 0V Fig.1 — — 950 — — 250 VIN = VDD / 2 Fig.2 — — 160 15 — 10 — 5 — 6 — — 4 — — — 0.3 — — – 0.3 — — 5 — — 10 — — 15 5 V 10 15 5 Ω Ω 10 10 — Fig.2 — Fig.3 15 µA 15 15 5 µA 10 VI = VDD or GND — 15 3 Standard ICs BU4052BC / BU4052BCF / BU4052BCFV Switching characteristics (unless otherwise noted, Ta = 25°C, VEE = VSS = 0V, RL = 1kΩ, CL = 50pF) Parameter Symbol Propagation delay time Switch IN → OUT tPLH, tPHL tPHZ, tPLZ tPZH, tPZL Propagation delay time CONT → OUT tPHZ, tPLZ tPZH, tPZL Propagation delay time INH → OUT Maximum propagation frequency fMax. Min. Typ. Max. — 15 45 — 8 20 — 6 15 — 170 550 — 90 240 — 70 160 — 150 380 — 70 200 — 50 160 — 20 — Unit VDD (V) Conditions Measurement circuit — Fig.4 — Fig.5, 6 — Fig.5, 6 5 ns 10 15 5 ns 10 15 5 ns 10 15 MHz 5 VEE = – 5V∗1 Fig.7 Fig.7 Fig.7 Feedthrough attentuation FT — 0.5 — MHz 5 VEE = – 5V∗2 Sine wave distortion ratio D — 0.02 — % 5 VEE = – 5V∗3 Input capacitance (control) CC — 5 — pF — — — Input capacitance (switch) CS — 10 — pF — — — ∗1 VIN = 5VP-P sine wave, frequency that enables 20 log10 VOUT / VIN = – 3dB. ∗2 VIN = 5VP-P sine wave, frequency that enables 20 log10 VOUT / VIN = – 50dB at channel off. ∗3 VIN = 5VP-P sine wave. •Measurement circuits VDD VDD IIN A B A RON = RL A B VCONTROL IN INH ( VIN – 1 VOUT ) INH VIN VDD COMMON OUT / IN VIN CHANNEL IN / OUT CHANNEL IN / OUT VEE VEE V GND Fig.1 Input voltage, current 4 COMMON OUT / IN RL = 10kΩ VOUT VDD / 2 GND Fig.2 ON resistance V RL = 10kΩ Standard ICs BU4052BC / BU4052BCF / BU4052BCFV VDD A B VCONTROL IN INH COMMON OUT / IN VDD or GND CHANNEL IN / OUT A GND or VDD VEE GND Fig.3 OFF-channel leakage current VDD A B VCONTROL IN VDD 50% Input GND INH COMMON OUT / IN OUT CHANNEL IN / OUT 50% Output VEE CL RL P.G. GND tPHL tPLH Fig.4 Propagation delay time (Switch IN to OUT) VDD A B VDD Input INH P.G. VDD COMMON OUT / IN 50% GND OUT CHANNEL IN / OUT VEE 90% Output RL 50% CL GND tPZH tPHZ Fig.5 Propagation delay time (CONT, INH to OUT) 5 Standard ICs BU4052BC / BU4052BCF / BU4052BCFV VDD VDD A B CL RL 50% Input INH GND P.G. COMMON OUT / IN CHANNEL IN / OUT OUT 50% 10% Output VEE GND tPZL Fig.6 Propagation delay time (CONT, INH to OUT) VDD VCONTROL A B INH COMMON OUT / IN CHANNEL IN / OUT VEE ~ RL CL V ~ VEE Fig.7 Maximum propagation frequency, feedthrough, sine wave distortion •Electrical characteristic curve POWER DISSIPATION: Pd (mW) 1200 DIP16 1000 800 600 SOP16 400 SSOP-B16 200 0 0 25 50 75 100 125 150 AMBIENT TEMPERATURE: Ta (°C) Fig.8 Power dissipation vs. Ta characteristic 6 D GND tPLZ Standard ICs BU4052BC / BU4052BCF / BU4052BCFV •External dimensions (Units: mm) BU4052BC BU4052BCF 10.0 ± 0.2 19.4 ± 0.3 9 0.3 ± 0.1 0.5 ± 0.1 2.54 0° ~ 15° 9 1 8 4.4 ± 0.2 16 1.27 0.4 ± 0.1 0.15 ± 0.1 1.5 ± 0.1 3.2 ± 0.2 4.25 ± 0.3 7.62 0.11 8 0.51Min. 1 6.2 ± 0.3 6.5 ± 0.3 16 0.3Min. 0.15 DIP16 SOP16 BU4052BCFV 1 8 4.4 ± 0.2 9 0.65 0.15 ± 0.1 1.15 ± 0.1 0.1 6.4 ± 0.3 5.0 ± 0.2 16 0.22 ± 0.1 0.3Min. 0.1 SSOP-B16 7