MC33340, MC33342 Battery Fast Charge Controllers The MC33340 and MC33342 are monolithic control IC’s that are specifically designed as fast charge controllers for Nickel Cadmium (NiCd) and Nickel Metal Hydride (NiMH) batteries. These devices feature negative slope voltage detection as the primary means for fast charge termination. Accurate detection is ensured by an output that momentarily interrupts the charge current for precise voltage sampling. An additional secondary backup termination method can be selected that consists of either a programmable time or temperature limit. Protective features include battery over and undervoltage detection, latched over temperature detection, and power supply input undervoltage lockout with hysteresis. Fast charge holdoff time is the only difference between the MC33340 and the MC33342. The MC33340 has a typical holdoff time of 177 seconds and the MC33342 has a typical holdoff time of 708 seconds. • Negative Slope Voltage Detection with 4.0 mV Sensitivity • Accurate Zero Current Battery Voltage Sensing • High Noise Immunity with Synchronous VFC/Logic • Programmable 1 to 4 Hour Fast Charge Time Limit • Programmable Over/Undertemperature Detection • Battery Over and Undervoltage Fast Charge Protection • Power Supply Input Undervoltage Lockout with Hysteresis • Operating Voltage Range of 3.25 V to 18 V • 177 seconds Fast Change Holdoff Time (MC33340) • 708 seconds Fast Change Holdoff Time (MC33342) • Pb−Free Packages are Available http://onsemi.com MARKING DIAGRAMS 8 PDIP−8 P SUFFIX CASE 626 8 1 1 SOIC−8 NB SUFFIX CASE 751 8 1 Regulator VCC Internal Bias 1 Ck High F/V R Over Battery Detect Q R 8 VCC Vsen Input 1 7 t1/Tref High Gnd 4 5 t3/Tref Low (Top View) Over Temp Latch ORDERING INFORMATION Battery Pack S See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. Under t1/Tref High t1 −DV Detect Counter Timer t2 7 t2/Tsen 6 Vsen Gate 2 6 t2/Tsen Temp Detect Low Vsen Gate 3334x ALYWX G PIN CONNECTIONS Fast/Trickle Output 3 VCC Voltage to Frequency Converter Vsen 8 Undervoltage Lockout 8 1 = 0 or 2 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package x A L Y W G Vsen Gate Output 2 DC Input MC3334xP AWL YYWW t3/Tref Low t3 5 3 Fast/ Trickle F/T GND t/T VCC Time/ Temp Select 4 This device contains 2,512 active transistors. Figure 1. Simplified Block Diagram © Semiconductor Components Industries, LLC, 2005 July, 2005 − Rev. 7 1 Publication Order Number: MC33340/D MC33340, MC33342 MAXIMUM RATINGS (Note 1) Rating Power Supply Voltage (Pin 8) Symbol Value Unit VCC 18 V V Input Voltage Range Time/Temperature Select (Pins 5, 6, 7) VIR(t/T) −1.0 to VCC Battery Sense, (Note 2) (Pin 1) VIR(sen) −1.0 to VCC + 0.6 or −1.0 to 10 Vsen Gate Output (Pin 2) Voltage Current VO(gate) IO(gate) 20 50 V mA Fast/Trickle Output (Pin 3) Voltage Current VO(F/T) IO(F/T) 20 50 V mA Thermal Resistance, Junction−to−Air °C/W RqJA P Suffix, DIP Plastic Package, Case 626 100 D Suffix, SO−8 Plastic Package, Case 751 178 Operating Junction Temperature TJ +150 °C Operating Ambient Temperature (Note 3) TA −25 to +85 °C Storage Temperature Tstg −55 to +150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015 Machine Model Method 400 V http://onsemi.com 2 MC33340, MC33342 ELECTRICAL CHARACTERISTICS (VCC = 6.0 V, for typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies (Note 3), unless otherwise noted.) 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Whichever voltage is lower. 3. Tested junction temperature range for the MC33340/342: Tlow = −25°C http://onsemi.com 3 mA Thigh = +85°C Δ f OSC, OSCILLATOR FREQUENCY CHANGE (% 2.10 VCC = 6.0 V 2.00 1.90 1.02 1.00 0.98 − 50 − 25 0 25 50 75 100 125 0 −8.0 −16 − 50 − 25 0 25 50 75 100 Figure 3. Oscillator Frequency versus Temperature VCC = 6.0 V Threshold voltage is measured with respect to VCC. −0.4 Time mode is selected if any of the three inputs are above the threshold. −0.6 Temperature mode is selected when all three inputs are below the threshold. −0.8 125 3.2 VCC = 6.0 V TA = 25°C 2.4 Vsen Gate Pin 2 1.6 Fast/Trickle Pin 3 0.8 0 −25 0 25 50 75 100 125 0 8.0 16 24 32 40 TA, AMBIENT TEMPERATURE (°C) Isink, SINK SATURATION (mA) Figure 4. Temperature Select Threshold Voltage versus Temperature Figure 5. Saturation Voltage versus Sink Current Vsen Gate and Fast/Trickle Outputs 3.1 1.0 TA = 25°C Startup Threshold (VCC Increasing) 3.0 ICC , SUPPLY CURRENT (mA) VCC , SUPPLY VOLTAGE (V) 8.0 Figure 2. Battery Sense Input Thresholds versus Temperature VCC −1.0 −50 VCC = 6.0 V TA, AMBIENT TEMPERATURE (°C) 0 −0.2 16 TA, AMBIENT TEMPERATURE (°C) VOL , SINK SATURATION VOLTAGE (V) V th(t/T), TEMPERATURE SELECT THRESHOLD VOLTAGE (V V th, OVER/UNDERVOLTAGE THRESHOLDS (V) MC33340, MC33342 2.9 2.8 2.7 − 50 Minimum Operating Threshold (VCC Decreasing) 0.8 0.6 0.4 0.2 0 − 25 0 25 50 75 100 125 0 4.0 8.0 12 TA, AMBIENT TEMPERATURE (°C) VCC, SUPPLY VOLTAGE (V) Figure 6. Undervoltage Lockout Thresholds versus Temperature Figure 7. Supply Current versus Supply Voltage http://onsemi.com 4 16 MC33340, MC33342 INTRODUCTION counter for detection of a negative slope in battery voltage. A timer with three programming inputs is available to provide backup charge termination. Alternatively, these inputs can be used to monitor the battery pack temperature and to set the over and undertemperature limits also for backup charge termination. Two active low open collector outputs are provided to interface this controller with the external charging circuit. The first output furnishes a gating pulse that momentarily interrupts the charge current. This allows an accurate method of sampling the battery voltage by eliminating voltage drops that are associated with high charge currents and wiring resistances. Also, any noise voltages generated by the charging circuitry are eliminated. The second output is designed to switch the charging source between fast and trickle modes based upon the results of voltage, time, or temperature. These outputs normally connect directly to a linear or switching regulator control circuit in non−isolated primary or secondary side applications. Both outputs can be used to drive optoisolators in primary side applications that require galvanic isolation. Figure 9 shows the typical charge characteristics for NiCd and NiMh batteries. Nickel Cadmium and Nickel Metal Hydride batteries require precise charge termination control to maximize cell capacity and operating time while preventing overcharging. Overcharging can result in a reduction of battery life as well as physical harm to the end user. Since most portable applications require the batteries to be charged rapidly, a primary and usually a secondary or redundant charge sensing technique is employed into the charging system. It is also desirable to disable rapid charging if the battery voltage or temperature is either too high or too low. In order to address these issues, an economical and flexible fast charge controller was developed. The MC33340/342 contains many of the building blocks and protection features that are employed in modern high performance battery charger controllers that are specifically designed for Nickel Cadmium and Nickel Metal Hydride batteries. The device is designed to interface with either primary or secondary side regulators for easy implementation of a complete charging system. A representative block diagram in a typical charging application is shown in Figure 8. The battery voltage is monitored by the Vsen input that internally connects to a voltage to frequency converter and Regulator DC Input MC33340 or MC33342 Reg Control Undervoltage Lockout Internal Bias R2 VCC Voltage to Frequency Converter Vsen 1 2.9 V Ck High 2.0 V 1.0 V F/V R Over Battery Detect Q Low Vsen Gate R Battery Pack S Under 30 mA t1 t1/Tref High 7 30 mA t2 30 mA t3 t/T F/T ǒVVBatt –1Ǔ sen Time/ Temp Select Gnd VCC 0.7 V 4 Figure 8. Typical Battery Charging Application http://onsemi.com 5 R3 t2/Tsen SW2 t3/Tref Low 5 3 R2 + R1 SW1 6 Vsen Gate Fast/ Trickle RNTC Temp Detect −DV Detect Counter Timer 2 T Over Temp Latch R1 Charge Status VCC 8 SW3 R4 MC33340, MC33342 1.6 Vmax −DV 70 dV CELL VOLTAGE (V) 60 Tmax 1.4 50 1.3 40 Voltage 1.2 30 Temperature 1.1 CELL TEMPERATURE (° C) dt 1.5 20 Relative Pressure 1.0 0 40 80 120 CHARGE INPUT PERCENT OF CAPACITY 10 160 Figure 9. Typical Charge Characteristics for NiCd and NiMh Batteries OPERATING DESCRIPTION The MC33340/342 starts up in the fast charge mode when power is applied to VCC. A change to the trickle mode can occur as a result of three possible conditions. The first is if the Vsen input voltage is above 2.0 V or below 1.0 V. Above 2.0 V indicates that the battery pack is open or disconnected, while below 1.0 V indicates the possibility of a shorted or defective cell. The second condition is when the MC33340/342 detects a fully charged battery by measuring a negative slope in battery voltage. The MC33340/342 recognize a negative voltage slope after the preset holdoff time (thold) has elapsed during a fast charge cycle. This indicates that the battery pack is fully charged. The third condition is either due to the battery pack being out of a programmed temperature range, or that the preset timer period has been exceeded. There are three conditions that will cause the controller to return from trickle to fast charge mode. The first is if the Vsen input voltage moved to within the 1.0 to 2.0 V range from initially being either too high or too low. The second is if the battery pack temperature moved to within the programmed temperature range, but only from initially being too cold. Third is by cycling VCC off and then back on causing the internal logic to reset. A concise description of the major circuit blocks is given below. resistive voltage divider. The input has an impedance of approximately 6.0 MW and a maximum voltage range of −1.0 V to VCC + 0.6 V or 0 V to 10 V, whichever is lower. The 10 V upper limit is set by an internal zener clamp that provides protection in the event of an electrostatic discharge. The VFC is a charge−balanced synchronous type which generates output pulses at a rate of FV = Vsen (24 kHz). The Sample Timer circuit provides a 95 kHz system clock signal (SCK) to the VFC. This signal synchronizes the FV output to the other Sample Timer outputs used within the detector. At 1.38 second intervals the Vsen Gate output goes low for a 33 ms period. This output is used to momentarily interrupt the external charging power source so that a precise voltage measurement can be taken. As the Vsen Gate goes low, the internal Preset control line is driven high for 11 ms. During this time, the battery voltage at the Vsen input is allowed to stabilize and the previous FV count is preloaded. At the Preset high−to−low transition, the Convert line goes high for 22 ms. This gates the FV pulses into the ratchet counter for a comparison to the preloaded count. Since the Convert time is derived from the same clock that controls the VFC, the number of FV pulses is independent of the clock frequency. If the new sample has more counts than were preloaded, it becomes the new peak count and the cycle is repeated 1.38 seconds later. If the new sample has two fewer counts, a less than peak voltage event has occurred, and a register is initialized. If two successive less than peak voltage events occur, the −DV ‘AND’ gate output goes high and the Fast/Trickle output is latched in a low state, signifying that the battery pack has reached full charge status. Negative Slope Voltage Detection A representative block diagram of the negative slope voltage detector is shown in Figure 10. It includes a Synchronous Voltage to Frequency Converter, a Sample Timer, and a Ratchet Counter. The Vsen pin is the input for the Voltage to Frequency Converter (VFC), and it connects to the rechargeable battery pack terminals through a http://onsemi.com 6 MC33340, MC33342 Negative slope voltage detection starts after 60 ms have elapsed in the fast charge mode. This does not affect the Fast/Trickle output until the holdoff time (thold) has elapsed during the fast charge mode. Two scenarios then exist. Trickle mode holdoff is implemented to ignore any initial drop in voltage that may occur when charging batteries that have been stored for an extended time period. If the negative slope voltage detector senses that initial drop during the holdoff time, and the input voltage rises as the battery charges, the Fast/Trickle output will remain open. However, if the negative slope voltage detector senses a negative drop Synchronous Voltage to Frequency Converter Battery Detect Low High UVLO FV = Vsen (24 kHz) Ck SCK 95 kHz Rachet Counter −DV F/T Logic Over Under Charge Temperature Timer Trickle Mode Holdoff Preset Convert Vsen Input in voltage during the holdoff time and the input voltage never rises above that last detected level, the Fast/Trickle output will latch into a low state. The negative slope voltage detector has a maximum resolution of 2.0 V divided by 1023 mV, or 1.955 mV per count with an uncertainty of ±1.0 count. This yields a detection range of 1.955 mV to 5.865 mV. In order to obtain maximum sensing accuracy, the R2/R1 voltage divider must be adjusted so that the Vsen input voltage is slightly less than 2.0 V when the battery pack is fully charged. Voltage variations due to temperature and cell manufacturing must be considered. Vsen Gate Sample Timer Vsen Gate 1.38 s Preset 11 ms Convert 22 ms Rachet Counter Convert 0 to 1023 FV Pulses Figure 10. Negative Slope Voltage Detector Fast Charge Timer Temperature sensing is accomplished by placing a negative temperature coefficient (NTC) thermistor in thermal contact with the battery pack. The thermistor connects to the t2/Tsen input which has a 30 mA current source pull−up for developing a temperature dependent voltage. The temperature limits are set by a resistor that connects from the t1/Tref High and the t3/Tref Low inputs to ground. Since all three inputs contain matched 30 mA current source pull−ups, the required programming resistor values are identical to that of the thermistor at the desired over and under trip temperature. The temperature window detector is composed of two comparators with a common input that connects to the t2/Tsen input. The lower comparator senses the presence of an under temperature condition. When the lower temperature limit is exceeded, the charger is switched to the trickle mode. The comparator has 44 mV of hysteresis to prevent erratic A programmable backup charge timer is available for fast charge termination. The timer is activated by the Time/Temp Select comparator, and is programmed from the t1/Tref High, t2/Tsen, and t3/Tref Low inputs. If one or more of these inputs is allowed to go above VCC − 0.7 V or is left open, the comparator output will switch high, indicating that the timer feature is desired. The three inputs allow one of seven possible fast charge time limits to be selected. The programmable time limits, rounded to the nearest whole minute, are shown in Table 1. Over/Under Temperature Detection A backup over/under temperature detector is available and can be used in place of the timer for fast charge termination. The timer is disabled by the Time/Temp Select comparator when each of the three programming inputs are held below VCC − 0.7 V. http://onsemi.com 7 MC33340, MC33342 switching between the fast and trickle modes as the lower temperature limit is crossed. The amount of temperature rise to overcome the hysteresis is determined by the thermistor’s rate of resistance change or sensitivity at the under temperature trip point. The required resistance change is: DR(T Low ³T )+ High VH(T) I in + 44 mV 30 mA by removing and reconnecting the battery pack or by cycling the power supply voltage. If the charger does not require either the time or temperature backup features, they can both be easily disabled. This is accomplished by biasing the t3/Tref Low input to a voltage greater than t2/Tsen, and by grounding the t1/Tref High input. Under these conditions, the Time/Temp Select comparator output is low, indicating that the temperature mode is selected, and that the t2/Tsen input is biased within the limits of an artificial temperature window. Charging of battery packs that are used in portable power tool applications typically use temperature as the only means for fast charge termination. The MC33340/342 can be configured in this manner by constantly resetting the −DV detection logic. This is accomplished by biasing the Vsen input to ≈1.5 V from a two resistor divider that is connected between the positive battery pack terminal and ground. The Vsen Gate output is also connected to the Vsen input. Now, each time that the Sample Timer causes the Vsen output to go low, the Vsen input will be pulled below the undervoltage threshold of 1.0 V. This causes a reset of the −DV logic every 1.38 seconds, thus disabling detection. + 1.46 k The resistance change approximates a thermal hysteresis of 2°C with a 10 kW thermistor operating at 0°C. The under temperature fast charge inhibit feature can be disabled by biasing the t3/Tref Low input to a voltage that is greater than that present at t2/Tsen, and less than VCC − 0.7 V. Under extremely cold conditions, it is possible that the thermistor resistance can become too high, allowing the t2/Tsen input to go above VCC − 0.7 V, and activate the timer. This condition can be prevented by placing a resistor in parallel with the thermistor. Note that the time/temperature threshold of VCC − 0.7 V is a typical value at room temperature. Refer to the Electrical Characteristics table and to Figure 4 for additional information. The upper comparator senses the presence of an over temperature condition. When the upper temperature limit is exceeded, the comparator output sets the Overtemperature Latch and the charger is switched to trickle mode. Once the latch is set, the charger cannot be returned to fast charge, even after the temperature falls below the limit. This feature prevents the battery pack from being continuously temperature cycled and overcharged. The latch can be reset Operating Logic The order of events in the charging process is controlled by the logic circuitry. Each event is dependent upon the input conditions and the chosen method of charge termination. A table summary containing all of the possible operating modes is shown in Table 2. Table 1. FAST CHARGE BACKUP TERMINATION TIME/TEMPERATURE LIMIT Programming Inputs Backup Termination Mode t3/Tref Low (Pin 5) t2/Tsen (Pin 6) t1/Tref High (Pin 7) Time Limit Fast Charge (Minutes) Time Open Open Open 283 Time Open Open GND 247 Time Open GND Open 212 Time Open GND GND 177 Time GND Open Open 141 Time GND Open GND 106 Time GND GND Open 71 Temperature 0 V to VCC − 0.7 V 0 V to VCC − 0.7 V 0 V to VCC − 0.7 V Timer Disabled http://onsemi.com 8 MC33340, MC33342 Table 2. CONTROLLER OPERATING MODE TABLE Input Condition Vsen Input Voltage: >1.0 V and <2.0 V >1.0 V and <2.0 V with two consecutive −DV events detected after the initial holdoff period (thold) <1.0 V or >2.0 V Timer Backup: Within time limit Beyond time limit Controller Operation The divided down battery pack voltage is within the fast charge voltage range. The charger switches from trickle to fast charge mode as Vsen enters this voltage range, and a reset pulse is then applied to the timer and the overtemperature latch. The battery pack has reached full charge and the charger switches from fast to a latched trickle mode. A reset pulse must be applied for the charger to switch back to the fast mode. The reset pulse occurs when entering the 1.0 V to 2.0 V window for Vsen or when VCC rises above 3.0 V. The divided down battery pack voltage is outside of the fast charge voltage range. The charger switches from fast to trickle mode. The timer has not exceeded the programmed limit. The charger will be in fast charge mode if Vsen and VCC are within their respective operating limits. The timer has exceeded the programmed limit. The charger switches from fast to a latched trickle mode. Temperature Backup: Within limits The battery pack temperature is within the programmed limits. The charger will be in fast charge mode if Vsen and VCC are within their respective operating limits. Below lower limit The battery pack temperature is below the programmed lower limit. The charger will stay in trickle mode until the lower temperature limit is exceeded. When exceeded, the charger will switch from trickle to fast charge mode. Above upper limit The battery pack temperature has exceeded the programmed upper limit. The charger switches from fast to a latched trickle mode. A reset signal must be applied and then released for the charger to switch back to the fast charge mode. The reset pulse occurs when entering the 1.0 V to 2.0 V window for Vsen or when VCC rises above 3.0 V. Power Supply Voltage: VCC >3.0 V and <18 V VCC >0.6 V and <2.8 V This is the nominal power supply operating voltage range. The charger will be in fast charge mode if Vsen, and temperature backup or timer backup are within their respective operating limits. The undervoltage lockout comparator will be activated and the charger will be in trickle mode. A reset signal is applied to the timer and over temperature latch. Testing Under normal operating conditions, it would take 283 minutes to verify the operation of the 34 stage ripple counter used in the timer. In order to significantly reduce the test time, three digital switches were added to the circuitry and are used to bypass selected divider stages. Entering each of the test modes without requiring additional package pins or affecting normal device operation proved to be challenging. Refer to the timer functional block diagram in Figure 11. Switch 1 bypasses 19 divider stages to provide a 524,288 times speedup of the clock. This switch is enabled when the Vsen input falls below 1.0 V. Verification of the programmed fast charge time limit is accomplished by measuring the propagation delay from when the Vsen input falls below 1.0 V, to when the F/T output changes from a high−to−low state. The 71, 106, 141, 177, 212, 247 and 283 will now correspond to 8.1, 12.1, 16.2, 20.2, 24.3, 28.3 and 32.3 ms delays. It is possible to enter this test mode during operation if the equivalent battery pack voltage was to fall below 1.0 V. This will not present a problem since the device would normally switch from fast to trickle mode under these conditions, and the relatively short variable time delay would be transparent to the user. Switch 2 bypasses 11 divider stages to provide a 2048 times speedup of the clock. This switch is necessary for testing the 19 stages that were bypassed when switch 1 was enabled. Switch 2 is enabled when the Vsen input falls below 1.0 V and the t1/Tref High input is biased at −100 mV. Verification of the 19 stages is accomplished by measuring a nominal propagation delay of 338.8 ms from when the Vsen input falls below 1.0 V, to when the F/T output changes from a high−to−low state. Switch 3 is a dual switch consisting of sections “A” and “B”. Section “A” bypasses 5 divider stages to provide a 32 times speedup of the Vsen gate signal that is used in sampling the battery voltage. This speedup allows faster test verification of two successive −DV events. Section “B” bypasses 11 divider stages to provide a 2048 speedup of the trickle mode holdoff timer. Switches 3A and 3B are both activated when the t1/Tref High input is biased at −100 mV with respect to Pin 4. http://onsemi.com 9 MC33340, MC33342 11 ms Preset Q D Switch 2 Q 22 ms Convert Switch 3A Test 211 Normal 25 Oscillator 760 kHz ÷23 ÷26 ÷22 ÷23 ÷21 ÷25 ÷28 ÷22 ÷2 ÷2 ÷2 ÷2 Switch 3B 211 95 kHz SCK to Voltage to Frequency Converter Switch 1 219 MC33340 Holdoff Time Signal MC33342 t1/TrefHigh t2/Tsen t3/TrefLow Time and Test Decoder Each test mode bypass switch is shown in the proper position for normal charger operation. Fast/Trickle Output Figure 11. Timer Functional Block Diagram IC1 MC33340 or MC33342 VCC R5 1.0 k D3 AC Line Input D2 R2 1 R7 2.4 IAdj C1 0.01 Ck F/V R Over High 2.0 V R8 220 Low Vsen Gate 2 ǒVVBatt –1Ǔ sen Ichg(fast) + Vref ) (IAdjR8) Q Over Temp R Latch Battery Pack S Temp Detect Under 30 mA t1/Tref High t1 −DV Detect Counter Timer t2 D4 D1 Charge Status R2 + R1 Battery Detect 1.0 V 7 30 mA t2/Tsen 30 mA t3/Tref Low t3 3 5 Time/Temp Select R7 Vin–Vf(D3)–VBatt Ichg(trickle) + R5 Gnd SW3 R3 SW2 R4 VCC t/T F/T SW1 6 Vsen Gate Fast/ Trickle RNTC 10 k 2.9 V R1 IC2 R6 1.8 k VCC Voltage to Frequency Converter Vsen LM317 DC Input Undervoltage Lockout Internal Bias 1N4002 C2 0.1 8 0.6 V 4 This application combines the MC33340/342 with an adjustable three terminal regulator to form an isolated secondary side battery charger. Regulator IC2 operates as a constant current source with R7 setting the fast charge level. The trickle charge level is set by R5. The R2/R1 divider should be adjusted so that the Vsen input is less than 2.0 V when the batteries are fully charged. The printed circuit board shown below will accept the several TO−220 style heatsinks for IC2 and are all manufactured by AAVID Engineering Inc. Figure 12. Line Isolated Linear Regulator Charger http://onsemi.com 10 MC33340, MC33342 AAVID # qSA °C/W 592502B03400 24.0 593002B03400 14.0 590302B03600 9.2 2.25″ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ 3 2 1 R4 D1 R1 C1 D4 R5 Input Positive Charge Mode Input R6 Input Return Battery Negative RNTC RNTC MC33340 RNTC R3 IC1 Battery Positive Output C2 1.70″ D2 R2 R8 D3 IC2 R7 (Top View) (Bottom View) Figure 13. Printed Circuit Board and Component Layout (Circuit of Figure 12) UC3842 Series VCC R2 Voltage Feedback Input 1.0 mA 2R 2 R1 R Error Amplifier 1 1.0 V Current Sense Comparator Output/ Compensation Gnd 5 Primary Circuitry OC2 Isolation Boundary Secondary Circuitry VBattery MC33340 or MC33342 Vsen Gate Vsen Gate 2 R3 OC1 3 Fast/ Trickle F/T Gnd 4 The MC33340/342 can be combined with any of the devices in the UC3842 family of current mode controllers to form a switch mode battery charger. In this example, optocouplers OC1 and OC2 are used to provide isolated control signals to the UC3842. During battery voltage sensing, OC2 momentarily grounds the Output/Compensation pin, effectively turning off the charger. When fast charge termination is reached, OC1 turns on, and grounds the lower side of R3. This reduces the peak switch current threshold of the Current Sense Comparator to a programmed trickle current level. For additional converter design information, refer to the UC3842 and UC3844 device family data sheets. Figure 14. Line Isolated Switch Mode Charger http://onsemi.com 11 MC33340, MC33342 MC34166 or MC34167 4 OSC AC Line Input VCC ILimit + S R4 Switch Output Q R 2 PWM UVLO Thermal R2 Ref Voltage Feedback Input EA Battery Pack 1 Gnd 3 Compensation 5 C1 R3 R1 MC33340/342 Vsen Gate Vsen Gate 2 3 Fast/ Trickle F/T Gnd 4 The MC33340/342 can be used to control the MC34166 or MC34167 power switching regulators to produce an economical and efficient fast charger. These devices are capable of operating continuously in current limit with an input voltage range of 7.5 to 40 V. The typical charging current for the MC34166 and MC34167 is 4.3 A and 6.5 A respectively. Resistors R2 and R1 are used to set the battery pack fast charge float voltage. If precise float voltage control is not required, components R1, R2, R3 and C1 can be deleted, and Pin 1 must be grounded. The trickle current level is set by resistor R4. It is recommended that a redundant charge termination method be employed for end user protection. This is especially true for fast charger systems. For additional converter design information, refer to the MC34166 and MC34167 data sheets. Figure 15. Switch Mode Fast Charger http://onsemi.com 12 MC33340, MC33342 ORDERING INFORMATION Device MC33340D SO−8 MC33340DG SO−8 (Pb−Free) MC33340DR2 SO−8 MC33340DR2G MC33340P MC33340PG MC33342D 1000 Units / Rail PDIP−8 (Pb−Free) SO−8 MC33342DR2 SO−8 MC33342PG 2500 / Tape & Reel PDIP−8 SO−8 (Pb−Free) MC33342P 98 Units / Rail SO−8 (Pb−Free) MC33342DG MC33342DR2G Shipping † Package 98 Units / Rail 2500 / Tape & Reel SO−8 (Pb−Free) PDIP−8 1000 Units / Rail PDIP−8 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 13 MC33340, MC33342 PACKAGE DIMENSIONS PDIP−8 P SUFFIX CASE 626−05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 −B− 1 4 F −A− NOTE 2 L C J −T− N SEATING PLANE D H M K G 0.13 (0.005) M T A M B M http://onsemi.com 14 DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC −−− 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC −−− 10_ 0.030 0.040 MC33340, MC33342 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AG NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. −X− A 8 5 S B 1 0.25 (0.010) M Y M 4 K −Y− G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 15 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC33340, MC33342 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: [email protected] http://onsemi.com 16 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MC33340/D