MC10H116 Triple Line Receiver Description The MC10H116 is a triple differential amplifier designed for use in sensing differential signals over long lines and is a functional/pinout duplication of the MC10116, with 100% improvement in propagation delay and no increase in power supply current. For termination information see AND8020. http://onsemi.com MARKING DIAGRAMS* Features • Propagation Delay, 1.0 ns Typical • Power Dissipation 85 mW Typ/Pkg (same as MECL 10K™) • Improved Noise Margin 150 mV (Over Operating Voltage and 4 2 5 3 9 6 10 7 12 14 13 15 11 VBB* CDIP−16 L SUFFIX CASE 620A When input pin with bubble goes positive it’s respective output pin with bubble goes positive. 1 16 *VBB to be used to supply bias to the MC10H116 only and bypassed (when used) with 0.01 mF to 0.1 mF capacitor to ground (0 V). VBB can source < 1.0 mA. The MC10H116 is designed to be used in sensing differential signals over long lines. The bias supply (VBB) is made available to make the device useful as a Schmitt trigger, or in other applications where a stable reference voltage is necessary. Active current sources provide these receivers with excellent common−mode noise rejection. If any amplifier in a package is not used, one input of that amplifier must be connected to VBB to prevent unbalancing the current−source bias network. The MC10H116 does not have internal−input pull− down resistors. This provides high impedance to the amplifier input and facilitates differential connections. Applications: • Low Level Receiver • Voltage Level • Schmitt Trigger Interface VCC1 = Pin 1 VCC2 = Pin 16 VEE = Pin 8 MC10H116L AWLYYWW 1 Temperature Range) Voltage Compensated MECL 10K Compatible Pb−Free Packages are Available* • • • 16 16 MC10H116P AWLYYWWG 16 1 PDIP−16 P SUFFIX CASE 648 1 1 20 20 1 10H116G AWLYYWW PLCC−20 FN SUFFIX CASE 775 16 Figure 1. Logic Diagram 16 10H116G AWLYWW 1 SO−16 D SUFFIX CASE 751B VCC1 AOUT AOUT AIN AIN BOUT BOUT VEE 1 16 2 15 3 14 COUT 4 13 5 12 CIN 6 11 7 10 8 9 VCC2 16 COUT 16 CIN VBB BIN BIN Figure 2. Dip Pin Assignment *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. February, 2006 − Rev. 10 10H116 ALYWG 1 SOEIAJ−16 M, MEL SUFFIX CASE 966 Pin assignment is for Dual−in−Line Package. For PLCC pin assignment, see TND309, the Pin Conversion Tables, page 9. © Semiconductor Components Industries, LLC, 2006 1 1 A WL YY WW 1 = Assembly Location = Wafer Lot = Year = Work Week *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. Publication Order Number: MC10H116/D MC10H116 Table 1. MAXIMUM RATINGS Symbol Rating Unit VEE Power Supply (VCC = 0) Characteristic −8.0 to 0 Vdc VI Input Voltage (VCC = 0) 0 to VEE Vdc Iout Output Current 50 100 mA TA Operating Temperature Range 0 to +75 °C Tstg Storage Temperature Range − Plastic − Ceramic −55 to +150 −55 to +165 °C °C − Continuous − Surge Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. Table 2. ELECTRICAL CHARACTERISTICS (VEE = −5.2 V ±5%) (Note 2) 0° Symbol Characteristic Min 25° 75° Max Min Max Min Max Unit IE Power Supply Current − 23 − 21 − 23 mA IinH Input Current High − 150 − 95 − 95 mA ICBO Input Leakage Current − 1.5 − 1.0 − 1.0 mA VBB Reference Voltage −1.38 −1.27 −1.35 −1.25 −1.31 −1.19 Vdc VOH High Output Voltage −1.02 −0.84 −0.98 −0.81 −0.92 −0.735 Vdc VOL Low Output Voltage −1.95 −1.63 −1.95 −1.63 −1.95 −1.60 Vdc VIH High Input Voltage (Note 1) −1.17 −0.84 −1.13 −0.81 −1.07 −0.735 Vdc VIL Low Input Voltage (Note 1) −1.95 −1.48 −1.95 −1.48 −1.95 −1.45 Vdc VCMR Common Mode − − −2.85 to −0.8 − − Vdc VPP Input Sensitivity (Note 3) − − 150 typ − − mVPP Range (Note 4) 1. When VBB is used as the reference voltage. 2. Each MECL 10H™ series circuit has been designed to meet the specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50−ohm resistor to −2.0 V. 3. Differential input not to exceed 1.0 Vdc. 4. 150 mVp−p differential input required to obtain full logic swing on output. Table 3. AC CHARACTERISTICS 0° Symbol Characteristic 25° 75° Min Max Min Max Min Max Unit tpd Propagation Delay 0.4 1.3 0.4 1.3 0.45 1.45 ns tr Rise Time 0.5 1.5 0.5 1.6 0.5 1.7 ns tf Fall Time 0.5 1.5 0.5 1.6 0.5 1.7 ns NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. http://onsemi.com 2 MC10H116 ORDERING INFORMATION Package Shipping † SO−16 48 Units / Rail MC10H116DG SO−16 (Pb−Free) 48 Units / Rail MC10H116DR2 SO−16 2500 / Tape & Reel MC10H116DR2G SO−16 (Pb−Free) 2500 / Tape & Reel MC10H116FN PLCC−20 46 Units / Rail MC10H116FNG PLCC−20 (Pb−Free) 46 Units/Rail MC10H116FNR2 PLCC−20 500 / Tape & Reel MC10H116FNR2G PLCC−20 (Pb−Free) 500 / Tape & Reel MC10H116L CD1P−16 25 Units / Rail MC10H116M SOEIAJ−16 50 Units / Rail MC10H116MG SOEIAJ−16 (Pb−Free) 50 Units / Rail MC10H116MEL SOEIAJ−16 2000 / Tape & Reel MC10H116MELG SOEIAJ−16 (Pb−Free) 2000 / Tape & Reel MC10H116P PD1P−16 25 Units / Rail MC10H116PG PD1P−16 (Pb−Free) 25 Units / Rail Device MC10H116D †For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3 MC10H116 PACKAGE DIMENSIONS 20 LEAD PLLC CASE 775−02 ISSUE E 0.007 (0.180) M T L−M B Y BRK −N− U N S 0.007 (0.180) M T L−M S S N S D −L− −M− Z W 20 D 1 V 0.007 (0.180) M T L−M S N S R 0.007 (0.180) M T L−M S N S Z G J H N 0.007 (0.180) M T L−M PLANE F 0.007 (0.180) M T L−M VIEW S N S S S N S K 0.004 (0.100) −T− SEATING VIEW S S T L−M K1 E G1 0.010 (0.250) S T L−M S VIEW D−D A C 0.010 (0.250) G1 X S NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. DIMENSIONS IN INCHES. 3. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). http://onsemi.com 4 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 −−− 0.025 −−− 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 −−− 0.020 2_ 10 _ 0.310 0.330 0.040 −−− MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 −−− 0.64 −−− 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 −−− 0.50 2_ 10 _ 7.88 8.38 1.02 −−− S N S MC10H116 PACKAGE DIMENSIONS CDIP−16 L SUFFIX CERAMIC DIP PACKAGE CASE 620A−01 ISSUE O B A A 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. 5 THIS DRAWING REPLACES OBSOLETE CASE OUTLINE 620−10. M B L 16X 0.25 (0.010) E M DIM A B C D E F G H K L M N J T B F C K MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 −−− 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 SEATING PLANE T N INCHES MIN MAX 0.750 0.785 0.240 0.295 −−− 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 G 16X 0.25 (0.010) M D T A PDIP−16 P SUFFIX PLASTIC DIP PACKAGE CASE 648−08 ISSUE R −A− 16 9 1 8 B F C L S −T− H SEATING PLANE K G D M J 16 PL 0.25 (0.010) M T A M http://onsemi.com 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 MC10H116 PACKAGE DIMENSIONS SO−16 D SUFFIX PLASTIC DIP PACKAGE CASE 751B−05 ISSUE J −A− 16 9 1 8 −B− P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 8 PL 0.25 (0.010) M B S G R K DIM A B C D F G J K M P R F X 45 _ C −T− SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S SOEIAJ−16 CASE 966−01 ISSUE A 16 Q1 E HE 1 M_ L 8 Z DETAIL P D e VIEW P A 0.13 (0.005) c A1 b M INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). LE 9 MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 0.10 (0.004) DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 −−− 0.78 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 −−− 0.031 MECL 10H and MECL 10K are trademarks of Motorola, Inc. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: [email protected] http://onsemi.com 6 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MC10H116/D