Si9110/9111 Vishay Siliconix High-Voltage Switchmode Controllers FEATURES D D D D 10- to 120-V Input Range Current-Mode Control High-Speed, Source-Sink Output Drive High Efficiency Operation (> 80%) D Reference Selection Si9110 − "1% Si9111 − "10% D Internal Start-Up Circuit D Internal Oscillator (1 MHz) D SHUTDOWN and RESET DESCRIPTION The Si9110/9111 are BiC/DMOS integrated circuits designed for use as high-performance switchmode controllers. A high-voltage DMOS input allows the controller to work over a wide range of input voltages (10- to 120-VDC). Current-mode PWM control circuitry is implemented in CMOS to reduce internal power consumption to less than 10 mW. power. When combined with an output MOSFET and transformer, the Si9110/9111 can be used to implement single-ended power converter topologies (i.e., flyback, forward, and cuk). The Si9110/9111 are available in both standard and lead (Pb)-free 14-pin plastic DIP and SOIC packages which are specified to operate over the industrial temperature range of −40 _C to 85 _C. A push-pull output driver provides high-speed switching for MOSPOWER devices large enough to supply 50 W of output FUNCTIONAL BLOCK DIAGRAM FB COMP 14 OSC IN DISCHARGE 13 9 8 Error Amplifier VREF OSC OUT 7 OSC To VCC − 10 Clock + 4V 2V − Ref Gen Current-Mode Comparator + (1/2 fOSC) 4 R Q OUTPUT 5 S −VIN + − BIAS VCC +VIN 1 Current Sources 6 To Internal Circuits 2 1.2 V 3 VCC − 8.1 V C/L Comparator + Undervoltage Comparator S Q R 11 12 SENSE SHUTDOWN RESET − + 8.6 V Pre-Regulator/Start-Up Document Number: 70004 S-42037—Rev. H, 15-Nov-04 www.vishay.com 1 Si9110/9111 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Voltages Referenced to −VIN (Note: VCC < +VIN + 0.3 V) Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V Power Dissipation (Package)a 14-Pin Plastic DIP (J Suffix)b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 mW 14-Pin SOIC (Y Suffix)c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW +VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 V Logic Inputs (RESET, SHUTDOWN, OSC IN, OSC OUT) . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V Linear Inputs (FEEDBACK, SENSE, BIAS, VREF) . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . . . . . . . . 5 mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150_C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 to 85_C Thermal Impedance (JA) 14-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167_C/W 14-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W Notes a. Device mounted with all leads soldered or welded to PC board. b. Derate 6 mW/_C above 25_C. c. Derate 7.2 mW/_C above 25_C. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE Voltages Referenced to −VIN VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.5 V to 13.5 V ROSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 k to 1 M +VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 120 V Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC − 3 V fOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 kHz to 1 MHz Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC SPECIFICATIONSa Test Conditions Unless Otherwise Specified Parameter Symbol DISCHARGE = −V VIN = 0 V VCC = 10 V, +VIN = 48 V RBIAS = 390 k , ROSC = 330 k D Suffix −40 to 85_C Tempb Mind Typc Maxd Si9110 Room 3.92 4.0 4.08 Si9111 Room 3.60 4.0 4.40 Si9110 Full 3.86 Unit Reference Output Voltage VR OSC IN = − VIN (OSC Disabled) RL = 10 M Si9111 Output Impedancee ZOUT Short Circuit Current ISREF Temperature Stabilitye TREF VREF = −VIN Full 3.52 Room 15 Room 70 Full 4.14 V 4.46 30 45 k 100 130 A 0.50 1.0 mV/_C Oscillator Maximum Frequencye Initial Accuracy Voltage Stability Temperature Coefficiente fMAX fOSC f/f ROSC = 0 Room 1 3 ROSC = 330 k, See Note f Room 80 100 120 ROSC = 150 k, See Note f Room 160 200 240 f/f=f(13.5 V) − f(9.5 V)/ f(9.5 V) Room 10 15 % Full 200 500 ppm/_C TOSC MHz kHz Error Amplifier Feedback Input Voltage VFB Input BIAS Current IFB Input OFFSET Voltage VOS Open Loop Voltage Gaine AVOL Unity Gain Bandwidthe BW Dynamic Output Impedancee ZOUT Output Current IOUT Power Supply Rejection www.vishay.com 2 PSRR FB Tied to COMP OSC IN = − VIN (OSC Disabled) OSC IN = − VIN, VFB = 4 V OSC IN = − VIN (OSC Disabled) Si9110 Room 3.96 4.00 4.04 Si9111 Room 3.60 4.00 4.40 V Room 25 500 nA Room "15 "40 mV Room 60 80 dB Room 1 1.3 MHz Room 1000 2000 −2.0 −1.4 Source (VFB = 3.4 V) Room Sink (VFB = 4.5 V) Room 0.12 0.15 9.5 V v VCC v 13.5 V Room 50 70 mA dB Document Number: 70004 S-42037—Rev. H, 15-Nov-04 Si9110/9111 Vishay Siliconix SPECIFICATIONSa Test Conditions Unless Otherwise Specified Parameter D Suffix −40 to 85_C DISCHARGE = −VIN = 0 V VCC = 10 V, +VIN = 48 V RBIAS = 390 k , ROSC = 330 k Tempb Mind VSOURCE VFB = 0 V Room 1.0 td VSENSE = 1.5 V, See Figure 1 Room Symbol Typc Maxd Unit Current Limit Threshold Voltage Delay to Outpute 1.2 1.4 V 100 150 ns 10 A Pre-Regulator/Start-Up Input Voltage +VIN IIN = 10 A Room Input Leakage Current +IIN VCC w 9.4 V Room 120 V Pre-Regulator Start-Up Current ISTART Pulse Width v 300 s, VCC = VULVO Room 8 15 VCC Pre-Regulator Turn-Off Threshold Voltage VREG IPRE-REGULATOR = 10 A Room 7.8 8.6 9.4 Undervoltage Lockout VUVLO Room 7.0 8.1 8.9 V VREG −VUVLO VDELTA Room 0.3 0.6 Room 0.45 0.6 1.0 mA Room 10 15 20 A 50 100 mA Supply Supply Current ICC Bias Current CLOAD < 75 pF (Pin 4) IBIAS Logic SHUTDOWN Delaye SHUTDOWN Pulse Widthe tSD CL = 500 pF, VSENSE −VIN, See Figure 2 Room tSW See Figure 3 Room 50 Room 50 Room 25 RESET Pulse Widthe tRW Latching Pulse Width SHUTDOWN and RESET Lowe tLW See Figure 3 ns Input Low Voltage VIL Room Input High Voltage VIH Room 2.0 Input Current Input Voltage High IIH VIN = 10 V Room Input Current Input Voltage Low IIL VIN = 0 V Room −35 Output High Voltage VOH IOUT = −10 mA Room Full 9.7 9.5 Output Low Voltage VOL IOUT = 10 mA Room Full Output Resistance ROUT IOUT = 10 mA, Source or Sink Room Full 20 25 30 50 Room 40 75 Room 40 75 V 8 1 5 A −25 Output Rise Timee Fall Timee tr tf CL = 500 pF 0.30 0.50 V ns Notes a. Refer to PROCESS OPTION FLOWCHART for additional information. b. Room = 25_C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. e. Guaranteed by design, not subject to production test. f. CSTRAY Pin 8 = v 5 pF. Document Number: 70004 S-42037—Rev. H, 15-Nov-04 www.vishay.com 3 Si9110/9111 Vishay Siliconix TIMING WAVEFORMS 1.5 V − SENSE 0 VCC SHUTDOWN 0 tr v 10 ns 50% − tSD td VCC VCC 90% OUTPUT 90% OUTPUT 0 − 0 − FIGURE 1. FIGURE 2. tSW VCC SHUTDOWN 0 tf v 10 ns 50% 50% 50% − tr, tf v 10 ns tLW VCC RESET 0 50% 50% 50% − tRW FIGURE 3. TYPICAL CHARACTERISTICS Output Switching Frequency vs. Oscillator Resistance +VIN vs. +IIN at Start-Up 140 1M VCC = −VIN 120 f OUT (Hz) +V IN (V) 100 80 60 100 k 40 20 0 10 k 10 www.vishay.com 4 15 20 10 k 100 k 1M +IIN (mA) rOSC () FIGURE 4. FIGURE 5. Document Number: 70004 S-42037—Rev. H, 15-Nov-04 Si9110/9111 Vishay Siliconix PIN CONFIGURATIONS AND ORDERING INFORMATION Dual-In-Line and SOIC BIAS 1 14 FB +VIN 2 13 COMP ORDERING INFORMATION Part Number SENSE 3 12 RESET OUTPUT 4 11 SHUTDOWN −VIN 5 10 VREF VCC 6 9 DISCHARGE Si9111DY-T1 OSC OUT 7 8 OSC IN Si9111DY-T1—E3 Top View Temperature Range Package Si9110DY Si9110DY-T1 Si9110DY-T1—E3 SOIC-14 Si9111DY −40 to 85_C Si9110DJ Si9110DJ-—E3 Si9111DJ PDIP 14 PDIP-14 Si9111DJ-—E3 DETAILED DESCRIPTION Pre-Regulator/Start-Up Section Due to the low quiescent current requirement of the Si9110/9111 control circuitry, bias power can be supplied from the unregulated input power source, from an external regulated low-voltage supply, or from an auxiliary “bootstrap” winding on the output inductor or transformer. lead to a high level of power dissipation in the IC (for a 48-V input, approximately 1 W). Excessive start-up time caused by external loading of the VCC supply can result in device damage. Figure 6 gives the typical pre-regulator current at BiC/DMOS as a function of input voltage. BIAS When power is first applied during start-up, +VIN (pin 2) will draw a constant current. The magnitude of this current is determined by a high-voltage depletion MOSFET device which is connected between +VIN and VCC (pin 6). This start-up circuitry provides initial power to the IC by charging an external bypass capacitance connected to the VCC pin. The constant current is disabled when VCC exceeds 8.6 V. If VCC is not forced to exceed the 8.6-V threshold, then VCC will be regulated to a nominal value of 8.6 V by the pre-regulator circuit. To properly set the bias for the Si9110/9111, a 390-k resistor should be tied from BIAS (pin 1) to −VIN (pin 5). This determines the magnitude of bias current in all of the analog sections and the pull-up current for the SHUDOWN and RESET pins. The current flowing in the bias resistor is nominally 15 A. Reference Section As the supply voltage rises toward the normal operating conditions, an internal undervoltage (UV) lockout circuit keeps the output driver disabled until VCC exceeds the undervoltage lockout threshold (typically 8.1 V). This guarantees that the control logic will be functioning properly and that sufficient gate drive voltage is available before the MOSFET turns on. The design of the IC is such that the undervoltage lockout threshold will be at least 300 mV less than the pre-regulator turn-off voltage. Power dissipation can be minimized by providing an external power source to VCC such that the constant current source is always disabled. Note: During start-up or when VCC drops below 8.6 V the start-up circuit is capable of sourcing up to 20 mA. This may Document Number: 70004 S-42037—Rev. H, 15-Nov-04 The reference section of the Si9110 consists of a temperature compensated buried zener and trimmable divider network. The output of the reference section is connected internally to the non-inverting input of the error amplifier. Nominal reference output voltage is 4 V. The trimming procedure that is used on the Si9110 brings the output of the error amplifier (which is configured for unity gain during trimming) to within "1% of 4 V. This compensates for input offset voltage in the error amplifier. The output impedance of the reference section has been purposely made high so that a low impedance external voltage source can be used to override the internal voltage source, if desired, without otherwise altering the performance of the device. www.vishay.com 5 Si9110/9111 Vishay Siliconix DETAILED DESCRIPTION (CONT’D) Applications which use a separate external reference, such as non-isolated converter topologies and circuits employing optical coupling in the feedback loop, do not require a trimmed voltage reference with 1% accuracy. The Si9111 accommodates the requirements of these applications at a lower cost, by leaving the reference voltage untrimmed. The 10% accurate reference thus provided is sufficient to establish a dc bias point for the error amplifier. logic. The two inputs are fed through a latch preceding the output switch. Depending on the logic state of RESET, SHUTDOWN can be either a latched or unlatched input. The output is off whenever SHUTDOWN is low. By simultaneously having SHUTDOWN and RESET low, the latch is set and SHUTDOWN has no effect until RESET goes high. The truth table for these inputs is given in Table 1. Table 1: Truth Table for the SHUTDOWN and RESET Pins Error Amplifier Closed-loop regulation is provided by the error amplifier, which is intended for use with “around-the-amplifier” compensation. A MOS differential input stage provides for low input current. The noninverting input to the error amplifier (VREF) is internally connected to the output of the reference supply and should be bypassed with a small capacitor to ground. SHUTDOWN RESET H H H Output Normal Operation Normal Operation (No Change) L H Off (Not Latched) L L Off (Latched) L Off (Latched, No Change) Oscillator Section The oscillator consists of a ring of CMOS inverters, capacitors, and a capacitor discharge switch. Frequency is set by an external resistor between the OSC IN and OSC OUT pins. (See Figure 5 for details of resistor value vs. frequency.) The DISCHARGE pin should be tied to −VIN for normal internal oscillator operation. A frequency divider in the logic section limits switch duty cycle to v50% by locking the switching frequency to one half of the oscillator frequency. Remote synchronization is accomplished by capacitive coupling of a positive SYNC pulse into the OSC IN (pin 8) terminal. For a 5-V pulse amplitude and 0.5-s pulse width, typical values would be 100 pF in series with 3 k to pin 8. SHUTDOWN and RESET SHUTDOWN (pin 11) and RESET (pin 12) are intended for overriding the output MOSFET switch via external control www.vishay.com 6 Both pins have internal current source pull-ups and should be left disconnected when not in use. An added feature of the current sources is the ability to connect a capacitor and an open-collector driver to the SHUTDOWN or RESET pins to provide variable shutdown time. Output Driver The push-pull driver output has a typical on-resistance of 20 . Maximum switching times are specified at 75 ns for a 500-pF load. This is sufficient to directly drive MOSFETs such as the 2N7004, 2N7005, IRFD120 and IRFD220. Larger devices can be driven, but switching times will be longer, resulting in higher switching losses. In order to drive large MOSPOWER devices, it is necessary to use an external driver IC, such as the Vishay Siliconix D469A. The D469A can switch very large devices such as the SMM20N50 (500 V, 0.3 ) in approximately 100 ns. Document Number: 70004 S-42037—Rev. H, 15-Nov-04 Si9110/9111 Vishay Siliconix APPLICATIONS 1N5822 GND +5 V @ 0.75 A OSC SYNC PULSE (If Needed) 220 F 3k 2 0.022 F 0.1 F 20 F 240 k FEEDBACK 14 6 VCC 0.1 F 390 k 47 F 100 pF 8 13 1N5819 150 k 10 4 1 3 5 1N4148 7 Si9110 9 −5 V @ 0.25 A 2N7004 To Pin 6 VCC 1 F 18 k 12 k Feedback To Pin 14 1 1/ W 2 −48 V FIGURE 6. 5-Watt Power Supply for Telecom Applications Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?70004. Document Number: 70004 S-42037—Rev. H, 15-Nov-04 www.vishay.com 7 Legal Disclaimer Notice Vishay Notice Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale. Document Number: 91000 Revision: 08-Apr-05 www.vishay.com 1