VISHAY SI9145BQ-T1-E3

Si9145
Vishay Siliconix
Low-Voltage Switchmode Controller
FEATURES
D
D
D
D
D
D
2.7-V to 7-V Input Operating Range
Voltage-Mode PWM Control
High-Speed, Source-Sink Output Drive (200 mA)
Internal Oscillator (up to 2 MHz)
Standby Mode
0−100% Controllable Maximum Duty-Cycle
DESCRIPTION
The Si9145 switchmode controller IC is ideally suited for high
efficiency dc/dc converters in low input voltage systems.
Operation is guaranteed down to 2.7 V, with a minimum
start-up voltage of 3.0 V making the Si9145 ideal for use with
NiCd, NMH, and lithium ion battery packs. A mode select pin
allows the output driver polarity to be programmed allowing the
device to function as a step-up or step-down converter.
Supply current in normal operation is typically 1.1 mA and
250 mA in standby mode.
The Si9145 implements conventional voltage mode control.
The maximum duty cycle in boost mode can be limited by
voltage on DMAX/SS pin. Frequency can be externally
programmed by selection of ROSC and COSC.
Features include a precision bandgap reference, a wide
bandwidth error amplifier, a 2-MHz oscillator, an input voltage
monitor with standby mode and a 200-mA output driver.
The Si9145 is available in both standard and lead (Pb)-free
16-pin SOIC and TSSOP packages and is specified over the
industrial temperature range (−25_C to 85_C).
FUNCTIONAL BLOCK DIAGRAM
1.5-V Reference
Generator
VDD
UVLO
UVLOSET
VREF
Temp
Sense
VUVLO
S
OTS
ENABLE
R
MODE SELECT
DMAX/SS
COMP
Error Amp
NI
+
FB
−
COSC
ROSC
VS
+
Logic
Control
−
Driver
OUTPUT
PGND
+
−
GND
Oscillator
Pentiumt is a trademark of Intel Corporation. PowerPCt is a trademark of IBM.
Document Number: 70021
S-40710—Rev. K, 19-Apr-04
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1
Si9145
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to GND.
VDD, VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "0.3 V
VDD to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD to +0.3 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD to +0.3 V
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 125_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Power Dissipation (Package)a
16-Pin SOIC (Y Suffix)b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
16-Pin TSSOP (Q Suffix)c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 925 mW
Thermal Impedance (QJA)
16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W
16-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135_C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 7.2 mW/_C above 25_C.
c. Derate 7.4 mW/_C above 25_C.
RECOMMENDED OPERATING RANGE
Voltages Referenced to GND.
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7 V to 7 V
COSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 pF to 200 pF
VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7 V to 7 V
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD
fOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kHz to 2 MHz
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD
ROSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 kW to 250 kW
VREF Load Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >150 kW
SPECIFICATIONS
Test Conditions
Unless Otherwise Specifieda
Parameter
Symbol
2.7 V v VDD v 7 V, VDD = VS
GND = PGND
Limits
B Suffix − 25 to 85_C
Minb
Typ
Maxb
Unit
Reference
Output Voltage
VREF
IREF = −10 mA
1.455
TA = 25_C
1.477
1.545
1.50
1.523
1.0
1.15
V
Oscillator
Maximum Frequencyc
Accuracy
ROSC Voltage
Minimum Start-Up Voltage
fMAX
fOSC
100% DMAX/SS
VDMAX 100%
Temperature Stabilityc
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2
TA = 25_C
2.0
0.85
IDMAX
Df/f
MHz
1.0
VDDOSC
VDMAX 50%
Voltage
g Stabilityyc
VCC = 3.0 V
COSC = 100 pF, ROSC = 6.98 kW
VROSC
50% DMAX/SS
DMAX/SS Input Current
VCC = 3.0 V, COSC = 47 pF, ROSC = 5.0 kW
3.0
V
1.30
MODE SELECT = VDD
1.58
DMAX = 0 to VDD
−100
100
2.7 V v VDD v 7 V, Ref to 4.8 V
−16
16
−8
8
−7
7
2.7 V v VDD v 4.2 V, Ref to 3.5 V
3.8 V v VDD v 5.6 V, Ref to 4.7 V
Referenced to 25_C
TA = 25_C
nA
%
"5
Document Number: 70021
S-40710—Rev. K, 19-Apr-04
Si9145
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specifieda
Parameter
Symbol
Limits
B Suffix − 25 to 85_C
2.7 V v VDD v 7 V, VDD = VS
GND = PGND
Minb
VNI = VREF , VFB = 1.0 V
−1.0
Typ
Maxb
Unit
1.0
mA
15
mV
Error Amplifier (COSC = GND, OSC DISABLED)
Input Bias Current
IFB
Open Loop Voltage Gain
AVOL
Offset Voltage
VOS
Unity Gain Bandwidthc
BW
Output Current
IEA
Power Supply Rejectionc
VNI = VREF
47
55
−15
0
dB
10
Source (VFB = 1 V, NI = VREF)
Sink (VFB = 2 V, NI = VREF)
−2.0
0.4
PSRR
2.7 V < VDD < 7.0 V
VUVLOHL
UVLOSET High to Low
VUVLOLH
UVLOSET Low to High
Hysterisis
VHYS
VUVLOLH − VUVLOHL
UVLO Input Current
IUVLO
VUVLO = 0 to VDD
−100
Output High Voltage
VOH
VDD = 2.7 V, IOUT = −10 mA
2.55
Output Low Voltage
VOL
VDD = 2.7 V, IOUT = 10 mA
Peak Output Current
ISOURCE
VDD = 2.7 V, VOUT = 0 V
Peak Output Current
ISINK
VDD = 2.7 V, VOUT = 2.7 V
ENABLE Delay to Output
tdEN
ENABLE Rising to OUTPUT
ENABLE Logic Low
VENL
ENABLE Logic High
VENH
MHz
−1.0
0.8
60
mA
dB
UVLOSET Voltage Monitor
Under Voltage Lockout
0.85
1.0
1.15
1.2
200
V
mV
100
nA
Output
150
2.60
0.06
0.15
−180
−130
200
V
mA
Logic
ENABLE Input Current
IEN
MODE SELECT Logic Low
VMODEL
MODE SELECT Logic High
VMODEH
MODE SELECT Input Current
IMODE
1.5
ns
0.2 VDD
0.8 VDD
ENABLE = 0 to VDD
−1.0
1.0
0.2 VDD
0.8 VDD
MODE SELECT = 0 to VDD
−1.0
1.0
V
mA
V
mA
Over Temperature Sense
Trip Point
TTRIP
Output Low Voltage
VOTSL
VDD = 2.7 V, IOUT = 1 mA
150
Output High Voltage
VOTSH
VDD = 2.7 V, IOUT = −1 mA
0.06
2.55
_C
0.15
2.6
V
Supply
Supply Current − Normal Mode
Supply Current − Standby Mode
IDD
VDD = 2.7 V, fOSC = 1 MHz, ROSC = 6.98 kW
1.1
1.5
VDD = 7 V, fOSC = 1 MHz, ROSC = 6.98 kW
1.6
2.3
ENABLE = Low
250
330
mA
mA
Notes
a. CSTRAY < 5 pF on COSC. After Start-Up, VDD of w 3 V.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Guaranteed by design, not subject to production testing.
Document Number: 70021
S-40710—Rev. K, 19-Apr-04
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Si9145
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
VREF vs. Supply Voltage
1.515
VREF vs. Temperature
1.515
VDD = 3.6 V
1.510
1.510
1.505
1.505
V REF (V)
V REF (V)
VREF with 10 mA Load
1.500
1.500
1.495
1.495
1.490
1.490
1.485
2
3
4
5
6
7
1.485
−25
8
0
25
VDD − Supply Voltage (V)
VREF vs. Load Current
1.515
50
75
100
125
t − Temperature (_C)
Error Amplifier Gain and Phase
80
60
1.510
0
Gain
40
Gain (dB)
2.7, 3.0, 3.6 V
1.500
7.0 V
5.0 V
1.495
Phase
20
−60
0
−90
−20
1.490
1.485
−120
−40
5
25
10
15
20
25
30
−150
0.0001
0.001
0.01
0.1
10
1
VREF − Sourcing Current (mA)
f − Frequency (MHz)
Supply Current
vs.Supply Voltage and Output Load
Supply Current
vs. Switching Frequency and Output Load
f = 1 MHz
25
20
15
900 pF
10
100 pF
5
CL = 2,200 pF
15
900 pF
10
100 pF
5
10 pF
10 pF
0
2
3
4
5
VDD − Supply Voltage (V)
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4
6
100
VDD = 3.6 V
CL = 2,200 pF
20
Supply Current (mA)
0
Supply Current (mA)
−30
Phase (deg)
V REF (V)
1.505
7
0
0.5
1.0
1.5
2.0
Switching Frequency (MHz)
Document Number: 70021
S-40710—Rev. K, 19-Apr-04
Si9145
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Supply Current
vs. Frequency and Supply Voltage
1.9
5
CL = 10 pF
CL = 10 pF
f = 1 MHz
VDD = 7.0 V
1.7
4
5.0 V
Normal Current (mA)
Supply Current (mA)
Supply Current
vs. Supply Voltage and Temperature
3
2
1.3
25_C
1.1
3.0 V
0.2
TA = 85_C
−25_C
3.6 V
1
0.0
1.5
0.4
0.6
2.7 V
0.8
0.9
2.5
1.0
3.5
f − Frequency (MHz)
100
260
80
Duty Cycle (%)
Standby Current (m A)
270
TA = 85_C
25_C
240
6.5
7.5
Duty Cycle vs. DMAX/SS Voltage
60
40
−25_C
230
20
220
2
3
4
5
6
0
1.0
7
VDD − Supply Voltage (V)
1.1
1.2
1.3
1.4
1.5
1.6
DMAX/SS (V)
Switching Frequency vs. Supply Voltage
1.20
Frequency vs. ROSC/COSC
10.00
ROSC = 6.98 kW
COSC = 100 pF
Switching Frequency (MHz)
1.15
Switching Frequency (MHz)
5.5
VDD − Supply Voltage (V)
Standby Current
vs. Supply Voltage and Temperature
250
4.5
1.10
1.05
1.00
1.00
4.99 kW
12.1 kW
24.9 kW
0.10
49.9 kW
100 kW
0.95
249 kW
0.90
0.01
2
3
4
5
VDD − Supply Voltage (V)
Document Number: 70021
S-40710—Rev. K, 19-Apr-04
6
7
40
100
200
300
COSC − Capacitance (pF)
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Si9145
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Output Rise Time
vs. Supply Voltage and Load
50
50
40
CL = 2,200 pF
40
CL = 2,200 pF
Fall Time (nS)
Output Rise Time (nS)
Output Fall Time
vs. Supply Voltage and Load
30
900 pF
20
100 pF
10
2
3
900 pF
20
10
10 pF
0
30
100 pF
0
4
5
6
7
2
3
VDD − Supply Voltage (V)
5
6
7
UVLO Hysteresis vs. Supply Voltage
250
230
UVLO Hysteresis (mV)
40
Output Delay (nS)
4
VDD − Supply Voltage (V)
Enable Delay to Output
50
10 pF
Mode Select = High
30
Mode Select = Low
20
210
190
170
10
150
2
3
4
5
6
7
VDD − Supply Voltage (V)
2
3
4
5
6
7
VDD − Supply Voltage (V)
VREF vs. Bypass Capacitor
1.515
VDD = 3.6 V
1.510
V REF (V)
1.505
1.500
1.495
1.490
1.485
0
2
4
6
8
10
Capacitance (mF)
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Document Number: 70021
S-40710—Rev. K, 19-Apr-04
Si9145
Vishay Siliconix
TIMING WAVEFORMS
Start-Up (UVLO)
Normal (Duty Cycle Limit)
Standby
ENABLE
MODE SELECT
1.2 V
UVLOSET
1.0 V
1.0 V
ROSC
COSC
ON
OUTPUT
OFF
>1.5 V
Set for 50% Max.
DMAX/SS
Figure 1.
Si9145 Timing Diagram (MODE SELECT = High)
Start-Up (UVLO)
Normal (Duty Cycle Limit)
Standby
ENABLE
MODE SELECT
1.2 V
UVLOSET
1.0 V
1.0 V
ROSC
COSC
OFF
OUTPUT
ON
DMAX/SS
Figure 2.
Document Number: 70021
S-40710—Rev. K, 19-Apr-04
Si9145 Timing Diagram (MODE SELECT = Low)
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Si9145
Vishay Siliconix
PIN CONFIGURATIONS
SOIC-16
VDD
1
16
VS
MODE SELECT
2
15
OUTPUT
DMAX/SS
3
14
PGND
COMP
4
13
UVLOSET
FB
5
12
ENABLE
NI
6
11
OTS
VREF
7
10
COSC
GND
8
9
ROSC
TSSOP-16
VDD
1
16
VS
MODE SELECT
2
15
OUTPUT
DMAX/SS
3
14
PGND
COMP
4
13
UVLOSET
FB
5
12
ENABLE
OTS
NI
6
11
VREF
7
10
COSC
GND
8
9
ROSC
Top View
Top View
ORDERING INFORMATION−SOIC-16
Part Number
Si9145BY-T1
Si9145BY-T1—E3
Temperature Range
−25_
25_ to 85_C
ORDERING INFORMATION−TSSOP-16
Part Number
Si9145BQ-T1
Si9145BQ-T1—E3
Temperature Range
−25_
25_ to 85_C
PIN DESCRIPTION
Pin 1: VDD
voltage at DMAX/SS between 1.0 V and 1.5 V, the maximum
duty cycle is proportionally limited to this voltage.
The positive power supply for all functional blocks except
output driver. A bypass capacitor of 0.1 mF (minimum) is
recommended.
The addition of external components can implement a soft
start function.
Pin 4: COMP
Pin 2: MODE SELECT
This pin is used to enable maximum duty cycle limit and set
output polarity of controller. When connected to VDD, the
maximum duty cycle function is controlled by the DMAX/SS pin.
The maximum duty cycle limit is usually used for forward,
flyback, and boost converters. The output polarity is high when
the PWM circuitry requires the external device to be turned on.
When connected to GND, the maximum duty cycle is not
limited (usually for buck converters driving a p-channel MOS).
The output polarity is low when the PWM circuitry requires the
external PMOS to be turned on.
Pin 3: DMAX/SS
DMAX/SS pin controls the maximum duty cycle achievable by
the PWM circuitry when the MODE SELECT = VDD.
When DMAX/SS is at less than 1.0 V (typical) the OUTPUT is
held low (0% duty cycle). When DMAX/SS is at more than 1.5 V
(typical), the PWM circuitry can achieve 100% duty cycle. With
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This pin is the output of the error amplifier. A compensation
network is connected from this pin to the FB pin to stabilize the
system. This pin drives one input of the internal pulse width
modulation comparator.
Pin 5: FB
The inverting input of the error amplifier. External resistors are
connected to this pin to set the regulated output voltage. The
compensation network is also connected to this pin.
Pin 6: NI
The non-inverting input of the error amplifier. In normal
operation it is externally connected to the VREF pin.
Pin 7: VREF
This pin supplies 1.5 V trimmed to "1.5%. The reference
voltage is generated by a band-gap reference.
Pin 8: GND
Negative return for VDD.
Document Number: 70021
S-40710—Rev. K, 19-Apr-04
Si9145
Vishay Siliconix
Pin 9: ROSC
Pin 12: ENABLE
This pin is the equivalent of a 1.0-V voltage source derived
from the on-chip VREF . When a low T.C. resistor is externally
connected from this pin to GND, a temperature independent
current is generated internally. This current is used as the
charging current source connected to the COSC pin. The
current is internally multiplied by 2 and is used as the
discharging current source connected to the COSC pin.
Therefore, the external resistor is one of the factors that
determine the oscillator frequency.
A logic high on this pin allows normal operation. A logic low
places the chip in the standby mode. In standby mode normal
operation is disabled, supply current is reduced, the oscillator
stops and the output is held high for MODE SELECT = low, and
low for MODE SELECT = high.
Pin 10: COSC
An external capacitor is connected to this pin to set the
oscillator frequency. Internal current sources alternately
charge and discharge the external capacitor. The oscillator
waveform is a symmetrical triangular type with a typical voltage
swing between 1.0 V and 1.5 V.
fOSC ] R
0.7
OSC < C OSC
Pin 11: OTS
This pin indicates an over-temperature condition on the device
when the output is low. The output is latched low and is reset
with the ENABLE pin going low then high, or by turning power
off and on.
Document Number: 70021
S-40710—Rev. K, 19-Apr-04
Pin 13: UVLOSET
This pin will place the chip in the standby mode if the UVLOSET
voltage drops below 1.2 V. Once the UVLOSET voltage
exceeds 1.2 V, the chip operates normally. There is a built-in
hysteresis of 200 mV.
Pin 14: PGND
The negative return for the VS supply.
Pin 15: OUTPUT
This CMOS push-pull output pin drives the external MOSFET
and is capable of sinking 150 mA or sourcing 130 mA with VS
equal to 2.7 V.
Pin 16: VS
The positive terminal of the power supply which powers the
CMOS output driver. A bypass capacitor is required.
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Si9145
Vishay Siliconix
APPLICATIONS
L1
D1
VOUT
VDD
Q1
C1
C2
Si9145
2.7 V − 7 V
0V
Figure 3.
Non-Isolated Step Up Boost Converter for VOUT > VIN
L1
Q1
VDD
VOUT
C1
C2
Si9145
2.7 V − 7 V
D1
0V
Figure 4.
VDD
Non-Isolated Step Down Buck Converter for VOUT < VIN
Q1
C1
2.7 V − 7 V
L1
Si9145
VOUT
Q2
C2
0V
Figure 5.
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Non-Isolated Synchronous Buck Converter for VOUT < VIN
Document Number: 70021
S-40710—Rev. K, 19-Apr-04