SEMICONDUCTOR TECHNICAL DATA The MC10175 is a high speed, low power quint latch. It features five D type latches with common reset and a common two–input clock. Data is transferred on the negative edge of the clock and latched on the positive edge. The two clock inputs are “OR”ed together. Any change on the data input will be reflected at the outputs while the clock is low. The outputs are latched on the positive transition of the clock. While the clock is in the high state, a change in the information present at the data inputs will not affect the output information. The reset input is enabled only when the clock is in the high state. L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 PD = 400 mW typ/pkg (No Load) tpd = 2.5 ns typ (Data to Output) tr, tf = 2.0 ns typ (20%–80%) FN SUFFIX PLCC CASE 775–02 LOGIC DIAGRAM D0 10 D Q 14 Q0 C R D1 12 DIP PIN ASSIGNMENT D Q 15 Q1 C R D2 13 D Q 2 Q2 C R D3 9 D Q 3 D Q 4 Q4 C R VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 D C0 C1 Reset Qn+1 L H X X X X L L H X H X L L X H X H X X L L H H L H Qn Qn L L 3/93 3–126 16 VCC2 Q2 2 15 Q1 Q3 3 14 Q0 Q4 4 13 D2 D4 5 12 D1 C0 6 11 RESET C1 7 10 D0 VEE 8 9 D3 Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). TRUTH TABLE Motorola, Inc. 1996 1 Q3 C R D4 5 C0 6 C1 7 RESET 11 VCC1 REV 5 MC10175 ELECTRICAL CHARACTERISTICS Test Limits Characteristic Power Supply Drain Current Input Current Symbol Pin Pi Under Test IE 8 107 IinH 6 7 10 11 460 460 460 1000 –30°C Min +25°C Max Min +85°C Max Unit 97 107 mAdc 290 290 290 650 290 290 290 650 µAdc Typ Max 78 µAdc IinL All 0.5 Output Voltage Logic 1 VOH 14 15 –1.060 –1.060 –0.890 –0.890 –0.960 –0.960 –0.810 –0.810 –0.890 –0.890 –0.700 –0.700 Vdc Output Voltage Logic 0 VOL 14 15 –1.890 –1.890 –1.675 –1.675 –1.850 –1.850 –1.650 –1.650 –1.825 –1.825 –1.615 –1.615 Vdc Threshold Voltage Logic 1 VOHA 14 15 –1.080 –1.080 Threshold Voltage Logic 0 VOLA 14 15 Data Input t10+14+ t10–14– 14 14 1.0 1.0 3.6 3.6 1.0 1.0 3.5 3.5 1.0 1.0 3.6 3.6 Clock Input t6–14+ t6–14– 14 14 1.0 1.0 4.7 4.7 1.0 1.0 4.3 4.3 1.0 1.0 4.4 4.4 Reset Input t11+4– t11+14– 4 14 1.0 1.0 4.0 4.0 1.0 1.0 3.9 3.9 1.0 1.0 4.2 4.2 tsetup thold 14 14 2.5 1.5 Switching Times 0.5 Min 0.3 –0.980 –0.980 –1.655 –1.655 –0.910 –0.910 –1.630 –1.630 Vdc –1.595 –1.595 (50Ω Load) Setup TIme Hold Time Vdc ns 2.5 1.5 2.5 1.5 Rise Time (20 to 80%) t+ 14 1.0 3.6 1.1 3.5 1.1 3.7 Fall Time (20 to 80%) t– 14 1.0 3.6 1.1 3.5 1.1 3.7 1. Individually test each input; apply VILmin to pin under test. 2. Output latched to high logic state prior to test. MECL Data DL122 — Rev 6 3–127 MOTOROLA MC10175 ELECTRICAL CHARACTERISTICS (continued) TEST VOLTAGE VALUES (Volts) Characteristic Power Supply Drain Current Input Current @ Test Temperature VIHmax VILmin VIHAmin VILAmax VEE –30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2 Symbol Pin Under Test IE 8 IinH 6 7 10 11 IinL All TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHmax VEE (VCC) Gnd 8 1, 16 8 8 8 8 1, 16 1, 16 1, 16 1, 16 Note 1. 8 1, 16 6 6 8 8 1, 16 1, 16 8 8 1, 16 1, 16 8 8 1, 16 1, 16 10 12 8 8 1, 16 1, 16 VILmin Logic 1 VOH 14 15 Output Voltage Logic 0 VOL 14 15 6, 10 6, 12 Threshold Voltage Logic 1 VOHA 14 15 6 6 Threshold Voltage Logic 0 VOLA 14 15 6 6 (50Ω Load) VILAmax 6 7 10 11 Output Voltage Switching Times VIHAmin 10 12 +1.11V 10 12 +0.31V Pulse In Pulse Out –3.2 V +2.0 V Data Input t10+14+ t10–14– 14 14 6, 7 6, 7 10 10 14 14 8 8 1, 16 1, 16 Clock Input t6–14+ t6–14– 14 14 7 7 10, 6 10, 6 14 14 8 8 1, 16 1, 16 Reset Input t11+4– t11+14– 4 14 6 6 7, 11 7, 11 4 (2.) 14 (2.) 8 8 1, 16 1, 16 tsetup thold 14 14 7 7 6, 10 6, 10 14 14 8 8 1, 16 1, 16 Setup TIme Hold Time 5 10 Rise Time (20 to 80%) t+ 14 6, 7 10 14 8 1, 16 Fall Time (20 to 80%) t– 14 6, 7 10 14 8 1, 16 1. Individually test each input; apply VILmin to pin under test. 2. Output latched to high logic state prior to test. Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner. MOTOROLA 3–128 MECL Data DL122 — Rev 6 MC10175 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 775–02 ISSUE C 0.007 (0.180) M T L–M B Y BRK –N– U N S 0.007 (0.180) M T L–M S S N S D –L– –M– Z W 20 D 1 V 0.010 (0.250) G1 X S T L–M S N S VIEW D–D A 0.007 (0.180) M T L–M S N S R 0.007 (0.180) M T L–M S N S Z C H –T– SEATING PLANE F VIEW S G1 0.010 (0.250) S T L–M S 0.007 (0.180) M T L–M S N S VIEW S S N S NOTES: 1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM –T–, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). MECL Data DL122 — Rev 6 N K 0.004 (0.100) J S K1 E G 0.007 (0.180) M T L–M 3–129 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 ––– 0.025 ––– 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 ––– 0.020 2_ 10 _ 0.310 0.330 0.040 ––– MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 ––– 0.64 ––– 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 ––– 0.50 2_ 10 _ 7.88 8.38 1.02 ––– MOTOROLA MC10175 OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620–10 ISSUE V –A– 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. –B– C L DIM A B C D E F G H K L M N –T– K N SEATING PLANE M E F J G D 16 PL 0.25 (0.010) 16 PL 0.25 (0.010) M T A T B M –A– 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 ––– 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 S P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R 16 S INCHES MIN MAX 0.750 0.785 0.240 0.295 ––– 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 T A M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 Mfax: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ MOTOROLA 3–130 *MC10175/D* MC10175/D MECL Data DL122 — Rev 6