SEMICONDUCTOR TECHNICAL DATA The MC10178 is a four–bit counter capable of divide–by–two, divide–by–four, divide–by–eight or a divide–by–sixteen function. Clock inputs trigger on the positive going edge of the clock pulse. Set and Reset inputs override the clock, allowing asynchronous “set” or “clear.” Indiv idual S et an d c o m m o n R e s et i n p u ts a r e prov i ded, as w el l as complementary outputs for the first and fourth bits. True outputs are available at all bits. L SUFFIX CERAMIC PACKAGE CASE 620–10 PD = 370 mW typ/pkg (No Load) ftoggle = 150 MHz (typ) tr, tf = 2.7 ns typ (20%–80%) P SUFFIX PLASTIC PACKAGE CASE 648–08 LOGIC DIAGRAM S0 Q0 11 12 Clock 1 Clock 2 10 S1 15 D1 S Q’ C1 Q’ C2 Q1 7 S2 13 D1 S Q’ C1 Q’ Q R Q Q2 6 4 D1 S Q’ C1 Q’ Q S3 FN SUFFIX PLCC CASE 775–02 Q3 5 2 D1 S Q’ C1 Q DIP PIN ASSIGNMENT Q R R Q R 9 Reset 14 3 Q0 TRUTH TABLE OUTPUTS R S0 S1 S2 S3 C1 C2 Q0 Q1 Q2 Q3 H L L H L H L H L H X X X X L H L H L H L H L L L L L L L L L L H X X H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L VIH ** VIL ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** No Count No Count L H L H L H L H L H L H L H L H L L H H L L H H L L H H L L H H L L L L H H H H L L L L H H H H L L L L L L L L H H H H H H H H Clock transition from VIL to VIH may be applied to C1 or C2 or both for same effect. 3–136 16 VCC2 Q3 2 15 Q0 Q3 3 14 Q0 Q2 4 13 Q1 S3 5 12 CLOCK 1 S2 6 11 S0 S1 7 10 CLOCK 2 VEE 8 9 RESET Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). 3/93 Motorola, Inc. 1996 1 Q3 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 INPUTS VCC1 REV 5 MC10178 ELECTRICAL CHARACTERISTICS Test Limits Characteristic Power Supply Drain Current Input Current Symbol Pin Pi Under Test IE 8 97 IinH 12 11 9 390 350 650 IinL * 0.5 –30°C Min +25°C Max Min Typ +85°C Max Unit 88 97 mAdc 245 220 410 245 220 410 µAdc Max 0.5 Min µAdc 0.3 Output Voltage Logic 1 VOH 14 15 –1.060 –1.060 –0.890 –0.890 –0.960 –0.960 –0.810 –0.810 –0.890 –0.890 –0.700 –0.700 Vdc Output Voltage Logic 0 VOL 14 15 –1.890 –1.890 –1.675 –1.675 –1.850 –1.850 –1.650 –1.650 –1.825 –1.825 –1.615 –1.615 Vdc Threshold Voltage Logic 1 VOHA 3 14 15 –1.080 –1.080 –1.080 Threshold Voltage Logic 0 VOLA 3 14 15 –0.980 –0.980 –0.980 –0.910 –0.910 –0.910 –1.655 –1.655 –1.655 –1.630 –1.630 –1.630 Vdc –1.595 –1.595 –1.595 Switching Times (50Ω Load) Propagation Delay Clock Input t12+15+ t12–13– t12+4– t12–3+ 15 13 4 3 1.4 1.9 2.9 3.9 5.0 9.4 12.3 14.9 1.5 2.0 3.0 4.0 3.5 6.0 8.5 11.0 4.8 9.2 12.0 14.5 1.5 2.0 3.0 4.0 5.3 9.8 12.8 15.5 Rise Time (20 to 80%) t15+ 15 1.1 4.7 1.1 2.5 4.5 1.1 5.0 Fall Time (20 to 80%) t15– 15 1.1 4.7 1.1 2.5 4.5 1.1 5.0 t11–15+ t9–15+ 15 15 1.4 1.4 5.2 5.2 1.5 1.5 5.0 5.0 1.5 1.5 5.5 5.5 Set Input Reset Input ns Counting Frequency fcount 15 125 * Individually test each input applying VIL to input under test. MECL Data DL122 — Rev 6 Vdc 125 3–137 150 125 MHz MOTOROLA MC10178 ELECTRICAL CHARACTERISTICS (continued) TEST VOLTAGE VALUES (Volts) Characteristic Power Supply Drain Current Input Current @ Test Temperature VIHmax VILmin VIHAmin VILAmax VEE –30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2 Symbol Pin Under Test VIHmax IE 8 IinH 12 11 9 TEST VOLTAGE APPLIED TO PINS LISTED BELOW VEE (VCC) Gnd 9 8 1, 16 12 11 9 8 8 8 1, 16 1, 16 1, 16 VILmin VIHAmin VILAmax IinL * 8 1, 16 Output Voltage Logic 1 VOH 14 15 9 11 8 8 1, 16 1, 16 Output Voltage Logic 0 VOL 14 15 11 9 8 8 1, 16 1, 16 Threshold Voltage Logic 1 VOHA 3 14 15 8 8 8 1, 16 1, 16 1, 16 Threshold Voltage Logic 0 VOLA 3 14 15 5 11 9 8 8 8 1, 16 1, 16 1, 16 Pulse In Pulse Out –3.2 V +2.0 V Switching Times Propagation Delay * 5 11 9 (50Ω Load) Data Input t12+15+ t12–13– t12+4– t12–3+ 15 13 4 3 12 12 12 12 15 13 4 3 8 8 8 8 1, 16 1, 16 1, 16 1, 16 Rise Time (20 to 80%) t+ 15 12 15 8 1, 16 Fall Time (20 to 80%) t– 15 12 15 8 1, 16 t11–15+ t9–15+ 15 15 11 9 15 15 8 8 1, 16 1, 16 Counting Frequency fcount 15 * Individually test each input applying VIL to input under test. 12 15 8 1, 16 Set Input Reset Input Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner. MOTOROLA 3–138 MECL Data DL122 — Rev 6 MC10178 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 775–02 ISSUE C 0.007 (0.180) M T L–M B Y BRK –N– U N S 0.007 (0.180) M T L–M S S N S D –L– –M– Z W 20 D 1 V 0.010 (0.250) G1 X S T L–M S N S VIEW D–D A 0.007 (0.180) M T L–M S N S R 0.007 (0.180) M T L–M S N S Z C H –T– SEATING PLANE F VIEW S G1 0.010 (0.250) S T L–M S 0.007 (0.180) M T L–M S N S VIEW S S N S NOTES: 1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM –T–, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). MECL Data DL122 — Rev 6 N K 0.004 (0.100) J S K1 E G 0.007 (0.180) M T L–M 3–139 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 ––– 0.025 ––– 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 ––– 0.020 2_ 10 _ 0.310 0.330 0.040 ––– MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 ––– 0.64 ––– 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 ––– 0.50 2_ 10 _ 7.88 8.38 1.02 ––– MOTOROLA MC10178 OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620–10 ISSUE V –A– 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. –B– C L DIM A B C D E F G H K L M N –T– K N SEATING PLANE M E F J G D 16 PL 0.25 (0.010) 16 PL 0.25 (0.010) M T A T B M –A– 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 ––– 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 S P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R 16 S INCHES MIN MAX 0.750 0.785 0.240 0.295 ––– 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 T A M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 Mfax: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ MOTOROLA 3–140 *MC10178/D* MC10178/D MECL Data DL122 — Rev 6