MC14513B BCD−To−Seven Segment Latch/Decoder/Driver CMOS MSI (Low−Power Complementary MOS) The MC14513B BCD−to−seven segment latch/decoder/driver is constructed with complementary MOS (CMOS) enhancement mode devices and NPN bipolar output drivers in a single monolithic structure. The circuit provides the functions of a 4−bit storage latch, an 8421 BCD−to−seven segment decoder, and has output drive capability. Lamp test (LT), blanking (BI), and latch enable (LE) inputs are used to test the display, to turn−off or pulse modulate the brightness of the display, and to store a BCD code, respectively. The Ripple Blanking Input (RBI) and Ripple Blanking Output (RBO) can be used to suppress either leading or trailing zeroes. It can be used with seven−segment light emitting diodes (LED), incandescent, fluorescent, gas discharge, or liquid crystal readouts either directly or indirectly. Applications include instrument (e.g., counter, DVM, etc.) display driver, computer/calculator display driver, cockpit display driver, and various clock, watch, and timer uses. http://onsemi.com PDIP−18 P SUFFIX CASE 707 1 MARKING DIAGRAM 18 Features • • • • • • • • • • • • Low Logic Circuit Power Dissipation High−Current Sourcing Outputs (Up to 25 mA) Latch Storage of Binary Input Blanking Input Lamp Test Provision Readout Blanking on all Illegal Input Combinations Lamp Intensity Modulation Capability Time Share (Multiplexing) Capability Adds Ripple Blanking In, Ripple Blanking Out to MC14511B Supply Voltage Range = 3.0 V to 18 V Capable of Driving Two Low−Power TTL Loads, One Low−Power Schottky TTL Load to Two HTL Loads Over the Rated Temperature Range Pb−Free Package is Available* MAXIMUM RATINGS (Voltages Referenced to VSS) Parameter Symbol Value Unit DC Supply Voltage Range VDD −0.5 to +18.0 V Input Voltage Range, All Inputs Vin −0.5 to VDD +0.5 V DC Current Drain per Input Pin I 10 mA Power Dissipation per Package (Note 1) PD 500 mW Operating Temperature Range TA −55 to +125 °C Tstg −65 to +150 °C Maximum Continuous Output Drive Current (Source) per Output IOHmax 25 mA Maximum Continuous Output Power (Source) per Output (Note 2) POHmax 50 mW Storage Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C 2. POHmax = IOH (VDD − VOH) © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 6 1 MC14513BCP AWLYYWWG 1 A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package ORDERING INFORMATION Device Package Shipping MC14513BCP PDIP−18 20 Units/Rail MC14513BCPG PDIP−18 (Pb−Free) 20 Units/Rail This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high−impedance circuit. A destructive high current mode may occur if Vin and Vout are not constrained to the range VSS v (Vin or Vout) v VDD. Due to the sourcing capability of this circuit, damage can occur to the device if VDD is applied, and the outputs are shorted to VSS and are at a logical 1 (See Maximum Ratings). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Publication Order Number: MC14513B/D MC14513B PIN ASSIGNMENT B 1 18 VDD C 2 17 f LT 3 16 g BI 4 15 a LE 5 14 b D 6 13 c A 7 12 d RBI VSS 8 11 e 9 10 RBO a f g e b c d DISPLAY 0 1 2 3 4 5 6 7 8 9 TRUTH TABLE Inputs RBI X X 1 0 X X X X X X X X X X X X X X X X LE BI X X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 X 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Outputs LT D C B A RBO a b c d e f g Display 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X X 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 X 1 0 0 1 0 0 0 1 1 1 0 1 1 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 1 0 1 1 0 0 0 0 0 0 8 Blank Blank 0 1 2 3 4 5 6 7 8 9 Blank Blank Blank Blank Blank Blank * X X 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 X X X 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X X X 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X + + 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 † 1 0 0 1 0 1 1 0 1 1 1 1 1 0 0 0 0 0 0 1 0 0 1 1 1 1 1 0 0 1 1 1 0 0 0 0 0 0 1 0 0 1 1 0 1 1 1 1 1 1 1 0 0 0 0 0 0 1 0 0 1 0 1 1 0 1 1 0 1 1 0 0 0 0 0 0 * 1 0 0 1 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 X = Don’t Care †RBO = RBI (D C B A), indicated by other rows of table *Depends upon the BCD code previously applied when LE = 0 http://onsemi.com 2 MC14513B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) − 55_C 25_C VDD Characteristic Symbol Output Voltage — Segment Outputs “0” Level Vin = VDD or 0 VOL “1” Level Vin = 0 or VDD Output Voltage — RBO Output “0” Level Vin = VDD or 0 “1” Level Vin = 0 or VDD Input Voltage (Note 3) “0” Level (VO = 3.8 or 0.5 Vdc) (VO = 8.8 or 1.0 Vdc) (VO = 13.8 or 1.5 Vdc) (VO = 0.5 or 3.8 Vdc) “1” Level (VO = 1.0 or 8.8 Vdc) (VO = 1.5 or 13.8 Vdc) Output Drive Voltage — Segments (IOH = 0 mA) Source (IOH = 5.0 mA) (IOH = 10 mA) (IOH = 15 mA) (IOH = 20 mA) (IOH = 25 mA) (IOH = 0 mA) (IOH = 5.0 mA) (IOH = 10 mA) (IOH = 15 mA) (IOH = 20 mA) (IOH = 25 mA) (IOH = 0 mA) (IOH = 5.0 mA) (IOH = 10 mA) (IOH = 15 mA) (IOH = 20 mA) (IOH = 25 mA) VOH 125_C Vdc Min Max Min Typ (Note 3) 5.0 10 15 − − − 0.05 0.05 0.05 − − − 0 0 0 0.05 0.05 0.05 − − − 0.05 0.05 0.05 5.0 10 15 4.1 9.1 14.1 − − − 4.1 9.1 14.1 5.0 10 15 − − − 4.1 9.1 14.1 − − − 5.0 10 15 − − − 0.05 0.05 0.05 − − − 0 0 0 0.05 0.05 0.05 − − − 0.05 0.05 0.05 5.0 10 15 4.95 9.95 14.95 − − − 4.95 9.95 14.95 5.0 10 15 − − − 4.95 9.95 14.95 − − − 5.0 10 15 − − − 1.5 3.0 4.0 − − − 2.25 4.50 6.75 1.5 3.0 4.0 − − − 1.5 3.0 4.0 5.0 10 15 3.5 7.0 11 − − − 3.5 7.0 11 2.75 5.50 8.25 − − − 3.5 7.0 11 − − − 5.0 4.1 − 3.9 − 3.4 − − − − − − − 4.1 − 3.9 − 3.4 − 4.57 4.24 4.12 3.94 3.70 3.54 − − − − − − 4.1 − 3.5 − 3.0 − − − − − − − 10 9.1 − 9.0 − 8.6 − − − − − − − 9.1 − 9.0 − 8.6 − 9.58 9.26 9.17 9.04 8.90 8.75 − − − − − − 9.1 − 8.6 − 8.2 − − − − − − − Vdc 15 14.1 − 14 − 13.6 − − − − − − − 14.1 − 14 − 13.6 − 14.59 14.27 14.18 14.07 13.95 13.80 − − − − − − 14.1 − 13.6 − 13.2 − − − − − − − Vdc Max Min Max Vdc VOL VOH Vdc Vdc VIL VIH Unit Vdc Vdc VOH Vdc Vdc 3. Noise immunity specified for worst−case input combination. Noise Margin for both “1” and “0” level = 1.0 Vdc min @ VDD = 5.0 Vdc 2.0 Vdc min @ VDD = 10 Vdc 2.5 Vdc min @ VDD = 15 Vdc http://onsemi.com 3 MC14513B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (continued) (Voltages Referenced to VSS) – 55_C 25_C 125_C VDD Vdc Min Max Min Typ (Note 4) 5.0 10 15 – 0.40 – 0.21 – 0.81 − − − – 0.32 – 0.17 – 0.66 – 0.64 – 0.34 – 1.30 − − − – 0.22 – 0.12 – 0.46 − − − 5.0 10 15 0.18 0.47 1.80 − − − 0.15 0.38 1.50 0.29 0.75 2.90 − − − 0.10 0.26 1.0 − − − 5.0 10 15 0.64 1.6 4.2 − − − 0.51 1.3 3.4 0.88 2.25 8.8 − − − 0.36 0.9 2.4 − − − Iin 15 − ± 0.1 − ± 0.00001 ± 0.1 − ± 1.0 mAdc Input Capacitance Cin − − − − 5.0 7.5 − − pF Quiescent Current (Per Package) Vin = 0 or VDD, Iout = 0 mA IDD 5.0 10 15 − − − 5.0 10 20 − − − 0.005 0.010 0.015 5.0 10 20 − − − 150 300 600 mAdc Total Supply Current (Note 5, 6) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) IT 5.0 10 15 Characteristic Symbol Output Drive Current — RBO Output (VOH = 2.5 V) Source (VOH = 9.5 V) (VOH = 13.5 V) (VOL = 0.4 V) Sink (VOL = 0.5 V) (VOL = 1.5 V) IOH Output Drive Current — Segments (VOL = 0.4 V) Sink (VOL = 0.5 V) (VOL = 1.5 V) IOL Input Current IOL Max Min Max Unit mAdc mAdc mAdc IT = (1.9 mA/kHz) f + IDD IT = (3.8 mA/kHz) f + IDD IT = (5.7 mA/kHz) f + IDD mAdc 4. Noise immunity specified for worst−case input combination. Noise Margin for both “1” and “0” level = 1.0 Vdc min @ VDD = 5.0 Vdc 2.0 Vdc min @ VDD = 10 Vdc 2.5 Vdc min @ VDD = 15 Vdc 5. The formulas given are for the typical characteristics only at 25_C. 6. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + 3.5 x 10−3 (CL − 50) VDDf where: IT is in mA (per package), CL in pF, VDD in Vdc, and f in kHz is input frequency. Input LE and RBI low, and Inputs D, BI and LT high. f in respect to a system clock. All outputs connected to respective CL loads. 20 ns 20 ns A, B, AND C 90% 50% 1 2f VDD 10% 50% DUTY CYCLE ANY OUTPUT VSS VOH 50% VOL Figure 1. Dynamic Power Dissipation Signal Waveforms http://onsemi.com 4 MC14513B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SWITCHING CHARACTERISTICS (Note 7) (CL = 50 pF, TA = 25_C) All Types VDD Vdc Min Typ Max 5.0 10 15 − − − 40 30 25 80 60 50 5.0 10 15 − − − 480 240 190 960 480 380 5.0 10 15 − − − 125 75 65 250 150 130 5.0 10 15 − − − 270 135 110 540 270 220 5.0 10 15 − − − 640 250 175 1280 500 350 5.0 10 15 − − − 720 290 200 1440 580 400 5.0 10 15 − − − 600 200 150 750 300 220 5.0 10 15 − − − 485 200 160 970 400 320 5.0 10 15 − − − 313 125 90 625 250 180 tPHL 5.0 10 15 − − − 313 125 90 625 250 180 ns Setup Time tsu 5.0 10 15 100 40 30 − − − − − − ns Hold Time th 5.0 10 15 60 40 30 − − − − − − ns tWL(LE) 5.0 10 15 520 220 130 260 110 65 − − − ns Characteristic Symbol Output Rise Time — Segment Outputs tTLH Output Rise Time — RBO Output ns tTLH Output Fall Time — Segment Outputs (Note 7) tTHL = (1.5 ns/pF) CL + 50 ns tTHL = (0.75 ns/pF) CL + 37.5 ns tTHL = (0.55 ns/pF) CL + 37.5 ns tTHL Output Fall Time — RBO Outputs tTHL = (3.25 ns/pF) CL + 107.5 ns tTHL = (1.35 ns/pF) CL + 67.5 ns tTHL = (0.95 ns/pF) CL + 62.5 ns tTHL Propagation Delay Time — A, B, C, D Inputs (Note 7) tPLH = (0.40 ns/pF) CL + 620 ns tPLH = (0.25 ns/pF) CL + 237.5 ns tPLH = (0.20 ns/pF) CL + 165 ns tPHL = (1.3 ns/pF) CL + 655 ns tPHL = (0.60 ns/pF) CL + 260 ns tPHL = (0.35 ns/pF) CL + 182.5 ns tPLH Propagation Delay Time — RBI and BI Inputs (Note 7) tPLH = (1.05 ns/pF) CL + 547.5 ns tPLH = (0.45 ns/pF) CL + 177.5 ns tPLH = (0.30 ns/pF) CL + 135 ns tPHL = (0.85 ns/pF) CL + 442.5 ns tPHL = (0.45 ns/pF) CL + 177.5 ns tPHL = (0.35 ns/pF) CL + 142.5 ns tPLH Propagation Delay Time — LT Input (Note 7) tPLH = (0.45 ns/pF) CL + 290.5 ns tPLH = (0.25 ns/pF) CL + 112.5 ns tPLH = (0.20 ns/pF) CL + 80 ns tPHL = (1.3 ns/pF) CL + 248 ns tPHL = (0.45 ns/pF) CL + 102.5 ns tPHL = (0.35 ns/pF) CL + 72.5 ns tPLH ns ns ns ns tPHL ns ns tPHL Latch Enable Pulse Width Unit ns ns 7. The formulas given are for the typical characteristics only. http://onsemi.com 5 MC14513B 20 ns VDD 20 ns 90% 50% 10% INPUT C VSS tPHL tPLH VOH OUTPUT g VOL tTHL tTLH a. Data Propagation Delay: Inputs RBI, D and LE low, and Inputs A, B, BI and LT high. 20 ns 20 ns VDD 90% 50% 10% INPUT C tPLH VSS tPHL VOH 90% OUTPUT RBO 50% 10% tTLH VOL tTHL b. Inputs A, B, D and LE low, and Inputs RBI, BI and LT high. 20 ns VDD 90% 50% LE 10% th tsu INPUT C VSS VDD 50% VSS VOH OUTPUT g VOL c. Setup and Hold Times: Input RBI and D low, Inputs A, B, BI and LT high. 20 ns 20 ns 90% 50% LE VDD 10% VSS tWL(LE) d. Pulse Width: Data DCBA strobed into latches. Figure 2. Dynamic Signal Waveforms http://onsemi.com 6 MC14513B CONNECTIONS TO VARIOUS DISPLAY READOUTS LIGHT EMITTING DIODE (LED) READOUT VDD VDD COMMON ANODE LED COMMON CATHODE LED ≈ 1.7 V ≈ 1.7 V VSS VSS INCANDESCENT READOUT VDD FLUORESCENT READOUT VDD VDD ** DIRECT (LOW BRIGHTNESS) FILAMENT (SUPPLY) VSS VSS GAS DISCHARGE READOUT VDD VSS OR APPROPRIATE VOLTAGE BELOW VSS. LIQUID CRYSTAL (LC) READOUT APPROPRIATE VOLTAGE EXCITATION (SQUARE WAVE, VSS TO VDD) VDD 1/4 OF MC14070B VSS VSS ** A filament pre−warm resistor is recommended to reduce filament thermal shock and increase the effective cold resistance of the filament. Direct dc drive of LC’s not recommended for life of LC readouts. http://onsemi.com 7 MC14513B LOGIC DIAGRAM BI4 15a A7 14b 13c B1 12d 11e 17f C2 16g LT30 D6 10RBO RBI8 LE5 http://onsemi.com 8 MC14513B TYPICAL APPLICATIONS FOR RIPPLE BLANKING LEADING EDGE ZERO SUPPRESSION DISPLAYS a −− − −− g CONNECT TO RBI VDD (1) D C a −− − −− g RBO B A 1 RBI D C 0 0 0 B A RBI D C 1 MC14513B MC14513B INPUT CODE a−− − −− g RBO 0 0 0 0 B A 0 0 0 1 0 a−− − −− g RBO RBI D C MC14513B (0) (0) a−− − −− g RBO B 0 A D C MC14513B 1 0 0 (5) 0 a−− − − −g RBO RBI B 0 A D C MC14513B 0 0 0 (0) 0 RBO RBI B A 0 MC14513B 1 0 0 (1) 1 1 (3) TRAILING EDGE ZERO SUPPRESSION DISPLAYS 0 a−− − −− g RBO D C RBI B A a −− − −− g 0 1 0 (5) B A 0 1 0 0 0 (0) a −− − −− g RBI RBO D C MC14513B MC14513B 0 a −− − −−g RBI RBO D C B A 0 RBO D C MC14513B 0 0 0 0 a −− − −−g RBO RBI B A 1 D C MC14513B 1 0 (1) 0 1 B A 1 http://onsemi.com 0 0 0 (0) CONNECT TO RBI D C MC14513B 1 (3) 9 a −− − −−g RBO RBI B A VDD (1) MC14513B 0 0 0 0 (0) 0 INPUT CODE MC14513B PACKAGE DIMENSIONS PDIP−18 CASE 707−02 ISSUE D NOTES: 1. POSITIONAL TOLERANCE OF LEADS (D), SHALL BE WITHIN 0.25 mm (0.010) AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. CONTROLLING DIMENSION: INCH. J 18 10 1 9 B L M A DIM A B C D F G H J K L M N C N F H D G K SEATING PLANE INCHES MIN MAX 0.875 0.915 0.240 0.260 0.140 0.180 0.014 0.022 0.050 0.070 0.100 BSC 0.040 0.060 0.008 0.012 0.115 0.135 0.300 BSC 0_ 15_ 0.020 0.040 MILLIMETERS MIN MAX 22.22 23.24 6.10 6.60 3.56 4.57 0.36 0.56 1.27 1.78 2.54 BSC 1.02 1.52 0.20 0.30 2.92 3.43 7.62 BSC 0_ 15 _ 0.51 1.02 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 10 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC14513B/D