Order this document by SG3526/D The SG3526 is a high performance pulse width modulator integrated circuit intended for fixed frequency switching regulators and other power control applications. Functions included in this IC are a temperature compensated voltage reference, sawtooth oscillator, error amplifier, pulse width modulator, pulse metering and steering logic, and two high current totem pole outputs ideally suited for driving the capacitance of power FETs at high speeds. Additional protective features include soft start and undervoltage lockout, digital current limiting, double pulse inhibit, adjustable dead time and a data latch for single pulse metering. All digital control ports are TTL and B–series CMOS compatible. Active low logic design allows easy wired–OR connections for maximum flexibility. The versatility of this device enables implementation in single–ended or push–pull switching regulators that are transformerless or transformer coupled. The SG3526 is specified over a junction temperature range of 0° to +125°C. • 8.0 V to 35 V Operation • • • • • • • • • • PULSE WIDTH MODULATION CONTROL CIRCUIT SEMICONDUCTOR TECHNICAL DATA 18 5.0 V ±1% Trimmed Reference 1 1.0 Hz to 400 kHz Oscillator Range Dual Source/Sink Current Outputs: ±100 mA N SUFFIX PLASTIC PACKAGE CASE 707 Digital Current Limiting Programmable Dead Time Undervoltage Lockout Single Pulse Metering PIN CONNECTIONS Programmable Soft–Start Wide Current Limit Common Mode Range Guaranteed 6 Unit Synchronization +Error 1 18 Vref –Error 2 17 VCC Compensation 3 16 Output B CSoft–Start 4 15 Ground Reset 5 14 VC –CS 6 13 Output A +CS 7 12 Sync Shutdown 8 11 RDeadtime RT 9 10 CT Representative Block Diagram Vref VCC Ground Sync RDeadtime RT CT Reset CSoft–Start 18 17 Reference Regulator 15 12 +C.S. –C.S. Shutdown To Internal Circuitry 14 VC 11 9 Oscillator 10 13 Output A 5 4 Soft Start Memory F/F S 3 Compensation +Error –Error Under– Voltage Lockout VCC 1 2 7 6 + – + – Amp – + SQ D RQ Q Metering F/F 8 (Top View) Toggle F/F Q T Q ORDERING INFORMATION 16 Output B Device Operating Temperature Range Package SG3526N TJ = 0° to +125°C Plastic DIP Motorola, Inc. 1996 MOTOROLA ANALOG IC DEVICE DATA Rev 2 1 SG3526 MAXIMUM RATINGS (Note 1) Rating Symbol Value Unit VCC +40 Vdc VC +40 Vdc Logic Inputs –0.3 to +5.5 V Analog Inputs –0.3 to VCC V Supply Voltage Collector Supply Voltage Output Current, Source or Sink IO ±200 mA Reference Load Current (VCC = 40 V, Note 2) Iref 50 mA 15 mA Logic Sink Current Power Dissipation TA = +25°C (Note 3) TC = +25°C (Note 4) PD mW 1000 3000 Thermal Resistance Junction–to–Air RθJA 100 °C/W Thermal Resistance Junction–to–Case RθJC 42 °C/W TJ +150 °C Tstg –65 to +150 °C TSolder ±300 °C Operating Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10 Seconds) NOTES: 1. Values beyond which damage may occur. 2. Maximum junction temperature must be observed. 3. Derate at 10 mW/°C for ambient temperatures above +50°C. 4. Derate at 24 mW/°C for case temperatures above +25°C. RECOMMENDED OPERATING CONDITIONS Characteristics Supply Voltage Symbol Min Max Unit VCC 8.0 35 Vdc Collector Supply Voltage VC 4.5 35 Vdc Output Sink/Source Current (Each Output) IO 0 ±100 mA Reference Load Current Iref 0 20 mA Oscillator Frequency Range fosc 0.001 400 kHz Oscillator Timing Resistor RT 2.0 150 kΩ Oscillator Timing Capacitor CT 0.001 20 µF Available Deadtime Range (40 kHz) – 3.0 50 % Operating Junction Temperature Range TJ 0 +125 °C 2 MOTOROLA ANALOG IC DEVICE DATA SG3526 ELECTRICAL CHARACTERISTICS (VCC = +15 Vdc, TJ = Tlow to Thigh [Note 5], unless otherwise noted.) Symbol Min Typ Max Unit Reference Output Voltage (TJ = +25°C) Vref 4.90 5.00 5.10 V Line Regulation (+8.0 V ≤ VCC ≤ +35 V) Regline – 10 30 mV Load Regulation (0 mA ≤ IL ≤ 20 mA) Regload – 10 50 mV Temperature Stability ∆Vref/∆T – 10 – mV ∆Vref 4.85 5.00 5.15 V ISC 25 80 125 mA Reset Output Voltage (Vref = +3.8 V) – 0.2 0.4 V Reset Output Voltage (Vref = +4.8 V) 2.4 4.8 – V – ±3.0 ±8.0 % Characteristics REFERENCE SECTION (Note 6) Total Reference Output Voltage Variation (+8.0 V ≤ VCC ≤ +35 V, 0 mA ≤ IL ≤ 20 mA) Short Circuit Current (Vref = 0 V) (Note 2) UNDERVOLTAGE LOCKOUT OSCILLATOR SECTION (Note 7) Initial Accuracy (TJ = +25°C) Frequency Stability over Power Supply Range (+8.0 V ≤ VCC ≤ +35 V) ∆fosc ∆V CC – 0.5 1.0 % Frequency Stability over Temperature (∆TJ = Tlow to Thigh) ∆fosc ∆ TJ – 2.0 – % Minimum Frequency (RT = 150 kΩ, CT = 20 µF) fmin – 0.5 – Hz Maximum Frequency (RT = 2.0 kΩ, CT = 0.001 µF) fmax 400 – – kHz Sawtooth Peak Voltage (VCC = +35 V) Vosc(P) – 3.0 3.5 V Sawtooth Valley Voltage (VCC = +8.0 V) Vosc(V) 0.45 0.8 – V Input Offset Voltage (RS ≤ 2.0 kΩ) VIO – 2.0 10 mV Input Bias Current IIB – –350 –2000 nA Input Offset Current IIO – 35 200 nA DC Open Loop Gain (RL ≥ 10 MΩ) AVOL 60 72 – dB High Output Voltage (VPin 1–VPin 2 ≥ +150 mV, Isource = 100 µA) VOH 3.6 4.2 – V Low Output Voltage (VPin 2–VPin 1 ≥ +150 mV, Isink = 100 µA) VOL – 0.2 0.4 V Common Mode Rejection Ratio (RS ≤ 2.0 kΩ) CMRR 70 94 – dB Power Supply Rejection Ratio (+12 V ≤ VCC ≤ +18 V) PSRR 66 80 – dB ERROR AMPLIFIER SECTION (Note 8) NOTES: 2. Maximum junction temperature must be observed. 5. Tlow = 0°C Thigh = +125°C 6. IL = 0 mA unless otherwise noted. 7. fosc = 40 kHz (RT = 4.12 kΩ ± 1%, CT = 0.01 µF ± 1%, RD = 0 Ω) 8. 0 V ≤ VCM ≤ +5.2 V. MOTOROLA ANALOG IC DEVICE DATA 3 SG3526 ELECTRICAL CHARACTERISTICS (continued) Characteristics Symbol Min Typ Max Unit Minimum Duty Cycle (VCompensation = +0.4 V) DCmin – – 0 % Maximum Duty Cycle (VCompensation = +3.6 V) DCmax 45 49 – % VOH VOL 2.4 – 4.0 0.2 – 0.4 IIH IIL – – –125 –225 –200 –360 Vsense 80 100 120 mA IIB –3.0 –10 µA – 0.1 0.4 V 50 100 150 µA 12.5 12 13.5 13 – – – – 0.2 1.2 0.3 2.0 IC(leak) – 50 150 µA tr – 0.3 0.6 µs tf – 0.1 0.2 µs ICC – 18 30 mA PWM COMPARATOR SECTION (Note 7) DIGITAL PORTS (SYNC, SHUTDOWN, RESET) Output Voltage (High Logic Level) (Isource = 40 µA) (Low Logic Level) (Isink = 3.6 mA) Input Current High Logic Level (High Logic Level) (VIH = +2.4 V) (Low Logic Level) (VIL = +0.4 V) V µA CURRENT LIMIT COMPARATOR SECTION (Note 9) Sense Voltage (RS ≤ 50 Ω) Input Bias Current SOFT–START SECTION Error Clamp Voltage (Reset = +0.4 V) CSoft–Start Charging Current (Reset = +2.4 V) ICS OUTPUT DRIVERS (Each Output, VC = +15 Vdc, unless otherwise noted.) Output High Level Isource = 20 mA Isource = 100 mA VOH Output Low Level Isink = 20 mA Isink = 100 mA VOL Collector Leakage, VC = +40 V Rise Time (CL = 1000 pF) Fall Time (CL = 1000 pF) Supply Current (Shutdown = +0.4 V, VCC = +35 V, RT = 4.12 kΩ) V V NOTES: 7. fosc = 40 kHz (RT = 4.12 kΩ ± 1%, CT = 0.01 µF ± 1%, RD = 0 Ω) 8. 0 V ≤ VCM ≤ +5.2 V 9. 0 V ≤ VCM ≤ +12 V 4 MOTOROLA ANALOG IC DEVICE DATA SG3526 Figure 2. Reference Voltage as a Function Supply Voltage V ref , REFERENCE VOLTAGE (V) Figure 1. Reference Stability over Temperature 50 mV Spec Limit –75 –50 –25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 5.0 4.0 3.0 2.0 1.0 150 1.0 Figure 3. Error Amplifier Open Loop Frequency Response 2.0 3.0 4.0 5.0 10 20 30 40 VCC, SUPPLY VOLTAGE (V) Figure 4. Current Limit Comparator Threshold 8.0 SHUTDOWN VOLTAGE (V) 80 60 40 20 1 + _ 2 0 10 3 100 pF 100 CComp 1.0 k 10 k 100 k 1.0 M 4.0 3.0 2.0 25 50 75 100 125 150 175 200 f, FREQUENCY (Hz) DIFFERENTIAL INPUT VOLTAGE (mV) Figure 5. Undervoltage Lockout Characteristic Figure 6. Output Driver Saturation Voltage as a Function of Sink Current 7.0 RESET VOLTAGE (V) 5.0 0 10 M 8.0 6.0 5.0 4.0 3.0 2.0 1.0 0 0 6.0 1.0 1.0 2.0 3.0 4.0 5.0 6.0 Vref, REFERENCE VOLTAGE (V) MOTOROLA ANALOG IC DEVICE DATA 7.0 8.0 V sat , OUTPUT DRIVER SATURATION VOLTAGE (V) A Vol , VOLTAGE GAIN (dB) 7.0 2.5 2.0 1.5 1.0 0.5 0 2.0 5.0 10 20 50 100 200 OUTPUT DRIVER SINK CURRENT (mA) 5 SG3526 Figure 7. VC Saturation Voltage as a Function of Sink Current Figure 8. Oscillator Period 200 10 20 50 IC, SINK CURRENT (mA) 100 5.0 2.0 200 Figure 9. Error Amplifier 0.005 0.01 0.02 5.0 10 0.002 0 2.0 20 100 200 500 1000 0.5 50 5.0 10 20 50 1.0 RD = 0 Ω 1.0 2.0 1.5 100 0.05 0.1 0.2 0.5 2.0 R T, TIMING RESISTOR (k Ω ) V SAT , SATURATION VOLTAGE (V) 2.5 OSCILLATOR PERIOD (ms) Figure 10. Undervoltage Lockout VCC Vref Q6 To Reset Vref Q5 125 µA R1 + Q11 Q3 1.2V Bandgap Reference Q4 50µA 50µA 14µA Q12 100µA 14µA 100 µA Q7 Q8 To Driver A To Driver B – R2 3 Compensation Q10 100µA Q9 Q1 Q2 1.0k 500 1.0k 500 1 + Error – Error Figure 11. Pulse Processing Logic Memory F/F Sync S S Q PWM R Q Clock D Q Metering F/F 6 The metering Flip–Flop is an asynchronous data latch which suppresses high frequency oscillations by allowing only one PWM pulse per oscillator cycle. PWM The memory Flip–Flop prevents double pulsing in a push–pull configuration by remembering which output produced the last pulse. MOTOROLA ANALOG IC DEVICE DATA SG3526 APPLICATIONS INFORMATION Figure 12. Extending Reference Output Current Capability Figure 13. Error Amplifier Connections R1 1 + C* Vref 27 17 VCC 18 Reference Regulator 1 + Vref R2 2 – Vref 2 – R2 + 15 R3 Negative Output Voltage R3 R1 10µF Gnd Positive Output Voltage Gnd Gnd R1 + R2 R2 Vout = Vref * May be required with some types of transistors R3 = Figure 14. Oscillator Connections R1 R2 Vout = Vref R1R2 R1 + R2 Figure 15. Foldback Current Limiting Output Filter + RS 11 12 SG3526 Sync – 6 8 RD 9 Vout R1 10 + 7 R2 RT Gnd CT 0.1 V + I(max) = Figure 16. Soft–Start Circuity + Error – Error 2 + Vout R1 R1 + R2 ISC = RS 0.1 V RS Figure 17. Driving VMOS Power FETs +12V Vref 1 – 100 µA Ramp – PWM Error – Amp 14 VC A 13 + SG3526 Reset Q2 5 Q1 Gnd Q3 To Undervoltage Lockout B 16 CSoft–Start The totem pole output drivers of the SG3526 are ideally suited for driving the input capacitance of power FETs at high speeds. MOTOROLA ANALOG IC DEVICE DATA 7 SG3526 Figure 19. Flyback Converter with Current Limiting Figure 18. Half–Bridge Configuration +V Supply +V Supply R1 R1 14 VC C1 14 VC A 13 Q1 SG3526 Gnd 15 B 5 T2 C2 Q2 16 R T1 R4 A B SG3526 8 S 4 +CS –CS CS Gnd 15 C1 T1 C2 13 D1 16 D2 Q1 7 R3 6 R2 In the above circuit, current limiting is accomplished by using the current limit comparator output to reset the soft–start capacitor. Figure 20. Single–Ended Configuration Q1 +V Supply To Output Filter R1 Figure 21. Push–Pull Configuration +V Supply R1 C1 14 VC R2 14 VC A SG3526 B Gnd 13 16 A 13 B Q1 T1 C2 SG3526 Gnd R2 16 R3 Q2 15 15 8 MOTOROLA ANALOG IC DEVICE DATA SG3526 OUTLINE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 707–02 ISSUE C 18 NOTES: 1. POSITIONAL TOLERANCE OF LEADS (D), SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 10 B 1 9 A L C N F H D G K SEATING PLANE MOTOROLA ANALOG IC DEVICE DATA M J DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 22.22 23.24 6.10 6.60 3.56 4.57 0.36 0.56 1.27 1.78 2.54 BSC 1.02 1.52 0.20 0.30 2.92 3.43 7.62 BSC 0_ 15_ 0.51 1.02 INCHES MIN MAX 0.875 0.915 0.240 0.260 0.140 0.180 0.014 0.022 0.050 0.070 0.100 BSC 0.040 0.060 0.008 0.012 0.115 0.135 0.300 BSC 0_ 15 _ 0.020 0.040 9 SG3526 Motorola reserves the right to make changes without further notice to any products herein. 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