ONSEMI MC10H165L

MC10H165
8−Input Priority Encoder
Description
The MC10H165 is an 8−Input Priority Encoder. This 10H part is a
functional/pinout duplication of the standard MECL 10K™ family
part, with 100% improvement in propagation delay, and no increases
in power−supply current.
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Features
MARKING DIAGRAMS*
• Propagation Delay, Data−to−Output, 2.2 ns Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
•
•
•
16
Temperature Range)
Voltage Compensated
MECL 10K Compatible
Pb−Free Packages are Available*
MC10H165L
AWLYYWW
TRUTH TABLE
DATA INPUTS
1
CDIP−16
L SUFFIX
CASE 620A
OUTPUTS
D0
D1
D2
D3
D4
D5
D6
D7
H
L
L
L
L
L
L
L
L
X
H
L
L
L
L
L
L
L
X
X
H
L
L
L
L
L
L
X
X
X
H
L
L
L
L
L
X
X
X
X
H
L
L
L
L
X
X
X
X
X
H
L
L
L
X
X
X
X
X
X
H
L
L
X
X
X
X
X
X
X
H
L
Q3 Q2 Q1 Q0
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
H
H
L
L
L
H
H
L
L
H
H
L
L
H
L
H
L
H
L
H
L
16
MC10H165P
AWLYYWWG
16
1
PDIP−16
P SUFFIX
CASE 648
DIP
PIN ASSIGNMENT
1
1 20
VCC1
1
16
VCC2
Q1
2
15
Q2
Q0
3
14
Q3
CLOCK
4
13
D2
D0
5
12
D5
D7
6
11
D4
D1
7
10
D3
VEE
8
9
D6
10H165G
AWLYYWW
20 1
PLLC−20
FN SUFFIX
CASE 775
A
WL, L
YY, Y
WW, W
G
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 7
1
Publication Order Number:
MC10H165/D
MC10H165
Table 1. MAXIMUM RATINGS
Symbol
Rating
Unit
VEE
Power Supply (VCC = 0)
Characteristic
−8.0 to 0
Vdc
VI
Input Voltage (VCC = 0)
0 to VEE
Vdc
Iout
Output Current
50
100
mA
TA
Operating Temperature Range
0 to +75
°C
Tstg
Storage Temperature Range − Plastic
− Ceramic
−55 to +150
−55 to +165
°C
− Continuous
− Surge
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (VEE = −5.2 V ±5%) (Note 1)
0°
Symbol
Characteristic
25°
75°
Min
Max
Min
Max
Min
Max
Unit
IE
Power Supply Current
−
144
−
131
−
144
mA
IinH
Input Current High
Pin 4
Data Inputs
−
−
510
600
−
−
320
370
−
−
320
370
0.5
−
0.5
−
0.3
−
mA
−0.735
Vdc
mAdc
IinL
Input Current Low
VOH
High Output Voltage
−1.02
−0.84
−0.98
−0.81
−0.92
VOL
Low Output Voltage
−1.95
−1.63
−1.95
−1.63
−1.95
−1.60
Vdc
VIH
High Input Voltage
−1.17
−0.84
−1.13
−0.81
−1.07
−0.735
Vdc
VIL
Low Input Voltage
−1.95
−1.48
−1.95
−1.48
−1.95
−1.45
Vdc
1. Each MECL 10H™ series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained.
Outputs are terminated through a 50 W resistor to −2.0 V.
Table 3. AC PARAMETERS
0°
Symbol
25°
75°
Min
Max
Min
Max
Min
Max
Propagation Delay
Data Input → Output
Clock Input → Output
0.7
0.7
3.4
2.2
0.7
0.7
3.4
2.2
0.7
0.7
3.4
2.2
tset
Set−up Time
3.0
−
3.0
−
3.0
−
ns
thold
Hold Time
0.5
−
0.5
−
0.5
−
ns
tr
Rise Time
0.5
2.4
0.5
2.4
0.5
2.4
ns
tf
Fall Time
0.5
2.4
0.5
2.4
0.5
2.4
ns
tpd
Characteristic
Unit
ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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2
MC10H165
8−INPUT PRIORITY ENCODER
The MC10H165 is a device designed to encode eight
inputs to a binary coded output. The output code is that of the
highest order input. Any input of lower priority is ignored.
Each output incorporates a latch allowing synchronous
operation. When the clock is low the outputs follow the
inputs and latch when the clock goes high. This device is
very useful for a variety of applications in checking system
status in control processors, peripheral controllers, and
testing systems.
The input is active when high, (e.g., the three binary
outputs are low when input D0 is high). The Q3 output is
high when any input is high. This allows direct extension
into another priority encoder when more than eight inputs
are necessary. The MC10H165 can also be used to develop
binary codes from random logic inputs, for addressing
ROMs, RAMs, or for multiplexing data.
LOGIC DIAGRAM
C4
. VCC1 = PIN 1
. VCC2 = PIN 16
. VEE = PIN 8
D0 5
D1 7
3 Q0
D2 13
D3 10
D4 11
2 Q1
D5 12
15 Q2
D6 9
D7 6
14 Q3
Numbers at ends of terminals denote pin numbers for L and P packages.
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3
MC10H165
APPLICATION INFORMATION
A typical application of the MC10H165 is the decoding of
system status on a priority basis. A 64−line priority encoder
is shown in the figure below. System status lines are
connected to this encoder such that, when a given condition
exists, the respective input will be at a logic high level. This
scheme will select the one of 64 different system conditions,
as represented at the encoder inputs, which has priority in
determining the next system operation to be performed. The
binary code showing the address of the highest priority input
present will appear at the encoder outputs to control other
system logic functions.
64−LINE PRIORITY ENCODER
LSB
Z
1/2 MC10H101
Z
Z
MC10H164
MC10H164
MC10H164
X0 . . . . . . . X7 A B C
X0 . . . . . . . X7 A B C
X0 . . . . . . . X7 A B C
Six bit output
word yielding
number of
highest priority
channel present
at input
System
Clock
D0
Q1
Q2
C
Q0
MC10H165
Q3
D0
C
Q0
D0
MC10H165
C
D7
D0
MC10H165
C
MC10H165
C
D0
Q1
Q2
Q3
Q0
Q1
Q2
Q3
Q0
Q1
Q2
Q0
Q1
Q2
Q3
C
Q0
MC10H165
D7
D0
Q1
Q2
Q3
C
Q0
D7
MC10H165
D7
D0
D7
Q3
D7
Q0
Q1
Q2
Q2
Q3
D7
C
D0
Q1
D7
D0
Lowest
Priority
Input
Q0
D7
MC10H165
Highest
Priority
Input
MC10H165
C
Q1
Q2
Q3
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4
MSB
MC10H165
ORDERING INFORMATION
Package
Shipping †
MC10H165FN
PLLC−20
46 Units / Rail
MC10H165FNG
PLLC−20
(Pb−Free)
46 Units / Rail
MC10H165FNR2
PLLC−20
500 / Tape & Reel
MC10H165FNR2G
PLLC−20
(Pb−Free)
500 / Tape & Reel
MC10H165L
CDIP−16
25 Unit / Rail
MC10H165P
PDIP−16
25 Unit / Rail
MC10H165PG
PDIP−16
(Pb−Free)
25 Unit / Rail
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MC10H165
PACKAGE DIMENSIONS
20 LEAD PLLC
CASE 775−02
ISSUE E
B
0.007 (0.180) M T L−M
Y BRK
−N−
U
N
S
0.007 (0.180) M T L−M
S
S
N
S
D
−L−
−M−
Z
W
20
D
1
G1
X
V
0.010 (0.250)
S
T L−M
S
N
S
VIEW D−D
A
0.007 (0.180) M T L−M
S
N
S
R
0.007 (0.180) M T L−M
S
N
S
Z
C
H
−T−
VIEW S
G1
0.010 (0.250) S T L−M
SEATING
PLANE
F
0.007 (0.180) M T L−M
S
VIEW S
S
N
S
N
S
K
0.004 (0.100)
J
S
K1
E
G
0.007 (0.180) M T L−M
NOTES:
1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M,
1982.
2. DIMENSIONS IN INCHES.
3. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP
OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD
PARTING LINE.
4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT
DATUM −T−, SEATING PLANE.
5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER
THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE
BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY
MISMATCH BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION
TO BE GREATER THAN 0.037 (0.940). THE DAMBAR
INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO
BE SMALLER THAN 0.025 (0.635).
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6
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
INCHES
MIN
MAX
0.385
0.395
0.385
0.395
0.165
0.180
0.090
0.110
0.013
0.019
0.050 BSC
0.026
0.032
0.020
−−−
0.025
−−−
0.350
0.356
0.350
0.356
0.042
0.048
0.042
0.048
0.042
0.056
−−− 0.020
2_
10 _
0.310
0.330
0.040
−−−
MILLIMETERS
MIN
MAX
9.78
10.03
9.78
10.03
4.20
4.57
2.29
2.79
0.33
0.48
1.27 BSC
0.66
0.81
0.51
−−−
0.64
−−−
8.89
9.04
8.89
9.04
1.07
1.21
1.07
1.21
1.07
1.42
−−−
0.50
2_
10 _
7.88
8.38
1.02
−−−
N
S
MC10H165
PACKAGE DIMENSIONS
CDIP−16
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620A−01
ISSUE O
B
A
A
16
9
1
8
B
M
L
16X
0.25 (0.010)
E
F
C
K
T
N
SEATING
PLANE
G
16X
0.25 (0.010)
M
D
T A
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7
M
J
T B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
5 THIS DRAWING REPLACES OBSOLETE
CASE OUTLINE 620−10.
DIM
A
B
C
D
E
F
G
H
K
L
M
N
INCHES
MIN
MAX
0.750
0.785
0.240
0.295
−−− 0.200
0.015
0.020
0.050 BSC
0.055
0.065
0.100 BSC
0.008
0.015
0.125
0.170
0.300 BSC
0_
15 _
0.020
0.040
MILLIMETERS
MIN
MAX
19.05
19.93
6.10
7.49
−−−
5.08
0.39
0.50
1.27 BSC
1.40
1.65
2.54 BSC
0.21
0.38
3.18
4.31
7.62 BSC
0_
15 _
0.51
1.01
MC10H165
PACKAGE DIMENSIONS
PDIP−16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648−08
ISSUE R
−A−
16
9
1
8
B
F
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
L
S
−T−
H
SEATING
PLANE
K
G
D
M
J
16 PL
0.25 (0.010)
M
T A
M
DIM
A
B
C
D
F
G
H
J
K
L
M
S
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
MECL 10H and MECL 10K are trademarks of Motorola, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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Literature Distribution Center for ON Semiconductor
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P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center
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Phone: 81−3−5773−3850
Email: [email protected]
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8
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For additional information, please contact your
local Sales Representative.
MC10H165/D