ONSEMI MC10H166

MC10H166
5−Bit Magnitude
Comparator
Description
The MC10H166 is a 5−Bit Magnitude Comparator and is a
functional/ pinout duplication of the standard MECL 10K™ part with
100% improvement in propagation delay and no increase in
power−supply current.
The MC10H166 is a high−speed expandable 5−bit comparator for
comparing the magnitude of two binary words. Two outputs are
provided: A < B and A > B. The A = B function can be obtained by
wire−ORing these outputs (a low level indicates A = B) or by
wire−NORing the outputs (a high level indicates A = B). A high level
on the enable function forces both outputs low.
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MARKING DIAGRAMS*
16
MC10H166L
AWLYYWW
Features
1
CDIP−16
L SUFFIX
CASE 620A
• Propagation Delay, Data−to−Output, 2.0 ns Typical
• Power Dissipation 440 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K Compatible
• Pb−Free Packages are Available*
16
1
TRUTH TABLE
Inputs
PDIP−16
P SUFFIX
CASE 648
Outputs
E
A
B
A<B
A>B
H
X
X
L
L
L
WORD A = WORD B
L
L
L
WORD A > WORD B
L
H
L
WORD A < WORD B
H
L
20 1
VCC1
1
16
VCC2
A>B
2
15
E
A<B
3
14
B2
B0
4
13
A2
A0
5
12
A3
A1
6
11
B3
B1
7
10
B4
VEE
8
9
A4
10H166G
AWLYYWW
PLLC−20
FN SUFFIX
CASE 775
A
WL, L
YY, Y
WW, W
G
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
March, 2006 − Rev. 7
1
1 20
DIP
PIN ASSIGNMENT
© Semiconductor Components Industries, LLC, 2006
MC10H166P
AWLYYWWG
16
1
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Publication Order Number:
MC10H166/D
MC10H166
Table 1. MAXIMUM RATINGS
Symbol
Rating
Unit
VEE
Power Supply (VCC = 0)
Characteristic
−8.0 to 0
Vdc
VI
Input Voltage (VCC = 0)
0 to VEE
Vdc
Iout
Output Current
50
100
mA
TA
Operating Temperature Range
0 to +75
°C
Tstg
Storage Temperature Range − Plastic
− Ceramic
−55 to +150
−55 to +165
°C
°C
− Continuous
− Surge
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (VEE = −5.2 V ±5%) (Note 1)
0°
Symbol
75°
Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
−
117
−
106
−
117
mA
IinH
Input Current High
−
350
−
220
−
220
A
IinL
Input Current Low
0.5
−
0.5
−
0.3
−
A
VOH
High Output Voltage
−1.02
−0.84
−0.98
−0.81
−0.92
−0.735
Vdc
VOL
Low Output Voltage
−1.95
−1.63
−1.95
−1.63
−1.95
−1.60
Vdc
VIH
High Input Voltage
−1.17
−0.84
−1.13
−0.81
−1.07
−0.735
Vdc
VIL
Low Input Voltage
−1.95
−1.48
−1.95
−1.48
−1.95
−1.45
Vdc
IE
Characteristic
25°
1. Each MECL 10H™ series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained.
Outputs are terminated through a 50 resistor to −2.0 V.
Table 3. AC PARAMETERS
0°
Symbol
75°
Min
Max
Min
Max
Min
Max
Propagation Delay
Data−to−Output
Enable−to−Output
1.1
0.6
3.5
1.7
1.1
0.7
3.7
1.7
1.2
0.7
4.1
1.8
tr
Rise Time
0.6
1.5
0.6
1.6
0.6
1.7
ns
tf
Fall Time
0.6
1.5
0.6
1.6
0.6
1.7
ns
tpd
Characteristic
25°
Unit
ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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2
MC10H166
LOGIC DIAGRAM
A4 9
B4 10
A3 12
B3 11
2AB
A2 13
B2 14
3AB
A1 6
B1 7
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
A0 5
B0 4
E 15
FIGURE 1 − 9−BIT MAGNITUDE COMPARATOR
A0 B0 A1 B1 A2 B2 A3 B3 A4 B4
A0
B0
A1
B1
A2
B2
A3
B3
A4
A5 B5 A6 B6 A7 B7 A8 B8
A0
B4
B0
A1
B1
A2
B2
A3
B3
A4
B4
MC10H166
AB
AB
AB
AB
AB
AB
A=B
For 9−Bit Word
For longer word lengths, the MC10H166 can be serially
expanded or cascaded. Figure 1 shows two devices in a serial
expansion for a 9−bit word length. The A > B and
A < B outputs are fed to the A0 and B0 inputs respectively
of the next device. The connection for an A = B output is also
shown. The worst case delay time of serial expansion is
equal to the number of comparators times the
data−to−output delay.
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3
MC10H166
FIGURE 2 − 25−BIT MAGNITUDE COMPARATOR
B24
A24
B23
A23
B22
A22
B21
A21
B20
A20
B4
A4
B3
A3 A < B
B2
A2
B1 A > B
A1
B0
A0
B19
A19
B18
A18
B17
A17
B16
A16
B15
A15
B4
A4
B3
A3 A < B
B2
A2
B1 A > B
A1
B0
A0
B14
A14
B13
A13
B12
A12
B11
A11
B10
A10
B4
A4
B3
A3
B2
A2
B1
A1
B0
A0
B9
A9
B8
A8
B7
A7
B6
A6
A5
B5
B4
A4
B3
A3
B2
A2
B1
A1
B0
A0
A
B
A
B
B4
A4
B3
A3 A B
B2
A2
B1 A B
A1
B0
A0
B4
A4
B3
A3 A < B
B2
A2
B1 A > B
A1
B0
A0
A=B
A<B
A>B
For shorter delay times than possible with serial expansion,
devices can be cascaded. Figure 2 shows a 25−bit cascaded
comparator whose worst case delay is two data−to−output delays.
The cascaded scheme can be extended to longer word lengths.
B4
A4
B3
A3 A B2 B
A2
B1 A B
A1
B0
A0
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4
MC10H166
ORDERING INFORMATION
Package
Shipping †
MC10H166FN
PLLC−20
46 Units / Rail
MC10H166FNG
PLLC−20
(Pb−Free)
46 Units / Rail
MC10H166FNR2
PLLC−20
500 / Tape & Reel
MC10H166FNR2G
PLLC−20
(Pb−Free)
500 / Tape & Reel
MC10H166L
CDIP−16
25 Unit / Rail
MC10H166P
PDIP−16
25 Unit / Rail
MC10H166PG
PDIP−16
(Pb−Free)
25 Unit / Rail
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MC10H166
PACKAGE DIMENSIONS
20 LEAD PLLC
CASE 775−02
ISSUE E
B
0.007 (0.180) M T L−M
Y BRK
−N−
U
N
S
0.007 (0.180) M T L−M
S
S
N
S
D
−L−
−M−
Z
W
20
D
1
G1
X
V
0.010 (0.250)
S
T L−M
S
N
S
VIEW D−D
A
0.007 (0.180) M T L−M
S
N
S
R
0.007 (0.180) M T L−M
S
N
S
Z
C
J
S
−T−
VIEW S
SEATING
PLANE
F
0.007 (0.180) M T L−M
S
VIEW S
S
N
S
N
S
K
0.004 (0.100)
G
0.007 (0.180) M T L−M
K1
E
G1
0.010 (0.250) S T L−M
H
NOTES:
1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M,
1982.
2. DIMENSIONS IN INCHES.
3. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP
OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD
PARTING LINE.
4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT
DATUM −T−, SEATING PLANE.
5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER
THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE
BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY
MISMATCH BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION
TO BE GREATER THAN 0.037 (0.940). THE DAMBAR
INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO
BE SMALLER THAN 0.025 (0.635).
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6
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
INCHES
MIN
MAX
0.385
0.395
0.385
0.395
0.165
0.180
0.090
0.110
0.013
0.019
0.050 BSC
0.026
0.032
0.020
−−−
0.025
−−−
0.350
0.356
0.350
0.356
0.042
0.048
0.042
0.048
0.042
0.056
−−− 0.020
2_
10 _
0.310
0.330
0.040
−−−
MILLIMETERS
MIN
MAX
9.78
10.03
9.78
10.03
4.20
4.57
2.29
2.79
0.33
0.48
1.27 BSC
0.66
0.81
0.51
−−−
0.64
−−−
8.89
9.04
8.89
9.04
1.07
1.21
1.07
1.21
1.07
1.42
−−−
0.50
2_
10 _
7.88
8.38
1.02
−−−
N
S
MC10H166
PACKAGE DIMENSIONS
CDIP−16
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620A−01
ISSUE O
B
A
A
16
9
1
8
B
M
L
16X
0.25 (0.010)
E
F
C
K
T
N
SEATING
PLANE
G
16X
0.25 (0.010)
M
D
T A
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7
M
J
T B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
5 THIS DRAWING REPLACES OBSOLETE
CASE OUTLINE 620−10.
DIM
A
B
C
D
E
F
G
H
K
L
M
N
INCHES
MIN
MAX
0.750
0.785
0.240
0.295
−−− 0.200
0.015
0.020
0.050 BSC
0.055
0.065
0.100 BSC
0.008
0.015
0.125
0.170
0.300 BSC
0_
15 _
0.020
0.040
MILLIMETERS
MIN
MAX
19.05
19.93
6.10
7.49
−−−
5.08
0.39
0.50
1.27 BSC
1.40
1.65
2.54 BSC
0.21
0.38
3.18
4.31
7.62 BSC
0_
15 _
0.51
1.01
MC10H166
PACKAGE DIMENSIONS
PDIP−16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648−08
ISSUE R
−A−
16
9
1
8
B
F
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
L
S
−T−
H
SEATING
PLANE
K
G
D
M
J
16 PL
0.25 (0.010)
M
T A
M
DIM
A
B
C
D
F
G
H
J
K
L
M
S
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
MECL 10H and MECL 10K are trademarks of Motorola, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 81−3−5773−3850
Email: [email protected]
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8
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
MC10H166/D