TI TLC2272CP

 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
D
D
D
D
D
D
D
Output Swing Includes Both Supply Rails
Low Noise . . . 9 nV/√Hz Typ at f = 1 kHz
Low Input Bias Current . . . 1 pA Typ
Fully Specified for Both Single-Supply and
Split-Supply Operation
Common-Mode Input Voltage Range
Includes Negative Rail
High-Gain Bandwidth . . . 2.2 MHz Typ
High Slew Rate . . . 3.6 V/µs Typ
D Low Input Offset Voltage
D
D
D
950 µV Max at TA = 25°C
Macromodel Included
Performance Upgrades for the TS272,
TS274, TLC272, and TLC274
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
description
V(OPP)
V
O(PP) − Maximum Peak-to-Peak Output Voltage − V
The TLC2272 and TLC2274 are dual and
quadruple operational amplifiers from Texas
Instruments. Both devices exhibit rail-to-rail
output performance for increased dynamic range
in single- or split-supply applications. The
TLC227x family offers 2 MHz of bandwidth and
3 V/µs of slew rate for higher speed applications.
These devices offer comparable ac performance
while having better noise, input offset voltage, and
power dissipation than existing CMOS
operational amplifiers. The TLC227x has a noise
voltage of 9 nV/√Hz, two times lower than
competitive solutions.
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
16
TA = 25°C
14
12
IO = ± 50 µA
10
8
IO = ± 500 µA
The TLC227x, exhibiting high input impedance
and low noise, is excellent for small-signal
6
conditioning for high-impedance sources, such as
piezoelectric transducers. Because of the micro4
power dissipation levels, these devices work well
16
4
6
8
10
12
14
in hand-held monitoring and remote-sensing
|VDD ±| − Supply Voltage − V
applications. In addition, the rail-to-rail output
feature, with single- or split-supplies, makes this
family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the
TLC227xA family is available with a maximum input offset voltage of 950 µV. This family is fully characterized
at 5 V and ± 5 V.
The TLC2272/4 also makes great upgrades to the TLC272/4 or TS272/4 in standard designs. They offer
increased output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set
allows them to be used in a wider range of applications. For applications that require higher output drive and
wider input voltage range, see the TLV2432 and TLV2442 devices.
If the design requires single amplifiers, see the TLV2211/21/31 family. These devices are single rail-to-rail
operational amplifiers in the SOT-23 package. Their small size and low power consumption, make them ideal
for high density, battery-powered equipment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.
Copyright  2004, Texas Instruments Incorporated
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POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272 AVAILABLE OPTIONS
PACKAGED DEVICES
TA
VIOmax
At 25°C
SMALL
OUTLINE†
(D)
CERAMIC
LCC
(FK)
CERAMIC
DIP
(JG)
PLASTIC DIP
(P)
TSSOP‡
(PW)
CERAMIC
FLAT PACK
(U)
950 µV
2.5 mV
TLC2272ACD
TLC2272CD
—
—
—
—
TLC2272ACP
TLC2272CP
TLC2272ACPW
0°C to 70°C
—
—
950 µV
2.5 mV
TLC2272AID
TLC2272ID
—
—
—
—
TLC2272AIP
TLC2272IP
950 µV
2.5 mV
TLC2272AQD
TLC2272QD
—
—
—
—
950 µV
2.5 mV
TLC2272AMD
TLC2272MD
TLC2272AMFK
TLC2272MFK
TLC2272AMJG
TLC2272MJG
−40°C to 125°C
−55°C to 125°C
TLC2272CPW
—
TLC2272IPW
—
—
—
TLC2272AQPW
TLC2272QPW
—
—
TLC2272AMP
TLC2272MP
—
TLC2272AMU
TLC2272MU
† The D packages are available taped and reeled. Add R suffix to the device type (e.g., TLC2272CDR).
‡ The PW package is available taped and reeled. Add R suffix to the device type (e.g., TLC2272PWR).
§ Chips are tested at 25°C.
TLC2274 AVAILABLE OPTIONS
PACKAGED DEVICES
TA
VIOmax
AT 25°C
SMALL
OUTLINE†
(D)
CERAMIC
LCC
(FK)
CERAMIC
DIP
(J)
PLASTIC
DIP
(N)
TSSOP‡
(PW)
CERAMIC
FLAT PACK
(W)
0°C to 70°C
950 µV
2.5 mV
TLC2274ACD
TLC2274CD
—
—
TLC2274ACN
TLC2274CN
TLC2274ACPW
TLC2274CPW
—
950 µV
2.5 mV
TLC2274AID
TLC2274ID
—
—
TLC2274AIN
TLC2274IN
TLC2274AIPW
TLC2274IPW
—
950 µV
2.5 mV
TLC2274AQD
TLC2274QD
—
—
—
—
—
950 µV
2.5 mV
TLC2274AMD
TLC2274MD
TLC2274AMFK
TLC2274MFK
TLC2274AMJ
TLC2274MJ
TLC2274AMN
TLC2274MN
—
−40°C to 125°C
−55°C to 125°C
† The D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2274CDR).
‡ The PW package is available taped and reeled.
§ Chips are tested at 25°C.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLC2274AMW
TLC2274MW
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
1
8
2
7
3
6
4
5
VDD +
2OUT
2IN −
2IN +
NC
1OUT
NC
VDD+
NC
TLC2272
FK PACKAGE
(TOP VIEW)
1OUT
1IN −
1IN +
VDD +
2IN +
2IN −
2OUT
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
NC
VDD−/GND
NC
2 IN+
NC
NC
1 IN−
NC
1 IN+
NC
NC
2 OUT
NC
2 IN−
NC
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT
4IN −
4IN +
VDD −
3IN +
3IN −
3OUT
TLC2272
U PACKAGE
(TOP VIEW)
NC
1 OUT
1 IN−
1 IN+
VDD−/GND
1
10
2
9
3
8
4
7
5
6
TLC2274
FK PACKAGE
(TOP VIEW)
1IN −
1OUT
NC
4OUT
4IN −
1OUT
1IN −
1IN +
VDD − /GND
TLC2274
D, J, N, PW, OR W PACKAGE
(TOP VIEW)
1IN +
NC
VDD +
NC
2IN +
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4IN +
NC
VDD −
NC
3IN +
2IN −
2OUT
NC
3OUT
3IN −
TLC2272
D, JG, P, OR PW PACKAGE
(TOP VIEW)
NC
VDD+
2 OUT
2 IN−
2 IN+
NC − No internal connection
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
equivalent schematic (each amplifier)
VDD +
Q3
Q6
Q9
Q12
Q14
Q16
IN +
OUT
C1
IN −
R5
Q1
Q4
Q13
Q15
Q17
D1
Q2
Q5
R3
R4
Q7
Q8
Q10
Q11
R1
VDD−
ACTUAL DEVICE COMPONENT COUNT†
TLC2272
TLC2274
Transistors
COMPONENT
38
76
Resistors
26
52
9
18
Diodes
Capacitors
3
6
† Includes both amplifiers and all ESD, bias, and trim circuitry
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
R2
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Supply voltage, VDD − (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −8 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 16 V
Input voltage range, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD− − 0.3 V to VDD+
Input current, II (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Total current into VDD + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Total current out of VDD − . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Package thermal impedance, θJA (see Notes 4 and 5): D package (8 pin) . . . . . . . . . . . . . . . . . . . . 97.1°C/W
D package (14 pin) . . . . . . . . . . . . . . . . . . . 86.2°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . 79.7°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . 84.6°C/W
PW package (8 pin) . . . . . . . . . . . . . . . . . . . 149°C/W
PW package (14 pin) . . . . . . . . . . . . . . . . . . 113°C/W
Package thermal impedance, θJC (see Notes 4 and 5): FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6°C/W
J package . . . . . . . . . . . . . . . . . . . . . . . . . . 15.1°C/W
U package . . . . . . . . . . . . . . . . . . . . . . . . . . 14.7°C/W
Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I, Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P or PW package . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or U package . . . . . . . . . . . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD −.
2. Differential voltages are at IN+ with respect to IN −. Excessive current will flow if input is brought below VDD − − 0.3 V.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
4. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
5. The package thermal impedance is calculated in accordance with JESD 51-7 (plastic) or MIL-STD-883 Method 1012 (ceramic).
recommended operating conditions
C SUFFIX
Supply voltage, VDD ±
Input voltage, VI
I SUFFIX
Q SUFFIX
M SUFFIX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
± 2.2
±8
± 2.2
±8
± 2.2
±8
± 2.2
±8
Common-mode input voltage, VIC
VDD −
VDD −
Operating free-air temperature, TA
0
VDD + − 1.5
VDD + − 1.5
70
VDD −
VDD −
−40
POST OFFICE BOX 655303
VDD + − 1.5
VDD + − 1.5
125
VDD −
VDD −
−40
• DALLAS, TEXAS 75265
VDD + − 1.5
VDD + − 1.5
125
VDD −
VDD −
−55
UNIT
V
VDD + − 1.5
VDD + − 1.5
V
125
°C
V
5
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient
of input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage
TEST CONDITIONS
High-level output
voltage
25°C
VIC = 0 V,
VDD ± = ± 2.5 V,
VO = 0 V,
RS = 50 Ω
AVD
Large-signal differential
voltage amplification
300
2500
µV
0.002
0.002
µV/mo
25°C
0.5
Full range
60
0.5
100
1
0 to 4
60
−0.3
to 4.2
1
25°C
4.85
4.85
25°C
4.25
Full range
4.25
−0.3
to 4.2
pA
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
25°C
0.01
25°C
0.09
Full range
0.01
0.15
0.09
0.15
25°C
pA
V
0 to
3.5
4.99
Full range
60
100
0 to 4
0 to
3.5
60
100
100
25°C
IOL = 500 µA
950
1500
UNIT
25°C
|VIO | ≤ 5 mV
VIC = 2.5 V,
300
MAX
µV/°C
25°C
IOL = 50 µA
TYP
2
25°C
IOH = − 200 µA
MIN
2
Full range
VIC = 2.5 V,
Low-level output voltage
MAX
Full range
RS = 50 Ω
Ω,,
TLC2272AC
TYP
3000
25°C
25
C
to 70°C
IOH = − 1 mA
VOL
TLC2272C
MIN
Full range
IOH = − 20 µA
VOH
TA†
0.9
0.15
1.5
0.9
VIC = 2.5 V,
IOL = 5 mA
RL = 10 kΩ‡
25°C
15
VIC = 2.5 V,
VO = 1 V to 4 V
Full range
15
RL = 1 mΩ‡
25°C
175
175
Full range
1.5
35
0.15
V
1.5
1.5
15
35
15
V/mV
rid
Differential input
resistance
25°C
1012
1012
Ω
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
140
140
Ω
CMRR
Common-mode
rejection ratio
VIC = 0 V to 2.7 V,
VO = 2.5 V,
RS = 50 Ω
25°C
70
Full range
70
Supply-voltage
rejection ratio
(∆VDD /∆VIO)
25°C
VDD = 4.4 V to 16 V,VIC = VDD /2,
No load
Full range
80
kSVR
IDD
Supply current
VO = 2.5 V,
70
75
dB
70
95
80
95
dB
80
25°C
No load
75
Full range
80
2.2
3
3
2.2
3
3
mA
† Full range is 0°C to 70°C.
‡ Referenced to 0 V
NOTE 6: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272C operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
SR
Slew rate at unity
gain
TEST CONDITIONS
VO = 0.5 V to 2.5 V,
RL = 10 kkΩ‡,
CL = 100 pF‡
2.3
3.6
Full
range
1.7
MIN
TYP
2.3
3.6
25°C
9
9
f = 0.1 Hz to 1 Hz
25°C
1
1
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
25°C
0.6
0.6
Equivalent input
noise current
THD + N
Total harmonic
distortion plus noise
VO = 0.5 V to 2.5 V,
f = 20 kHz,
RL = 10 kΩ
k ‡,
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF‡
RL = 10 kΩ‡,
Maximum
output-swing
bandwidth
VO(PP) = 2 V,
RL = 10 kΩ‡,
AV = 1,
CL = 100 pF‡
Settling time
AV = − 1,
Step = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
CL = 100 pF‡
RL = 10 kΩ‡,
AV = 1
AV = 10
fA/√Hz
0.0013%
0.004%
0.03%
0.03%
25°C
2.18
2.18
MHz
25°C
1
1
MHz
1.5
1.5
2.6
2.6
25°C
50°
50°
25°C
10
10
µss
25°C
To 0.01%
POST OFFICE BOX 655303
µV
V
0.004%
To 0.1%
Gain margin
† Full range is 0°C to 70°C.
‡ Referenced to 0 V
nV/√Hz
0.0013%
25°C
25
C
AV = 100
CL = 100 pF‡
UNIT
V/µs
f = 1 kHz
In
MAX
1.7
50
Peak-to-peak
equivalent input
noise voltage
Phase margin at
unity gain
25°C
MAX
50
VNPP
φm
TYP
25°C
Equivalent input
noise voltage
ts
MIN
TLC2272AC
f = 10 Hz
Vn
BOM
TLC2272C
TA†
• DALLAS, TEXAS 75265
dB
7
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless
otherwise specified)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
Input offset current
IIB
Input bias current
TA†
TEST CONDITIONS
25°C
Common-mode input
voltage
VO = 0 V,
VIC = 0 V,
VIC = 0 V,
VIC = 0 V,
Large-signal differential
voltage amplification
VO = ± 4 V
IO = 500 µA
IO = 5 mA
RL = 10 kΩ
0.002
µV/mo
25°C
0.5
60
0.5
100
1
−5
to
4
−5
to
3.5
60
−5.3
to
4.2
1
Full range
4.85
25°C
4.25
Full range
4.25
25°C
−5
to
4
−5
to
3.5
−4.85
Full range
−4.85
25°C
−3.5
Full range
−3.5
25°C
25
Full range
25
−5.3
to
4.2
pA
pA
V
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
−4.99
25°C
60
100
4.99
4.85
60
100
100
25°C
RL = 1 mΩ
µV
0.002
25°C
IO = 50 µA
950
1500
UNIT
25°C
|VIO | ≤ 5 mV
IO = − 200 µA
300
MAX
µV/°C
25°C
RS = 50 Ω
Ω,
TYP
2
Full range
IO = − 1 mA
AVD
2500
Full range
IO = − 20 µA
Maximum negative peak
VOM −
output voltage
300
MIN
2
Full range
Maximum positive peak
VOM +
output voltage
MAX
3000
25°C
25
C
to 70°C
VIC = 0 V,
RS = 50 Ω
TLC2272AC
TYP
Full range
25°C
25
C
VICR
TLC2272C
MIN
−4.99
−4.91
−4.85
−4.91
−4.85
−4.1
−3.5
V
−4.1
−3.5
50
25
50
25
V/mV
25°C
300
300
rid
Differential input
resistance
25°C
1012
1012
Ω
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
130
130
Ω
CMRR
Common-mode rejection
ratio
VIC = − 5 V to 2.7 V,
VO = 0 V,
RS = 50 Ω
25°C
75
Full range
75
kSVR
Supply-voltage rejection
ratio (∆VDD ± /∆VIO)
VDD ± = 2.2 V to ± 8 V,
VIC = 0 V,
No load
25°C
80
Full range
80
IDD
Supply current
VO = 0 V
25°C
No load
Full range
80
75
80
dB
75
95
80
95
dB
80
2.4
3
3
2.4
3
3
mA
† Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272C operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
TEST CONDITIONS
TLC2272C
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2272AC
MAX
MIN
TYP
2.3
3.6
Slew rate at
unity gain
VO = ± 2.3 V,
CL = 100 pF
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VNPP
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion pulse
duration
VO = ± 2.3 V,
f = 20 kHz,
k
RL = 10 kΩ
AV = 1
AV = 10
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF
RL = 10 kΩ,
Maximum outputswing bandwidth
VO(PP) = 4.6 V,
RL = 10 kΩ,
AV = 1,
CL = 100 pF
Settling time
AV = − 1,
Step = − 2.3 V to 2.3 V,
RL = 10 kΩ,
CL = 100 pF
SR
BOM
ts
φm
Phase margin at
unity gain
RL = 10 kΩ,
RL = 10 kΩ,
V/µs
1.7
µV
V
fA/√Hz
0.0011%
0.004%
0.03%
0.03%
25°C
2.25
2.25
MHz
25°C
0.54
0.54
MHz
1.5
1.5
3.2
3.2
25°C
52°
52°
25°C
10
10
25°C
25
C
µss
25°C
To 0.01%
POST OFFICE BOX 655303
nV/√Hz
0.004%
To 0.1%
Gain margin
† Full range is 0°C to 70°C.
UNIT
0.0011%
AV = 100
CL = 100 pF
MAX
• DALLAS, TEXAS 75265
dB
9
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient
of input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage
TEST CONDITIONS
High-level output voltage
25°C
VDD ± = ± 2.5 V,
VO = 0 V,
VIC = 0 V,
RS = 50 Ω
AVD
Large-signal differential
voltage amplification
300
2500
VIC = 2.5 V,
950
1500
UNIT
µV
25°C
0.002
0.002
µV/mo
25°C
0.5
60
0.5
100
1
25°C
0
to 4
60
Full range
0 to
3.5
−0.3
to 4.2
1
25°C
4.85
4.85
25°C
4.25
Full range
4.25
0
to 4
−0.3
to 4.2
pA
pA
V
0 to
3.5
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
25°C
0.01
25°C
0.09
Full range
0.01
0.15
0.09
0.15
25°C
60
100
4.99
Full range
60
100
100
25°C
IOL = 500 µA
300
MAX
µV/°C
VIO ≤ 5 mV,
IOL = 50 µA
TYP
2
25°C
IOH = − 200 µA
MIN
2
Full range
VIC = 2.5 V,
Low-level output voltage
MAX
Full range
RS = 50 Ω,
TLC2274AC
TYP
3000
25°C
to 70°C
IOH = − 1 mA
VOL
TLC2274C
MIN
Full range
IOH = − 20 µA
VOH
TA†
0.9
0.15
1.5
0.9
VIC = 2.5 V,
IOL = 5 mA
RL = 10 kΩ‡
25°C
15
VIC = 2.5 V,
VO = 1 V to 4 V
Full range
15
RL = 1 mΩ‡
25°C
175
175
Full range
1.5
35
0.15
V
1.5
1.5
15
35
15
V/mV
rid
Differential input
resistance
25°C
1012
1012
Ω
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
140
140
Ω
CMRR
Common-mode rejection
ratio
VIC = 0 V to 2.7 V,
VO = 2.5 V,
RS = 50 Ω
25°C
70
Full range
70
kSVR
Supply-voltage rejection
ratio (∆VDD /∆VIO)
VDD = 4.4 V to 16 V,
VIC = VDD /2,
No load
25°C
80
Full range
80
IDD
Supply current
VO = 2.5 V,
Full range
25°C
No load
75
70
75
dB
70
95
80
95
dB
80
4.4
6
6
4.4
6
6
mA
† Full range is 0°C to 70°C.
‡ Referenced to 0 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274C operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST CONDITIONS
TA†
TLC2274C
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2274AC
MAX
MIN
TYP
2.3
3.6
Slew rate at
unity gain
VO = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = 0.5 V to 2.5 V,
f = 20 kHz,
k ‡
RL = 10 kΩ
AV = 1
AV = 10
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF‡
RL = 10 kΩ‡,
Maximum
output-swing
bandwidth
VO(PP) = 2 V,
RL = 10 kΩ‡,
AV = 1,
CL = 100 pF‡
To 0.1%
Settling time
AV = − 1,
Step = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
CL = 100 pF‡
RL = 10 kΩ‡,
CL = 100 pF‡
SR
BOM
ts
φm
Phase margin at
unity gain
CL = 100 pF‡
V/µs
1.7
nV/√Hz
µV
V
fA /√Hz
0.0013%
0.004%
0.004%
0.03%
0.03%
25°C
2.18
2.18
MHz
25°C
1
1
MHz
1.5
1.5
2.6
2.6
25°C
50°
50°
25°C
10
10
25°C
25
C
µss
25°C
To 0.01%
POST OFFICE BOX 655303
UNIT
0.0013%
AV = 100
Gain margin
† Full range is 0°C to 70°C.
‡ Referenced to 0 V
MAX
• DALLAS, TEXAS 75265
dB
11
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless
otherwise noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage long-term
drift (see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage
TEST CONDITIONS
2500
VO = 0 V,
VO = ± 4 V
RL = 1 MΩ
µV
µV/mo
25°C
0.5
60
0.5
100
1
−5
to 4
60
−5.3
to 4.2
1
4.85
4.85
25°C
4.25
Full range
4.25
4.93
4.85
4.65
4.25
25°C
−4.85
Full range
−4.8
5
−4.85
25°C
−3.5
Full range
−3.5
25
V
4.65
−4.99
−4.1
−3.5
−4.91
V
−4.1
−3.5
50
25
50
25
V/mV
rid
Differential input resistance
25°C
300
1012
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop output impedance
f = 1 MHz,
AV = 10
25°C
130
130
Ω
CMRR Common-mode rejection ratio
VIC = − 5 V to 2.7 V,
VO = 0 V,
RS = 50 Ω
kSVR
Supply-voltage rejection ratio
(∆VDD ± /∆VIO)
VDD ± = ± 2.2 V to ± 8 V,
VIC = 0 V,
No load
IDD
Supply current
VO = 0 V,
No load
25°C
4.93
4.25
−4.8
−4.91
5
Full range
V
4.85
−4.99
25
pA
4.99
25°C
25°C
pA
−5.3
to 4.2
−5
to 3.5
4.99
25°C
60
100
−5
to 4
−5
to 3.5
60
100
100
Full range
IO = 500 µA
RL = 10 kΩ
1500
0.002
25°C
IO = − 5 mA
950
0.002
Full range
VIC = 0 V,
300
UNIT
25°C
|VIO | ≤ 5 mV
IO = 50 µA
MAX
µV/°C
25°C
IO = − 200 µA
TYP
2
25°C
RS = 50 Ω
Ω,
MIN
2
Full range
VIC = 0 V,
AVD
300
Full range
VIC = 0 V,
Large-signal differential
voltage amplification
MAX
3000
25°C
25
C
to 70°C
VIC = 0 V,
RS = 50 Ω
TLC2274AC
TYP
Full range
IO = − 1 mA
Maximum negative peak
VOM −
output voltage
TLC2274C
MIN
25°C
IO = − 20 µA
Maximum positive peak output
VOM +
voltage
TA†
25°C
75
Full range
75
25°C
80
Full range
80
25°C
Full range
80
75
300
1012
Ω
80
dB
75
95
80
95
dB
80
4.8
6
6
4.8
6
6
mA
† Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274C operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
TEST CONDITIONS
TLC2274C
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2274AC
MAX
MIN
TYP
2.3
3.6
Slew rate at unity
gain
VO = ± 2.3 V,
CL = 100 pF
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 Hz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = ± 2.3 V,
f = 20 kHz,
k
RL = 10 kΩ
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF
RL= 10 kΩ,
Maximum
output-swing
bandwidth
VO(PP) = 4.6 V,
RL = 10 kΩ,
AV = 1,
CL = 100 pF
Settling time
AV = − 1,
Step = − 2.3 V to 2.3 V,
RL = 10 kΩ,
CL = 100 pF
SR
BOM
ts
φm
Phase margin at
unity gain
RL = 10 kΩ,
RL = 10 kΩ,
AV = 1
AV = 10
V/µs
1.7
µV
V
fA /√Hz
0.0011%
0.004%
0.03%
0.03%
25°C
2.25
2.25
MHz
25°C
0.54
0.54
MHz
1.5
1.5
3.2
3.2
25°C
52°
52°
25°C
10
10
25°C
25
C
µss
25°C
To 0.01%
POST OFFICE BOX 655303
nV/√Hz
0.004%
To 0.1%
Gain margin
† Full range is 0°C to 70°C.
UNIT
0.0011%
AV = 100
CL = 100 pF
MAX
• DALLAS, TEXAS 75265
dB
13
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient
of input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
TLC2272I
TEST CONDITIONS
TA†
MIN
25°C
25°C
25
C
to 85°C
VDD ± = ± 2.5 V
RS = 50 Ω
Input offset current
VICR
Input bias current
Common-mode input
voltage
VOH
µV/°C
25°C
0.002
0.002
µV/mo
25°C
0.5
AVD
Low-level output
voltage
Large-signal differential
voltage amplification
0.5
60
Full range
800
800
1
60
1
150
150
Full range
800
800
0 to 4
IOL = 500 µA
0 to 4
0 to
3.5
25°C
IOL = 50 µA
−0.3
to 4.2
4.85
Full range
4.85
25°C
4.25
Full range
4.25
−0.3
to 4.2
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
25°C
0.01
25°C
0.09
Full range
0.01
0.15
0.09
0.15
25°C
pA
V
0 to
3.5
4.99
25°C
pA
60
−40°C to 85°C
Full range
VIC = 2.5 V,
60
150
IOH = − 200 µA
µV
2
|VIO | ≤ 5 mV
VIC = 2.5 V,
950
1500
UNIT
2
25°C
RS = 50 Ω
Ω,
300
MAX
150
IOH = − 1 mA
VOL
2500
TYP
−40°C to 85°C
IOH = − 20 µA
High-level output
voltage
300
MIN
3000
25°C
IIB
MAX
Full range
VIC = 0 V,
VO = 0 V,
TLC2272AI
TYP
0.9
0.15
1.5
0.9
VIC = 2.5 V,
IOL = 5 mA
RL = 10 kΩ‡
25°C
15
VIC = 2.5 V,
VO = 1 V to 4 V
Full range
15
RL = 1 mΩ‡
25°C
175
175
Full range
1.5
35
0.15
V
1.5
1.5
15
35
15
V/mV
rid
Differential input
resistance
25°C
1012
1012
Ω
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
140
140
Ω
CMRR
Common-mode
rejection ratio
VIC = 0 V to 2.7 V,
VO = 2.5 V,
RS = 50 Ω
kSVR
Supply-voltage
rejection ratio
(∆VDD /∆VIO)
VDD = 4.4 V to 16 V,
VIC = VDD /2,
No load
IDD
Supply current
VO = 2.5 V,
25°C
70
Full range
70
25°C
80
Full range
80
70
75
dB
70
95
80
95
dB
25°C
No load
75
Full range
80
2.2
3
3
2.2
3
3
mA
† Full range is − 40°C to 125°C.
‡ Referenced to 0 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272I operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST CONDITIONS
TLC2272I
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2272AI
MAX
MIN
TYP
2.3
3.6
MAX
UNIT
Slew rate at
unity gain
VO = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VNPP
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
VO = 0.5 V to 2.5 V,
f = 20 kHz,
k ‡
RL = 10 kΩ
0.0013%
0.0013%
THD + N
Total harmonic
distortion plus
noise
0.004%
0.004%
0.03%
0.03%
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF‡
25°C
2.18
2.18
MHz
Maximum outputswing bandwidth
VO(PP) = 2 V,
RL = 10 kΩ‡,
25°C
1
1
MHz
1.5
1.5
Settling time
AV = − 1,
Step = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
CL = 100 pF‡
2.6
2.6
25°C
50°
50°
25°C
10
10
SR
BOM
ts
φm
Phase margin at
unity gain
RL = 10 kΩ‡,
CL = 100 pF‡
AV = 1
AV = 10
AV = 100
RL = 10 kΩ‡,
AV = 1,
CL = 100 pF‡
25°C
25
C
V/µs
1.7
To 0.1%
CL = 100 pF‡
Gain margin
† Full range is − 40°C to 125°C.
‡ Referenced to 0 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
µV
V
fA√Hz
µss
25°C
To 0.01%
nV√Hz
dB
15
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272I electrical characteristics at specified free-air temperature, VDD ± = ±5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature
coefficient of input
offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
TLC2272I
TEST CONDITIONS
TA†
MIN
25°C
VICR
VO = 0 V,
Input bias current
RS = 50 Ω
Ω,
Maximum positive
peak output voltage
VIC = 0 V,
25°C
0.002
0.002
µV/mo
25°C
0.5
VOM −
Maximum negative
peak output voltage
VIC = 0 V,
VIC = 0 V,
AVD
Large-signal
differential voltage
amplification
VO = ± 4 V
IO = 500 µA
IO = 5 mA
RL = 10 kΩ
60
0.5
60
150
150
Full range
800
800
1
60
1
150
150
Full range
800
800
25°C
−5 to
4
Full range
−5 to
3.5
−5 to
4
4.85
Full range
4.85
25°C
4.25
Full range
4.25
25°C
− 4.85
Full range
− 4.85
25°C
− 3.5
Full range
− 3.5
25°C
25
Full range
25
pA
V
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
− 4.99
25°C
− 5.3
to 4.2
−5 to
3.5
4.99
25°C
RL = 1 mΩ
−5.3
to 4.2
pA
60
−40°C to 85°C
IO = 50 µA
µV
µV/°C
25°C
IO = − 1 mA
950
1500
UNIT
2
|VIO | ≤ 5 mV
IO = − 200 µA
300
MAX
−40°C to 85°C
IO = − 20 µA
VOM +
2500
TYP
2
25°C to 85°C
Input offset current
Common-mode
input voltage
300
MIN
3000
25°C
IIB
MAX
Full range
VIC = 0 V,
RS = 50 Ω
TLC2272AI
TYP
− 4.99
− 4.91
− 4.85
− 4.91
− 4.85
− 4.1
− 3.5
V
− 4.1
− 3.5
50
25
50
25
V/mV
25°C
300
300
rid
Differential input
resistance
25°C
1012
1012
Ω
ri
Common-mode
input resistance
25°C
1012
1012
Ω
ci
Common-mode
input capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
130
130
Ω
CMRR
Common-mode
rejection ratio
VIC = −5 V to 2.7 V,
VO = 0 V,
RS = 50 Ω
kSVR
Supply-voltage
rejection ratio
(∆VDD ± /∆VIO)
VDD = 4.4 V to 16 V,
VIC = VDD /2,
No load
IDD
Supply current
VO = 0 V,
25°C
75
Full range
75
25°C
80
Full range
80
75
80
dB
75
95
80
95
dB
25°C
No load
80
Full range
80
2.4
3
3
2.4
3
3
mA
† Full range is − 40°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272I operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
TEST CONDITIONS
TLC2272I
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2272AI
MAX
MIN
TYP
2.3
3.6
Slew rate at
unity gain
VO = ± 2.3 V,
CL = 100 pF
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VNPP
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = ± 2.3 V
RL = 10 kΩ,
f = 20 kHz
AV = 1
AV = 10
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF
RL = 10 kΩ,
Maximum
output-swing
bandwidth
VO(PP) = 4.6 V,
RL = 10 kΩ,
AV = 1,
CL = 100 pF
Settling time
AV = − 1,
Step = − 2.3 V to 2.3 V,
RL = 10 kΩ,
CL = 100 pF
SR
BOM
ts
φm
Phase margin at
unity gain
RL = 10 kΩ,
RL = 10 kΩ,
V/µs
1.7
µV
V
fA√Hz
0.0011%
0.004%
0.03%
0.03%
25°C
2.25
2.25
MHz
25°C
0.54
0.54
MHz
1.5
1.5
3.2
3.2
25°C
52°
52°
25°C
10
10
µss
25°C
To 0.01%
POST OFFICE BOX 655303
nV√Hz
0.004%
To 0.1%
Gain margin
† Full range is − 40°C to 125°C.
UNIT
0.0011%
25°C
25
C
AV = 100
CL = 100 pF
MAX
• DALLAS, TEXAS 75265
dB
17
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage
long-term drift (see Note 4)
IIO
TEST CONDITIONS
TA†
TLC2274I
MIN
25°C
VICR
VIC = 0 V,
RS = 50 Ω
Input bias current
RS = 50 Ω
Ω,
High-level output voltage
IOH = − 1 mA
VIC = 2.5 V,
VOL
AVD
Low-level output voltage
Large-signal differential
voltage amplification
VIC = 2.5 V,
IOL = 50 µA
IOL = 500 µA
VIC = 2.5 V,
IOL = 5 mA
VIC = 2.5 V,
VO = 1 V to 4 V
RL = 10 kΩ‡
MΩ‡
300
950
1500
UNIT
µV
µV/°C
25°C
0.002
0.002
µV/mo
25°C
0.5
60
0.5
60
−40°C to 85°C
150
150
Full range
800
800
1
60
1
150
150
Full range
800
800
25°C
0 to
4
Full range
0 to
3.5
−0.3
to 4.2
0 to
4
25°C
4.85
Full range
4.85
25°C
4.25
Full range
4.25
V
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
25°C
0.01
25°C
0.09
Full range
0.01
0.15
0.09
0.15
25°C
0.9
Full range
25°C
15
15
35
0.15
0.15
1.5
0.9
1.5
Full range
pA
−0.3
to 4.2
0 to
3.5
4.99
pA
60
−40°C to 85°C
25°C
IOH = − 200 µA
MAX
2
|VIO | ≤ 5 mV
IOH = − 20 µA
VOH
2500
TYP
2
25°C to 85°C
Input offset current
Common-mode input
voltage
300
MIN
3000
25°C
IIB
MAX
Full range
VDD ± = ± 2.5 V,
VO = 0 V,
TLC2274AI
TYP
V
1.5
1.5
15
35
15
V/mV
25°C
175
175
rid
Differential input resistance
25°C
1012
1012
Ω
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
140
140
Ω
CMRR
Common-mode rejection
ratio
VIC = 0 V to 2.7 V,
VO = 2.5 V,
RS = 50 Ω
kSVR
Supply-voltage rejection
ratio (∆VDD /∆VIO)
VDD = 4.4 V to 16 V,
VIC = VDD /2,
No load
IDD
Supply current
VO = 2.5 V,
RL = 1
No load
25°C
70
Full range
70
25°C
80
Full range
80
25°C
Full range
75
70
75
dB
70
95
80
95
dB
80
4.4
6
6
4.4
6
6
mA
† Full range is − 40°C to 125°C.
‡ Referenced to 0 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
18
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274I operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST CONDITIONS
TLC2274I
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2274AI
MAX
MIN
TYP
2.3
3.6
Slew rate at unity
gain
VO = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
CL = 100 pF‡
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus noise
SR
BOM
ts
φm
VO = 0.5 V to 2.5 V,
f = 20 kHz,
k ‡
RL = 10 kΩ
AV = 100
RL = 10 kΩ‡,
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF‡
Maximum
output-swing
bandwidth
VO(PP) = 2 V,
RL = 10 kΩ‡,
Settling time
AV = − 1,
Step = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
CL = 100 pF‡
Phase margin at
unity gain
RL = 10 kΩ‡,
AV = 1
AV = 10
AV = 1,
CL = 100 pF‡
V/µs
µV
V
fA /√Hz
0.0013%
0.004%
0.004%
0.03%
0.03%
25°C
2.18
2.18
MHz
25°C
1
1
MHz
1.5
1.5
2.6
2.6
25°C
50°
50°
25°C
10
10
25°C
25
C
To 0.01%
POST OFFICE BOX 655303
nV/√Hz
0.0013%
µss
25°C
Gain margin
† Full range is − 40°C to 125°C.
‡ Referenced to 0 V
UNIT
1.7
To 0.1%
CL = 100 pF‡
MAX
• DALLAS, TEXAS 75265
dB
19
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274I electrical characteristics at specified free-air temperature, VDD ± = ±5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage
long-term drift (see Note 4)
IIO
TA†
TEST CONDITIONS
TLC2274I
MIN
25°C
VICR
VO = 0 V,
Input bias current
RS = 50 Ω
Ω,
Maximum positive peak
output voltage
VOM −
Maximum negative peak
output voltage
IO = 500 µA
VIC = 0 V,
IO = 5 mA
VIC = 0 V,
RL = 10 kΩ
1500
µV
25°C
0.002
0.002
µV/mo
25°C
0.5
60
0.5
60
150
150
Full range
800
800
1
60
1
150
150
Full range
800
800
25°C
−5 to
4
Full range
−5 to
3.5
−5.3
to 4.2
−5 to
4
25°C
4.85
Full range
4.85
25°C
4.25
Full range
4.25
25°C
− 4.85
Full range
− 4.85
25°C
− 3.5
Full range
− 3.5
25°C
25
Full range
25
pA
V
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
− 4.99
25°C
−5.3
to 4.2
−5 to
3.5
4.99
pA
60
−40°C to 85°C
IO = 50 µA
VIC = 0 V,
950
µV/°C
25°C
IO = − 1 mA
300
UNIT
2
VIO | ≤ 5 mV
IO = − 200 µA
MAX
−40°C to 85°C
IO = − 20 µA
VOM +
2500
TYP
2
25°C to 85°C
Input offset current
Common-mode input
voltage
300
MIN
3000
25°C
IIB
MAX
Full range
VIC = 0 V,
RS = 50 Ω
TLC2274AI
TYP
− 4.99
− 4.91
− 4.85
− 4.91
− 4.85
− 4.1
− 3.5
V
− 4.1
− 3.5
50
25
50
AVD
Large-signal differential
voltage amplification
25°C
300
300
rid
Differential input resistance
25°C
1012
1012
Ω
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
130
130
Ω
CMRR
Common-mode rejection
ratio
VIC = − 5 V to 2.7 V,
VO = 0 V,
RS = 50 Ω
kSVR
Supply-voltage rejection
ratio (∆VDD ± /∆VIO)
VDD ± = ± 2.2 V to ± 8 V,
VIC = 0 V,
No load
IDD
Supply current
VO = 0 V,
VO = ± 4 V
RL = 1 MΩ
No load
25°C
75
Full range
75
25°C
80
Full range
80
25°C
Full range
25
80
75
V/mV
80
dB
75
95
80
95
dB
80
4.8
6
6
4.8
6
6
mA
† Full range is − 40°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274I operating characteristics at specified free-air temperature, VDD ± = ±5 V
PARAMETER
TEST CONDITIONS
TLC2274I
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2274AI
MAX
MIN
TYP
2.3
3.6
Slew rate at unity
gain
VO = ± 2.3 V,
CL = 100 pF
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = ± 2.3 V,
RL = 10 kΩ,
f = 20 kHz
AV = 1
AV = 10
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF
RL = 10 kΩ,
Maximum outputswing bandwidth
VO(PP) = 4.6 V,
RL = 10 kΩ,
AV = 1,
CL = 100 pF
Settling time
AV = − 1,
Step = − 2.3 V to 2.3 V,
RL = 10 kΩ,
CL = 100 pF
SR
BOM
ts
φm
Phase margin at
unity gain
RL = 10 kΩ,
RL = 10 kΩ,
V/µs
1.7
µV
V
fA/√Hz
0.0011%
0.004%
0.03%
0.03%
25°C
2.25
2.25
MHz
25°C
0.54
0.54
MHz
1.5
1.5
3.2
3.2
25°C
52°
52°
25°C
10
10
25°C
25
C
µss
25°C
To 0.01%
POST OFFICE BOX 655303
nV/√Hz
0.004%
To 0.1%
Gain margin
† Full range is − 40°C to 125°C.
UNIT
0.0011%
AV = 100
CL = 100 pF
MAX
• DALLAS, TEXAS 75265
dB
21
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272Q and TLC2272M electrical characteristics at specified free-air temperature, VDD = 5 V
(unless otherwise noted)
PARAMETER
TLC2272Q,
TLC2272M
TA†
TEST CONDITIONS
MIN
VIO
Input offset voltage
αVIO
Temperature coefficient
of input offset voltage
Input offset voltage longterm drift (see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage
25°C
High-level output
voltage
VDD ± = ± 2.5 V,
RS = 50 Ω
VIC = 2.5 V,
Large-signal
differential voltage
amplification
IOL = 5 mA
RL = 10 kΩ‡
VIC = 2.5 V,
VO = 1 V to 4 V
RL = 1 mΩ‡
µV
0.002
0.002
µV/mo
25°C
0.5
60
0.5
800
1
0
to 4
60
−0.3
to 4.2
1
4.85
Full range
4.85
25°C
4.25
Full range
4.25
−0.3
to 4.2
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
0.01
25°C
0.09
Full range
0.01
0.15
0.09
0.15
0.9
Full range
10
1.5
Full range
10
35
0.15
0.15
0.9
1.5
25°C
pA
4.99
4.93
25°C
25°C
pA
V
0
to 3.5
4.99
25°C
60
800
0
to 4
0
to 3.5
60
800
800
25°C
IOL = 500 µA
950
1500
25°C
Full range
IOL = 50 µA
300
UNIT
MAX
µV/°C
|VIO | ≤ 5 mV
IOH = − 200 µA
TYP
2
25°C
RS = 50 Ω
Ω,
MIN
2
25°C
VIC = 2.5 V,
AVD
2500
Full range
VIC = 2.5 V,
Low-level output voltage
300
Full range
IOH = − 1 mA
VOL
MAX
3000
25°C
25
C
to 125°C
IOH = − 20 µA
VOH
TYP
Full range
VIC = 0 V,
VO = 0 V,
TLC2272AQ,
TLC2272AM
V
1.5
1.5
10
35
10
V/mV
25°C
175
175
rid
Differential input
resistance
25°C
1012
1012
Ω
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
140
140
Ω
CMRR
Common-mode rejection
ratio
VIC = 0 V to 2.7 V,
VO = 2.5 V,
RS = 50 Ω
25°C
70
Full range
70
kSVR
Supply-voltage rejection
ratio (∆VDD /∆VIO)
VDD = 4.4 V to 16 V,
VIC = VDD /2,
No load
25°C
80
Full range
80
IDD
Supply current
VO = 2.5 V,
25°C
No load
Full range
75
70
75
dB
70
95
80
95
dB
80
2.2
3
3
2.2
3
3
mA
† Full range is − 40°C to 125°C for Q level part, − 55°C to 125°C for M level part.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272Q and TLC2272M operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST CONDITIONS
TLC2272Q,
TLC2272M
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2272AQ,
TLC2272AM
MAX
MIN
TYP
2.3
3.6
Slew rate at
unity gain
VO = 1.25 V to 2.75 V,
RL = 10 kΩ‡,
CL = 100 pF‡
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VNPP
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = 0.5 V to 2.5 V,
f = 20 kHz,
RL = 10 kΩ
k ‡,
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF‡
RL = 10 kΩ‡,
Maximum outputswing bandwidth
VO(PP) = 2 V,
RL = 10 kΩ‡,
AV = 1,
CL = 100 pF‡
Settling time
AV = − 1,
Step = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
CL = 100 pF‡
SR
BOM
ts
φm
Phase margin at
unity gain
RL = 10 kΩ‡,
AV = 1
AV = 10
V/µs
1.7
µV
V
fA/√Hz
0.0013%
0.004%
0.004%
0.03%
0.03%
25°C
2.18
2.18
MHz
25°C
1
1
MHz
1.5
1.5
2.6
2.6
50°
50°
10
10
To 0.1%
µss
25°C
To 0.01%
25°C
Gain margin
25°C
† Full range is − 40°C to 125°C for Q level part, − 55°C to 125°C for M level part.
‡ Referenced to 2.5 V
POST OFFICE BOX 655303
nV/√Hz
0.0013%
25°C
25
C
AV = 100
CL = 100 pF‡
UNIT
MAX
• DALLAS, TEXAS 75265
dB
23
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272Q and TLC2272M electrical characteristics at specified free-air temperature, VDD ± = ±5 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA†
TLC2272Q,
TLC2272M
MIN
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage
25°C
VO = 0 V,
VIC = 0 V,
VO = ± 4 V
IO = 5 mA
RL = 10 kΩ
RL = 1 mΩ
µV
0.002
0.002
µV/mo
25°C
0.5
60
0.5
800
1
−5
to 4
60
−5.3
to 4.2
1
4.85
Full range
4.85
25°C
4.25
Full range
4.25
25°C
−4.85
Full range
−4.85
25°C
−3.5
Full range
−3.5
25°C
20
Full range
20
25°C
pA
pA
V
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
−4.99
25°C
−5.3
to 4.2
−5
to 3.5
4.99
25°C
60
800
−5
to 4
−5
to 3.5
60
800
800
25°C
IO = 500 µA
950
1500
25°C
Full range
IO = 50 µA
300
UNIT
MAX
µV/°C
|VIO | ≤ 5 mV
IO = − 200 µA
TYP
2
25°C
25
C
RS = 50 Ω
Ω,,
MIN
2
25°C
VIC = 0 V,
AVD
2500
Full range
VIC = 0 V,
Large-signal differential
voltage amplification
300
Full range
IO = − 1 mA
Maximum negative peak
VOM −
output voltage
MAX
3000
25°C
25
C
to 125°C
IO = − 20 µA
Maximum positive peak
VOM +
output voltage
TYP
Full range
VIC = 0 V,
RS = 50 Ω
TLC2272AQ,
TLC2272AM
−4.99
−4.91
−4.85
−4.91
−4.85
−4.1
−3.5
V
−4.1
−3.5
50
20
50
20
V/mV
rid
Differential input resistance
25°C
300
1012
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
P package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
130
130
Ω
CMRR
Common-mode rejection
ratio
VIC = − 5 V to 2.7 V,
VO = 0 V,
RS = 50 Ω
25°C
75
Full range
75
kSVR
Supply-voltage rejection
ratio (∆VDD ± /∆VIO)
VDD = ± 2.2 V to ± 8 V,
VIC = 0 V,
No load
25°C
80
Full range
80
IDD
Supply current
VO = 2.5 V,
Full range
25°C
No load
80
75
300
1012
Ω
80
dB
75
95
80
95
dB
80
2.4
3
3
2.4
3
3
mA
† Full range is − 40°C to 125°C for Q level part, − 55°C to 125°C for M level part.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2272Q and TLC2272M operating characteristics at specified free-air temperature,
VDD± = ±5 V
PARAMETER
TEST CONDITIONS
TLC2272Q,
TLC2272M
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2272AQ,
TLC2272AM
MAX
MIN
TYP
2.3
3.6
Slew rate at
unity gain
VO = ± 1 V,
CL = 100 pF
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VNPP
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = ± 2.3 V
RL = 10 kΩ,
f = 20 kHz
AV = 1
AV = 10
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF
RL = 10 kΩ,
Maximum
output-swing
bandwidth
VO(PP) = 4.6 V,
RL = 10 kΩ,
AV = 1,
CL = 100 pF
Settling time
AV = − 1,
Step = − 2.3 V to 2.3 V,
RL = 10 kΩ,
CL = 100 pF
SR
BOM
ts
φm
Phase margin at
unity gain
RL = 10 kΩ,
RL = 10 kΩ,
V/µs
1.7
µV
V
fA/√Hz
0.0011%
0.004%
0.004%
0.03%
0.03%
25°C
2.25
2.25
MHz
25°C
0.54
0.54
MHz
1.5
1.5
3.2
3.2
52°
52°
10
10
To 0.1%
µss
25°C
To 0.01%
25°C
Gain margin
25°C
† Full range is − 40°C to 125°C for Q level part, − 55°C to 125°C for M level part.
POST OFFICE BOX 655303
nV/√Hz
0.0011%
25°C
25
C
AV = 100
CL = 100 pF
UNIT
MAX
• DALLAS, TEXAS 75265
dB
25
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274Q and TLC2274M electrical characteristics at specified free-air temperature, VDD = 5 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA†
TLC2274Q,
TLC2274M
MIN
VIO
Input offset voltage
αVIO
Temperature coefficient
of input offset voltage
Input offset voltage
long-term drift
(see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage
25°C
High-level output
voltage
VIC = 0 V,
RS = 50 Ω
RS = 50 Ω
Ω,,
VIC = 2.5 V,
IOL = 500 µA
Large-signal differential
voltage amplification
VIC = 2.5 V,
VO = 1 V to 4 V
950
1500
µV
25°C
0.002
0.002
µV/mo
25°C
0.5
60
0.5
800
1
25°C
25
C
0
to 4
60
Full range
0 to
3.5
−0.3
to 4.2
1
4.85
Full range
4.85
25°C
4.25
Full range
4.25
0
to 4
−0.3
to 4.2
pA
pA
V
0 to
3.5
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
25°C
0.01
25°C
0.09
0.01
0.15
0.09
0.15
25°C
60
800
4.99
25°C
60
800
800
Full range
IOL = 5 mA
300
UNIT
MAX
µV/°C
25°C
IOL = 50 µA
TYP
2
|VIO | ≤ 5 mV
IOH = − 200 µA
MIN
2
25°C
VIC = 2.5 V,
AVD
2500
Full range
VIC = 2.5 V,
Low-level output
voltage
300
Full range
IOH = − 1 mA
VOL
MAX
3000
25°C
25
C
to 125°C
IOH = − 20 µA
VOH
TYP
Full range
VDD ± = ± 2.5 V,
VO = 0 V,
TLC2274AQ,
TLC2274AM
0.9
Full range
0.15
1.5
0.9
1.5
35
0.15
V
1.5
1.5
RL = 10 kΩ‡
25°C
10
10
35
Full range
10
RL = 1 MΩ‡
25°C
175
175
10
V/mV
rid
Differential input
resistance
25°C
1012
1012
Ω
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
140
140
Ω
CMRR
Common-mode
rejection ratio
VIC = 0 V to 2.7 V,
VO = 2.5 V,
RS = 50 Ω
25°C
70
Full range
70
kSVR
Supply-voltage rejection
ratio (∆VDD /∆VIO)
VDD = 4.4 V to 16 V,
VIC = VDD /2,
No load
25°C
80
Full range
80
IDD
Supply current
VO = 2.5 V,
Full range
25°C
No load
75
70
75
dB
70
95
80
95
dB
80
4.4
6
6
4.4
6
6
mA
† Full range is − 40°C to 125°C for Q level part, − 55°C to 125°C for M level part.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
26
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274Q and TLC2274M operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST CONDITIONS
CL = 100 pF‡
TLC2274Q,
TLC2274M
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2274AQ,
TLC2274AM
MAX
MIN
TYP
2.3
3.6
Slew rate at unity
gain
VO = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = 0.5 V to 2.5 V,
f = 20 kHz,
RL = 10 kΩ
k ‡
AV = 1
AV = 10
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF‡
RL = 10 kΩ‡,
Maximum output-swing bandwidth
VO(PP) = 2 V,
RL = 10 kΩ‡,
AV = 1,
CL = 100 pF‡
Settling time
AV = − 1,
Step = 0.5 V to 2.5 V,
RL = 10 kΩ‡,
CL = 100 pF‡
SR
BOM
ts
φm
Phase margin at
unity gain
RL = 10 kΩ‡,
V/µs
1.7
µV
V
fA /√Hz
0.0013%
0.004%
0.004%
0.03%
0.03%
25°C
2.18
2.18
MHz
25°C
1
1
MHz
1.5
1.5
2.6
2.6
50°
50°
10
10
To 0.1%
µss
25°C
To 0.01%
25°C
Gain margin
25°C
† Full range is − 40°C to 125°C for Q level part, − 55°C to 125°C for M level part.
‡ Referenced to 2.5 V
POST OFFICE BOX 655303
nV/√Hz
0.0013%
25°C
25
C
AV = 100
CL = 100 pF‡
UNIT
MAX
• DALLAS, TEXAS 75265
dB
27
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274Q and TLC2274M electrical characteristics at specified free-air temperature, VDD ± = ±5 V
(unless otherwise noted)
PARAMETER
TA†
TEST CONDITIONS
TLC2274Q,
TLC2274M
MIN
25°C
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
Input offset voltage longterm drift (see Note 4)
IIO
Input offset current
IIB
Input bias current
VICR
Common-mode input
voltage
25°C
25
C
to 125°C
VO = 0 V,
RS = 50 Ω
Ω,,
VIC = 0 V,
VIC = 0 V,
VO = ± 4 V
950
1500
V
µV
25°C
0.002
0.002
µV/mo
25°C
0.5
60
0.5
800
1
−5
to 4
60
−5.3
to 4.2
1
4.85
Full range
4.85
25°C
4.25
Full range
4.25
25°C
−4.85
Full range
−4.85
IO = 5 mA
25°C
−3.5
Full range
−3.5
25°C
20
RL = 10 kΩ
Full range
20
RL = 1 MΩ
25°C
pA
V
4.99
4.93
4.85
4.93
4.85
4.65
4.25
V
4.65
4.25
−4.99
25°C
−5.3
to 4.2
−5
to 3.5
4.99
25°C
pA
60
800
−5
to 4
−5
to 3.5
60
800
800
25°C
A
IO = 500 µA
300
UNIT
MAX
µV/°C
V/°C
Full range
IO = 50 µA
TYP
2
|VIO | ≤ 5 mV
IO = − 200 µA
A
MIN
2
25°C
VIC = 0 V,
Large-signal differential
voltage amplification
2500
Full range
IO = − 1 mA
AVD
300
Full range
IO = − 20 µA
Maximum negative peak
VOM −
output voltage
MAX
3000
25°C
Maximum positive peak
VOM +
output voltage
TYP
Full range
VIC = 0 V,
RS = 50 Ω
TLC2274AQ,
TLC2274AM
−4.99
−4.91
−4.85
−4.91
−4.85
−4.1
−3.5
V
−4.1
−3.5
50
20
50
20
V/mV
rid
Differential input resistance
25°C
300
1012
ri
Common-mode input
resistance
25°C
1012
1012
Ω
ci
Common-mode input
capacitance
f = 10 kHz,
N package
25°C
8
8
pF
zo
Closed-loop output
impedance
f = 1 MHz,
AV = 10
25°C
130
130
Ω
Common-mode rejection
ratio
VIC = − 5 V to 2.7 V
VO = 0 V,
RS = 50 Ω
25°C
75
CMRR
Full range
75
Supply-voltage rejection
ratio (∆VDD ± /∆VIO)
VDD ± = ± 2.2 V to ± 8 V,
VIC = 0 V,
No load
25°C
80
kSVR
Full range
80
IDD
Supply current
VO = 0 V,
No load
25°C
Full range
80
75
300
1012
Ω
80
dB
75
95
80
95
dB
80
4.8
6
6
4.8
6
6
mA
† Full range is − 40°C to 125°C for Q level part, − 55°C to 125°C for M level part.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
28
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TLC2274Q and TLC2274M operating characteristics at specified free-air temperature,
VDD± = ±5 V
PARAMETER
TEST CONDITIONS
TLC2274Q,
TLC2274M
TA†
MIN
TYP
25°C
2.3
3.6
Full
range
1.7
TLC2274AQ,
TLC2274AM
MAX
MIN
TYP
2.3
3.6
Slew rate at unity
gain
VO = ± 2.3 V,
CL = 100 pF
Equivalent input
noise voltage
f = 10 Hz
25°C
50
50
Vn
f = 1 kHz
25°C
9
9
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
25°C
1
1
VN(PP)
f = 0.1 Hz to 10 Hz
25°C
1.4
1.4
In
Equivalent input
noise current
25°C
0.6
0.6
THD + N
Total harmonic
distortion plus
noise
VO = ± 2.3 V,
RL = 10 kΩ,
f = 20 kHz
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF
RL = 10 kΩ,
Maximum
output-swing
bandwidth
VO(PP) = 4.6 V,
RL = 10 kΩ,
AV = 1,
CL = 100 pF
Settling time
AV = − 1,
To 0.1%
Step = − 2.3 V to 2.3 V,
RL = 10 kΩ,
To 0.01%
CL = 100 pF
SR
BOM
ts
φm
Phase margin at
unit gain
RL = 10 kΩ,
RL = 10 kΩ,
AV = 1
AV = 10
V/µs
1.7
µV
V
fA /√Hz
0.0011%
0.004%
0.004%
0.03%
0.03%
25°C
2.25
2.25
MHz
25°C
0.54
0.54
MHz
1.5
1.5
3.2
3.2
52°
52°
10
10
µss
25°C
25°C
Gain margin
25°C
† Full range is − 40°C to 125°C for Q level part, − 55°C to 125°C for M level part.
POST OFFICE BOX 655303
nV/√Hz
0.0011%
25°C
25
C
AV = 100
CL = 100 pF
UNIT
MAX
• DALLAS, TEXAS 75265
dB
29
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO
Input offset voltage
Distribution
vs Common-mode voltage
αVIO
IIB /IIO
Input offset voltage temperature coefficient
Distribution
Input bias and input offset current
vs Free-air temperature
11
VI
Input voltage
vs Supply voltage
vs Free-air temperature
12
13
VOH
VOL
High-level output voltage
vs High-level output current
14
Low-level output voltage
vs Low-level output current
15, 16
VOM +
VOM −
Maximum positive peak output voltage
vs Output current
17
Maximum negative peak output voltage
vs Output current
18
VO(PP)
Maximum peak-to-peak output voltage
vs Frequency
19
IOS
Short-circuit output current
vs Supply voltage
vs Free-air temperature
20
21
VO
Output voltage
vs Differential input voltage
Large-signal differential voltage amplification
vs Load resistance
Large-signal differential voltage amplification
and phase margin
vs Frequency
25, 26
AVD
7 − 10
22, 23
24
Large-signal differential voltage amplification
vs Free-air temperature
27, 28
zo
Output impedance
vs Frequency
29, 30
CMRR
Common-mode rejection ratio
vs Frequency
vs Free-air temperature
31
32
kSVR
Supply-voltage rejection ratio
vs Frequency
vs Free-air temperature
33, 34
35
IDD
Supply current
vs Supply voltage
vs Free-air temperature
36, 37
38, 39
SR
Slew rate
vs Load capacitance
vs Free-air temperature
40
41
VO
Vn
Inverting large-signal pulse response
42, 43
Voltage-follower large-signal pulse response
44, 45
Inverting small-signal pulse response
46, 47
Voltage-follower small-signal pulse response
48, 49
Equivalent input noise voltage
vs Frequency
Noise voltage over a 10-second period
THD + N
φm
50, 51
52
Integrated noise voltage
vs Frequency
53
Total harmonic distortion plus noise
vs Frequency
54
Gain-bandwidth product
vs Supply voltage
vs Free-air temperature
55
56
Phase margin
vs Load capacitance
57
Gain margin
vs Load capacitance
58
NOTE: For all graphs where VDD = 5 V, all loads are referenced to 2.5 V.
30
1−4
5, 6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC2272
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC2272
INPUT OFFSET VOLTAGE
15
20
891 Amplifiers From
2 Wafer Lots
VDD = ± 2.5 V
TA = 25°C
Percentage of Amplifiers − %
Percentage of Amplifiers − %
20
10
5
0
−1.6 −1.2 −0.8 −0.4
0
0.4
0.8
1.2
15
891 Amplifiers From
2 Wafer Lots
VDD = ± 5 V
TA = 25°C
10
5
0
−1.6 −1.2 −0.8 −0.4
1.6
0.4
0.8
1.2
1.6
VIO − Input Offset Voltage − mV
VIO − Input Offset Voltage − mV
Figure 1
Figure 2
DISTRIBUTION OF TLC2274
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC2274
INPUT OFFSET VOLTAGE
20
20
992 Amplifiers From
2 Wafer Lots
VDD = ± 5 V
Percentage of Amplifiers − %
992 Amplifiers From
2 Wafer Lots
VDD = ± 2.5 V
Percentage of Amplifiers − %
0
15
10
5
0
−1.6 −1.2 −0.8
−0.4
0
0.4
0.8
1.2
1.6
15
10
5
0
−1.6 −1.2 −0.8
VIO − Input Offset Voltage − mV
−0.4
0
0.4
0.8
1.2
1.6
VIO − Input Offset Voltage − mV
Figure 3
Figure 4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
31
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
INPUT OFFSET VOLTAGE
vs
COMMON-MODE VOLTAGE
INPUT OFFSET VOLTAGE
vs
COMMON-MODE VOLTAGE
1
VDD = 5 V
TA = 25°C
RS = 50 Ω
VIO − Input Offset Voltage − mV
VIO
VIO
VIO − Input Offset Voltage − mV
1
0.5
0
−0.5
−1
−1
0
2
1
3
0.5
0
−0.5
−1
−6 −5 −4 −3 −2
5
4
VDD = ± 5 V
TA = 25°C
RS = 50 Ω
VIC − Common-Mode Voltage − V
1
2
3
4
DISTRIBUTION OF TLC2272
vs
INPUT OFFSET VOLTAGE TEMPERATURE
COEFFICIENT†
25
25
Percentage of Amplifiers − %
128 Amplifiers From
2 Wafer Lots
VDD = ± 2.5 V
P Package
25°C to 125°C
15
10
20
128 Amplifiers From
2 Wafer Lots
VDD = ± 5 V
P Package
25°C to 125°C
15
10
5
5
0
−5 −4
0
−5 −4
−3
−2
−1
0
1
2
3
4
5
αVIO − Temperature Coefficient − µV/°C
−3
−2
−1
0
1
2
3
4
αVIO − Temperature Coefficient − µV/°C
Figure 7
Figure 8
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
32
5
Figure 6
DISTRIBUTION OF TLC2272
vs
INPUT OFFSET VOLTAGE TEMPERATURE
COEFFICIENT†
Percentage of Amplifiers − %
0
VIC − Common-Mode Voltage − V
Figure 5
20
−1
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
25
25
128 Amplifiers From
2 Wafer Lots
VDD = ± 2.5 V
N Package
TA = 25°C to 125°C
20
Percentage of Amplifiers − %
Percentage of Amplifiers − %
DISTRIBUTION OF TLC2274
vs
INPUT OFFSET VOLTAGE TEMPERATURE
COEFFICIENT†
DISTRIBUTION OF TLC2274
vs
INPUT OFFSET VOLTAGE TEMPERATURE
COEFFICIENT†
15
10
5
0
−5
128 Amplifiers From
2 Wafer Lots
VDD = ± 2.5 V
N Package
TA = 25°C to 125°C
20
15
10
5
0
−4
−3
−2
−1
0
2
1
3
4
−5
5
−4
−3
Figure 9
2
3
4
5
Figure 10
INPUT BIAS AND INPUT OFFSET CURRENT†
vs
FREE-AIR TEMPERATURE
INPUT VOLTAGE
vs
SUPPLY VOLTAGE
35
12
VDD = ± 2.5 V
VIC = 0 V
VO = 0 V
RS = 50 Ω
TA = 25°C
RS = 50 Ω
10
8
6
25
20
IIB
15
IIO
10
V I − Input Voltage − V
IIB
I IO − Input Bias and Input Offset Currents − pA
IIB and IIO
1
αVIO − Temperature Coefficient − µV/°C
αVIO − Temperature Coefficient − µV/°C
30
−1 0
−2
4
2
|VIO| ≤ 5 mV
0
−2
−4
−6
5
−8
0
− 10
25
45
65
85
105
125
2
TA − Free-Air Temperature − °C
3
4
5
6
7
8
|VDD ±| − Supply Voltage − V
Figure 11
Figure 12
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
33
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
INPUT VOLTAGE†
vs
FREE-AIR TEMPERATURE
HIGH-LEVEL OUTPUT VOLTAGE†
vs
HIGH-LEVEL OUTPUT CURRENT
5
6
VDD = 5 V
V0H
V
OH − High-Level Output Voltage − V
VDD = 5 V
V I − Input Voltage − V
4
3
|VIO| ≤ 5 mV
2
1
0
−1
−75 − 50
5
4
TA = 125°C
3
TA = 25°C
2
TA = − 55°C
1
0
− 25
0
25
50
75
100
125
0
TA − Free-Air Temperature − °C
1
Figure 13
1.4
VOL
VOL − Low-Level Output Voltage − V
VDD = 5 V
TA = 25°C
1
VIC = 0 V
0.8
VIC = 1.25 V
0.6
VIC = 2.5 V
0.2
0
VDD = 5 V
VIC = 2.5 V
1.2
1
TA = 125°C
0.8
TA = 25°C
0.6
TA = − 55°C
0.4
0.2
0
0
1
2
3
4
IOL − Low-Level Output Current − mA
5
0
5
1
2
3
4
IOL − Low-Level Output Current − mA
Figure 15
Figure 16
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
34
4
LOW-LEVEL OUTPUT VOLTAGE†
vs
LOW-LEVEL OUTPUT CURRENT
1.2
VOL
VOL − Low-Level Output Voltage − V
3
Figure 14
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
0.4
2
IOH − High-Level Output Current − mA
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 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
5
VDD ± = ± 5 V
4
TA = − 55°C
TA = 25°C
3
TA = 125°C
2
1
0
1
2
3
4
5
MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE†
vs
OUTPUT CURRENT
V OM − − Maximum Negative Peak Output Voltage − V
V OM + − Maximum Positive Peak Output Voltage − V
MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE†
vs
OUTPUT CURRENT
−3.8
VDD = ± 5 V
VIC = 0 V
−4
TA = 125°C
−4.2
TA = 25°C
−4.4
TA = − 55°C
−4.6
−4.8
−5
0
1
|IO| − Output Current − mA
2
6
SHORT-CIRCUIT OUTPUT CURRENT
vs
SUPPLY VOLTAGE
10
16
RL = 10 kΩ
TA = 25°C
9
IIOS
OS − Short-Circuit Output Current − mA
V(OPP)
V O(PP) − Maximum Peak-to-Peak Output Voltage − V
5
Figure 18
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
8
7
6
VDD = 5 V
4
VDD = ± 5 V
3
2
1
VID = − 100 mV
12
8
4
0
VID = 100 mV
−4
VO = 0 V
TA = 25°C
−8
0
10 k
4
IO − Output Current − mA
Figure 17
5
3
100 k
1M
10 M
2
f − Frequency − Hz
3
4
5
6
7
8
|VDD ±| − Supply Voltage − V
Figure 19
Figure 20
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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35
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT†
vs
FREE-AIR TEMPERATURE
IIOS
OS − Short-Circuit Output Current − mA
15
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
5
VO = 0 V
VDD = ± 5 V
VID = − 100 mV
11
VO − Output Voltage − V
4
7
−3
VDD = 5 V
TA = 25°C
RL = 10 kΩ
VIC = 2.5 V
3
2
−1
VID = 100 mV
1
−5
−75
−50
−25
0
25
50
75 100
TA − Free-Air Temperature − °C
0
−800
125
800
−400
0
400
VID − Differential Input Voltage − µV
Figure 21
Figure 22
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
LOAD RESISTANCE
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
VO − Output Voltage − V
3
1000
VDD = ± 5 V
TA = 25°C
RL = 10 kΩ
VIC = 0 V
VO = ± 1 V
TA = 25°C
AVD
AVD− Large-Signal Differential
Voltage Amplification − dB
5
1
ÁÁ
ÁÁ
ÁÁ
−1
−3
−5
0
250 500 750 1000
−1000 −750 −500 −250
VID − Differential Input Voltage − µV
100
VDD = ± 5 V
10
VDD = 5 V
1
0.1
0.1
Figure 23
1
10
RL − Load Resistance − kΩ
Figure 24
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
36
1200
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100
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
135°
40
90°
20
45°
0
0°
−20
φom
m − Phase Margin
AVD
AVD− Large-Signal Differential
Voltage Amplification − dB
60
ÁÁ
ÁÁ
ÁÁ
180°
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
−45°
−40
1k
10 k
100 k
1M
−90°
10 M
f − Frequency − Hz
Figure 25
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
VDD = ± 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AVD
AVD− Large-Signal Differential
Voltage Amplification − dB
60
ÁÁ
ÁÁ
ÁÁ
180°
135°
40
90°
20
45°
0°
0
−20
−45°
−40
1k
φom
m − Phase Margin
80
10 k
100 k
1M
f − Frequency − Hz
−90°
10 M
Figure 26
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37
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION†
vs
FREE-AIR TEMPERATURE
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION†
vs
FREE-AIR TEMPERATURE
1k
VDD = ± 5 V
VIC = 0 V
VO = ± 4 V
VDD = 5 V
VIC = 2.5 V
VO = 1 V to 4 V
AVD
AVD− Large-Signal Differential
Voltage Amplification − V/mV
AVD
AVD− Large-Signal Differential
Voltage Amplification − V/mV
1k
RL = 1 MΩ
100
ÁÁ
ÁÁ
−50
100
ÁÁ
ÁÁ
RL = 10 kΩ
10
−75
RL = 1 MΩ
−25
0
25
50
75 100
TA − Free-Air Temperature − °C
RL = 10 kΩ
10
−75
125
−50
−25
0
25
50
75 100
TA − Free-Air Temperature − °C
Figure 27
Figure 28
OUTPUT IMPEDANCE
vs
FREQUENCY
OUTPUT IMPEDANCE
vs
FREQUENCY
1000
1000
VDD = ± 5 V
TA = 25°C
100
zo
O
zo − Output Impedance − Ω
zo
O
zo − Output Impedance − Ω
VDD = 5 V
TA = 25°C
AV = 100
10
AV = 10
1
0.1
100
AV = 1
100
AV = 100
10
AV = 10
1
AV = 1
1k
10 k
100 k
1M
0.1
100
f − Frequency − Hz
1k
10 k
100 k
f − Frequency − Hz
Figure 29
Figure 30
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
38
125
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1M
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
90
TA = 25°C
CMRR − Common-Mode Rejection Ratio − dB
CMRR − Common-Mode Rejection Ratio − dB
100
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
VDD = ± 5 V
80
VDD = 5 V
60
40
20
86
82
VIC = − 5 V to 2.7 V
78
VDD = 5 V
74
0
10
100
1k
10 k
100 k
1M
VDD = ± 5 V
70
−75
10 M
VIC = 0 V to 2.7 V
−50
−25
0
Figure 31
75
100
125
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREQUENCY
100
100
VDD = 5 V
TA = 25°C
kSVR
k
SVR − Supply-Voltage Rejection Ratio − dB
kSVR
k SVR − Supply-Voltage Rejection Ratio − dB
50
Figure 32
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREQUENCY
80
60
kSVR+
40
kSVR −
20
0
−20
10
25
TA − Free-Air Temperature − °C
f − Frequency − Hz
100
1k
10 k
100 k
1M
10 M
VDD = ± 5 V
TA = 25°C
80
60
kSVR+
40
kSVR −
20
0
−20
10
100
f − Frequency − Hz
1k
10 k
100 k
1M
10 M
f − Frequency − Hz
Figure 33
Figure 34
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39
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
TLC2272
SUPPLY CURRENT†
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE REJECTION RATIO†
vs
FREE-AIR TEMPERATURE
3
VDD ± = ± 2.2 V to ± 8 V
VO = 0 V
VO = 0 V
No Load
2.4
105
IIDD
DD − Supply Current − mA
kSVR
k
SVR − Supply Voltage Rejection Ratio − dB
110
100
95
TA = 25°C
TA = − 55°C
1.2
TA = 125°C
0.6
90
85
−75
1.8
0
−50
−25
0
25
50
75
100
0
125
1
TA − Free-Air Temperature − °C
2
3
4
5
6
|VDD ± | − Supply Voltage − V
Figure 35
100
125
TLC2272
SUPPLY CURRENT†
vs
FREE-AIR TEMPERATURE
3
6
VO = 0 V
No Load
VDD = ± 5 V
VO = 0 V
2.4
3.6
IIDD
DD − Supply Current − mA
4.8
IIDD
DD − Supply Current − mA
8
Figure 36
TLC2274
SUPPLY CURRENT†
vs
SUPPLY VOLTAGE
TA = 25°C
TA = − 55°C
2.4
TA = 125°C
1.2
0
7
VDD = 5 V
VO = 2.5 V
1.8
1.2
0.6
0
1
2
3
4
5
6
7
8
0
−75
−50
−25
0
25
50
75
TA − Free-Air Temperature − °C
|VDD ± | − Supply Voltage − V
Figure 37
Figure 38
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
40
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 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
TLC2274
SUPPLY CURRENT†
vs
FREE-AIR TEMPERATURE
SLEW RATE
vs
LOAD CAPACITANCE
5
6
VDD = ± 5 V
VO = 0 V
4
SR − Slew Rate − V/ µ s
IIDD
DD − Supply Current − mA
4.8
VDD = 5 V
VO = 2.5 V
3.6
2.4
SR −
3
2
SR +
1
1.2
0
−75
VDD = 5 V
AV = − 1
TA = 25°C
−50
−25
0
25
50
75
100
0
10
125
100
1k
CL − Load Capacitance − pF
TA − Free-Air Temperature − °C
Figure 39
Figure 40
SLEW RATE†
vs
FREE-AIR TEMPERATURE
INVERTING LARGE-SIGNAL PULSE RESPONSE
5
5
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = − 1
SR −
4
VO − Output Voltage − mV
VO
SR − Slew Rate − V/ µs
4
SR +
3
2
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
AV = 1
1
0
−75
10 k
3
2
1
0
−50
−25
0
25
50
75
100
125
0
TA − Free-Air Temperature − °C
1
2
3
4
5
6
7
8
9
t − Time − µs
Figure 41
Figure 42
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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41
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER
LARGE-SIGNAL PULSE RESPONSE
INVERTING LARGE-SIGNAL PULSE RESPONSE
5
3
2
4
VO − Output Voltage − V
VO
4
V
VO
O − Output Voltage − V
5
VDD = ± 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = − 1
1
0
−1
−2
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
AV = 1
TA = 25°C
3
2
−3
1
−4
−5
0
1
2
3
4
5
6
7
8
0
9
0
1
2
3
t − Time − µs
Figure 43
5
6
7
8
9
Figure 44
VOLTAGE-FOLLOWER
LARGE-SIGNAL PULSE RESPONSE
5
INVERTING SMALL-SIGNAL PULSE RESPONSE
2.65
VDD = ± 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = 1
3
2
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = −1
2.6
VO − Output Voltage − V
VO
4
VO − Output Voltage − V
VO
4
t − Time − µs
1
0
−1
−2
−3
2.55
2.5
2.45
−4
−5
2.4
0
1
2
3
4
5
6
7
8
9
0
t − Time − µs
1 1.5
2 2.5 3
t − Time − µs
Figure 45
42
0.5
Figure 46
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3.5 4
4.5
5 5.5
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER
SMALL-SIGNAL PULSE RESPONSE
INVERTING SMALL-SIGNAL PULSE RESPONSE
2.65
VDD = ± 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = 1
50
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = 1
2.6
VO − Output Voltage − V
VO
VO − Output Voltage − mV
VO
100
0
−50
2.55
2.5
2.45
−100
2.4
0
0.5
1
1.5
2
2.5
3
3.5
4
0
t − Time − µs
Figure 47
Figure 48
VDD = ± 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = 1
Vn
nV HzHz
Vn − Equivalent Input Noise Voltage − nV/
VO − Output Voltage − mV
VO
50
1
1.5
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
VOLTAGE-FOLLOWER
SMALL-SIGNAL PULSE RESPONSE
100
0.5
t − Time − µs
0
−50
−100
60
VDD = 5 V
TA = 25°C
RS = 20 Ω
50
40
30
20
10
0
0
0.5
1
1.5
10
t − Time − µs
100
1k
f − Frequency − Hz
10 k
Figure 50
Figure 49
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 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
NOISE VOLTAGE
OVER A 10 SECOND PERIOD
60
1000
VDD = ± 5 V
TA = 25°C
RS = 20 Ω
50
VDD = 5 V
f = 0.1 Hz to 10 Hz
TA = 25°C
750
500
Noise Voltage − nV
Vn
nV HzHz
Vn − Equivalent Input Noise Voltage − nV/
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
40
30
20
250
0
−250
−500
10
−750
−1000
0
10
100
1k
f − Frequency − Hz
0
10 k
2
4
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
THD + N − Total Harmonic Distortion Plus Noise − %
µ V RMS
Integrated Noise Voltage − uVRMS
100
Calculated Using
Ideal Pass-Band Filter
Lower Frequency = 1 Hz
TA= 25°C
10
1
0.1
100
10 k
1k
100 k
1
VDD = 5 V
TA = 25°C
RL = 10 kΩ
0.1
AV = 100
0.01
AV = 10
0.001
AV = 1
0.0001
100
1k
10 k
f − Frequency − Hz
f − Frequency − Hz
Figure 54
Figure 53
44
10
Figure 52
INTEGRATED NOISE VOLTAGE
vs
FREQUENCY
10
8
t − Time − s
Figure 51
1
6
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100 k
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
TYPICAL CHARACTERISTICS
GAIN-BANDWIDTH PRODUCT†
vs
FREE-AIR TEMPERATURE
GAIN-BANDWIDTH PRODUCT
vs
SUPPLY VOLTAGE
3
f = 10 kHz
RL = 10 kΩ
CL = 100 pF
TA = 25°C
2.4
VDD = 5 V
f = 10 kHz
RL = 10 kΩ
CL = 100 pF
2.8
Gain-Bandwidth Product − MHz
Gain-Bandwidth Product − MHz
2.5
2.3
2.2
2.1
2.6
2.4
2.2
2
1.8
1.6
1.4
2
0
1
6
2
3
4
5
|VDD ±| − Supply Voltage − V
7
8
−75
−50
Figure 55
GAIN MARGIN
vs
LOAD CAPACITANCE
15
VDD = ± 5 V
TA = 25°C
VDD = 5 V
AV = 1
RL = 10 kΩ
TA = 25°C
Rnull = 100 Ω
60°
12
Rnull = 50 Ω
Gain Margin − dB
φ m − Phase Margin
om
125
Figure 56
PHASE MARGIN
vs
LOAD CAPACITANCE
75°
−25
0
25
50
75 100
TA − Free-Air Temperature − °C
45°
Rnull = 20 Ω
30°
9
6
10 kΩ
15°
10 kΩ
3
VDD +
Rnull
VI
Rnull = 0
CL
0°
10
VDD −
Rnull = 10 Ω
100
1000
CL − Load Capacitance − pF
10000
0
10
Figure 57
100
1000
CL − Load Capacitance − pF
10000
Figure 58
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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45
 SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts, the model generation software used
with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 59 were generated using
the TLC227x typical electrical and operating characteristics at TA = 25°C. Using this information, output
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
D
D
D
D
D
D
D
D
D
D
D
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Quiescent power dissipation
Input bias current
Open-loop voltage amplification
Unity gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
99
3
VCC +
9
RSS
+
10
VC
J1
DP
J2
IN +
11
RD1
VAD
DC
12
C1
R2
−
53
HLIM
−
C2
6
−
+
+
GCM
GA
−
RD2
−
RO1
DE
5
+
VE
.SUBCKT TLC227x 1 2 3 4 5
C1
11
1214E−12
C2
6
760.00E−12
DC
5
53DX
DE
54
5DX
DLP
90
91DX
DLN
92
90DX
DP
4
3DX
EGND
99
0POLY (2) (3,0) (4,) 0 .5 .5
FB
99
0POLY (5) VB VC VE VLP VLN 0
+ 984.9E3 −1E6 1E6 1E6 −1E6
GA
6
011 12 377.0E−6
GCM 0 6 10 99 134E−9
ISS
3
10DC 216.OE−6
HLIM
90
0VLIM 1K
J1
11
210 JX
J2
12
110 JX
R2
6
9100.OE3
OUT
RD1
60
112.653E3
RD2
60
122.653E3
R01
8
550
R02
7
9950
RP
3
44.310E3
RSS
10
99925.9E3
VAD
60
4−.5
VB
9
0DC 0
VC 3 53 DC .78
VE
54
4DC .78
VLIM
7
8DC 0
VLP
91
0DC 1.9
VLN
0
92DC 9.4
.MODEL DX D (IS=800.0E−18)
.MODEL JX PJF (IS=1.500E−12BETA=1.316E-3
+ VTO=−.270)
.ENDS
Figure 59. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
!'# #!$'" !'# ") !'# %
&+ "'+ "'+ " *" &+ # $''+ %#", ''
") #%" %", )"#"# ")
#!$" %$" " *)) ") !' '"#(
46
−
VLIM
8
54
4
−
7
60
+
−
+ DIP
91
+
VIP
90
RO2
VB
IN −
VCC −
92
FB
−
+
ISS
RP
2
1
DIN
EGND +
POST OFFICE BOX 655303
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VIN
PACKAGE OPTION ADDENDUM
www.ti.com
21-Nov-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9318201M2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9318201MCA
ACTIVE
CDIP
J
14
1
TBD
5962-9318201QDA
ACTIVE
CFP
W
14
1
TBD
5962-9318202Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9318202QCA
ACTIVE
CDIP
J
14
1
TBD
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE Level-NC-NC-NC
A42 SNPB
Level-NC-NC-NC
A42 SNPB
Level-NC-NC-NC
POST-PLATE Level-NC-NC-NC
A42 SNPB
Level-NC-NC-NC
Level-NC-NC-NC
5962-9318202QDA
ACTIVE
CFP
W
14
1
TBD
A42 SNPB
5962-9555201NXDR
ACTIVE
SOIC
D
8
2500
TBD
CU NIPDAU
5962-9555201Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9555201QHA
ACTIVE
CFP
U
10
1
TBD
A42 SNPB
Level-NC-NC-NC
5962-9555201QPA
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
Level-NC-NC-NC
5962-9555202Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9555202QHA
ACTIVE
CFP
U
10
1
TBD
A42 SNPB
Level-NC-NC-NC
5962-9555202QPA
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
Level-NC-NC-NC
TLC2272ACD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272ACDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272ACDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272ACDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272ACP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TLC2272ACPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TLC2272ACPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272ACPWLE
OBSOLETE
TSSOP
PW
8
TBD
Call TI
TLC2272ACPWR
ACTIVE
TSSOP
PW
8
TLC2272AID
ACTIVE
SOIC
D
8
75
TLC2272AIDG4
ACTIVE
SOIC
D
8
75
TLC2272AIDR
ACTIVE
SOIC
D
TLC2272AIDRG4
ACTIVE
SOIC
TLC2272AIP
ACTIVE
TLC2272AIPE4
2000 Green (RoHS &
no Sb/Br)
Level-1-220C-UNLIM
POST-PLATE Level-NC-NC-NC
POST-PLATE Level-NC-NC-NC
Call TI
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TLC2272AMD
ACTIVE
SOIC
D
8
75
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2272AMDR
ACTIVE
SOIC
D
8
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2272AMFKB
ACTIVE
LCCC
FK
20
1
TBD
TLC2272AMJGB
ACTIVE
CDIP
JG
8
1
TBD
Addendum-Page 1
POST-PLATE Level-NC-NC-NC
A42 SNPB
Level-NC-NC-NC
PACKAGE OPTION ADDENDUM
www.ti.com
21-Nov-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TLC2272AMP
OBSOLETE
PDIP
P
8
TLC2272AMUB
ACTIVE
CFP
U
10
Lead/Ball Finish
TBD
Call TI
1
TBD
A42 SNPB
MSL Peak Temp (3)
Call TI
Level-NC-NC-NC
TLC2272AQD
ACTIVE
SOIC
D
8
75
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2272AQDR
ACTIVE
SOIC
D
8
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2272CD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272CDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272CP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TLC2272CPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TLC2272CPSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272CPSRG4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272CPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272CPWG4
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272CPWLE
OBSOLETE
TSSOP
PW
8
TLC2272CPWR
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272CPWRG4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272ID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272IDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272IDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272IDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272IP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TLC2272IPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TLC2272IPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2272IPWLE
OBSOLETE
TSSOP
PW
8
TBD
Call TI
TLC2272IPWR
ACTIVE
TSSOP
PW
8
TBD
2000 Green (RoHS &
no Sb/Br)
Call TI
Call TI
Call TI
CU NIPDAU
Level-1-260C-UNLIM
TLC2272MD
ACTIVE
SOIC
D
8
75
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2272MDR
ACTIVE
SOIC
D
8
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2272MFKB
ACTIVE
LCCC
FK
20
1
TBD
TLC2272MJG
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
Level-NC-NC-NC
TLC2272MJGB
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
Level-NC-NC-NC
TLC2272MP
OBSOLETE
PDIP
P
8
TLC2272MUB
ACTIVE
CFP
U
10
1
Addendum-Page 2
POST-PLATE Level-NC-NC-NC
TBD
Call TI
TBD
A42 SNPB
Call TI
Level-NC-NC-NC
PACKAGE OPTION ADDENDUM
www.ti.com
21-Nov-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
TLC2272QD
ACTIVE
SOIC
D
8
75
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2272QDR
ACTIVE
SOIC
D
8
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2272QPWR
ACTIVE
TSSOP
PW
8
2000
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2274ACD
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274ACDG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274ACDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274ACDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274ACN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLC2274ACNE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLC2274ACPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274ACPWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274ACPWR
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274ACPWRG4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274AID
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274AIDG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274AIDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274AIDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274AIN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLC2274AINE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLC2274AIPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274AIPWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274AIPWLE
OBSOLETE
TSSOP
PW
14
TBD
Call TI
TLC2274AIPWR
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274AIPWRG4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Call TI
TLC2274AMD
ACTIVE
SOIC
D
14
50
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2274AMDR
ACTIVE
SOIC
D
14
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2274AMFKB
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE Level-NC-NC-NC
TLC2274AMJB
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
Level-NC-NC-NC
TLC2274AMWB
ACTIVE
CFP
W
14
1
TBD
A42 SNPB
Level-NC-NC-NC
TLC2274AQD
ACTIVE
SOIC
D
14
50
TBD
CU NIPDAU
Addendum-Page 3
Level-1-220C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com
21-Nov-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TLC2274AQDR
ACTIVE
SOIC
D
14
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2274CD
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CDG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLC2274CNE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLC2274CNSR
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CNSR-A
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CNSRG4
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CPWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CPWLE
OBSOLETE
TSSOP
PW
14
TLC2274CPWR
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274CPWRG4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274ID
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274IDG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274IDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274IDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274IN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLC2274INE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLC2274IPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
TLC2274IPWLE
OBSOLETE
TSSOP
PW
14
TLC2274IPWR
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC2274IPWRG4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TBD
TBD
Lead/Ball Finish
Call TI
Call TI
MSL Peak Temp (3)
Call TI
Level-1-260C-UNLIM
Call TI
TLC2274MD
ACTIVE
SOIC
D
14
50
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2274MDR
ACTIVE
SOIC
D
14
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
TLC2274MFKB
ACTIVE
LCCC
FK
20
1
TBD
Addendum-Page 4
POST-PLATE Level-NC-NC-NC
PACKAGE OPTION ADDENDUM
www.ti.com
21-Nov-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
TLC2274MJ
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
Level-NC-NC-NC
TLC2274MJB
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
Level-NC-NC-NC
TLC2274MN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLC2274MWB
ACTIVE
CFP
W
14
1
TBD
A42 SNPB
Level-NC-NC-NC
TLC2274QD
ACTIVE
SOIC
D
14
50
TBD
CU NIPDAU
Level-1-220C-UNLIM
2500
TBD
CU NIPDAU
Level-1-220C-UNLIM
TBD
Call TI
TLC2274QDR
ACTIVE
SOIC
D
14
TLC2274Y
PREVIEW
XCEPT
Y
0
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 5
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MCFP001A – JANUARY 1995 – REVISED DECEMBER 1995
U (S-GDFP-F10)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.250 (6,35)
0.246 (6,10)
0.045 (1,14)
0.026 (0,66)
0.008 (0,20)
0.004 (0,10)
0.080 (2,03)
0.050 (1,27)
0.300 (7,62) MAX
1
0.019 (0,48)
0.015 (0,38)
10
0.050 (1,27)
0.280 (7,11)
0.230 (5,84)
5
6
4 Places
0.005 (0,13) MIN
0.350 (8,89)
0.250 (6,35)
0.350 (8,89)
0.250 (6,35)
4040179 / B 03/95
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only.
Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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