Revised February 1999 MM74HC688 8-Bit Magnitude Comparator (Equality Detector) General Description The MM74HC688 equality detector utilizes advanced silicon-gate CMOS technology to compare bit for bit two 8-bit words and indicates whether or not they are equal. The P=Q output indicates equality when it is LOW. A single active low enable is provided to facilitate cascading of several packages and enable comparison of words greater than 8 bits. This device is useful in memory block decoding applications, where memory block enable signals must be generated from computer address information. The comparator’s output can drive 10 low power Schottky equivalent loads. This comparator is functionally and pin compatible to the 74LS688. All inputs are protected from damage due to static discharge by diodes to VCC and ground. Features ■ Typical propagation delay: 20 ns ■ Wide power supply range: 2–6V ■ Low quiescent current: 80 µA (74 Series) ■ Large output current: 4 mA (74 Series) ■ Same as HC521 Ordering Code: Order Number Package Number MM74HC688WM MM74HC688SJ MM74HC688MTC MM74HC688N Package Description M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MTC20 N20A 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Diagram Connection Diagram Pin Assignments for DIP Top View Truth Table Inputs Data Enable P,Q G P=Q L L P>Q L H P<Q L H X H H © 1999 Fairchild Semiconductor Corporation P=Q DS005018.prf www.fairchildsemi.com MM74HC688 8-Bit Magnitude Comparator (Equality Detector) September 1983 MM74HC688 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 2) −0.5 to +7.0V Supply Voltage (VCC) −1.5 to VCC +1.5V Supply Voltage (V ) CC −0.5 to VCC +0.5V DC Input or Output Voltage DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK, IOK) ±20 mA DC Output Current, per pin (IOUT) ±25 mA DC VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) r f Power Dissipation (PD) 600 mW S.O. Package only 500 mW Symbol VIH VIL Parameter Conditions V 0 VCC V −40 +85 °C 1000 ns VCC = 4.5V 500 ns VCC = 6.0V 400 ns CC Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C. (Note 4) TA = 25°C VCC Typ TA = −40 to 85°C TA = −55 to 125°C Guaranteed Limits Units Minimum HIGH Level 2.0V 1.5 1.5 1.5 V Input Voltage 4.5V 3.15 3.15 3.15 V 6.0V 4.2 4.2 4.2 V Maximum LOW Level 2.0V 0.5 0.5 0.5 V 4.5V 1.35 1.35 1.35 V 6.0V 1.8 1.8 1.8 V Input Voltage VOH Units Note 2: Unless otherwise specified all voltages are referenced to ground. 260°C DC Electrical Characteristics 6 Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Lead Temperature (TL) (Soldering 10 seconds) Max 2 (VIN, VOUT ) Operating Temperature Range (TA) ±50 mA Input Rise or Fall Times −65°C to +150°C (t , t ) V = 2.0V (Note 3) Min Minimum HIGH Level VIN = VIH or VIL Output Voltage |IOUT| ≤ 20 µA 2.0V 2.0 1.9 1.9 1.9 V 4.5V 4.5 4.4 4.4 4.4 V 6.0V 6.0 5.9 5.9 5.9 V |IOUT| ≤ 4.0 mA 4.5V 4.2 3.98 3.84 3.7 V |IOUT| ≤ 5.2 mA 6.0V 5.7 5.48 5.34 5.2 V VIN = VIH or VIL VOL Maximum LOW Level VIN = VIH or VIL Output Voltage |IOUT| ≤ 20 µA 2.0V 0 0.1 0.1 0.1 V 4.5V 0 0.1 0.1 0.1 V 6.0V 0 0.1 0.1 0.1 V |IOUT| ≤ 4.0 mA 4.5V 0.2 0.26 0.33 0.4 V |IOUT| ≤ 5.2 mA 6.0V 0.2 0.26 0.33 0.4 V VIN = VCC or GND 6.0V ±0.1 ±1.0 ±1.0 µA Maximum Quiescent VIN = VCC or GND 6.0V 8.0 80 160 µA Supply Current IOUT = 0 µA VIN = VIH or VIL IIN Maximum Input Current ICC Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. www.fairchildsemi.com 2 VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns Symbol tPHL, tPLH Parameter Conditions Typ Maximum Propagation Guaranteed Limit Units 21 30 ns 14 20 ns Delay, any P or Q to Output tPLH, tPHL Maximum Propagation Delay, Enable to any Output AC Electrical Characteristics VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Symbol tPHL, tPLH tPHL, tPLH tTHL, tTLH CPD Parameter Conditions TA= 25°C VCC Typ TA = −40 to 85°C TA = −55 to 125°C Units Guaranteed Limits Maximum Propagation 2.0V 60 175 220 263 ns Delay, P or Q to 4.5V 22 35 44 53 ns Output 6.0V 19 30 38 45 ns Maximum Propagation 2.0V 45 120 150 180 ns Delay, Enable to 4.5V 15 24 30 36 ns Output 6.0V 13 20 25 30 ns Maximum Output Rise 2.0V 30 75 95 110 ns and Fall Time 4.5V 8 15 19 22 ns 6.0V 7 13 16 19 Power Dissipation 45 ns pF Capacitance (Note 5) CIN Maximum Input 5 10 10 10 pF Capacitance Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. 3 www.fairchildsemi.com MM74HC688 AC Electrical Characteristics MM74HC688 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Package Number M20B 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 4 MM74HC688 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 5 www.fairchildsemi.com MM74HC688 8-Bit Magnitude Comparator (Equality Detector) Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N20A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.