LINER LT1114

LT1112/LT1114
Dual/Quad Low Power
Precision, Picoamp Input Op Amps
U
DESCRIPTIO
FEATURES
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S8 Package – Standard Pinout
Offset Voltage – Prime Grade: 60µV Max
Offset Voltage – Low Cost Grade
(Including Surface Mount Dual/Quad): 75µV Max
Offset Voltage Drift: 0.5µV/°C Max
Input Bias Current: 250pA Max
0.1Hz to 10Hz Noise: 0.3µVP-P, 2.2pAP-P
Supply Current per Amplifier: 400µA Max
CMRR: 120dB Min
Voltage Gain: 1 Million Min
Guaranteed Specs with ±1.0V Supplies
Guaranteed Matching Specifications
LT1114 in Narrow Surface Mount Package
UO
APPLICATI
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S
Picoampere/Microvolt Instrumentation
Two and Three Op Amp Instrumentation Amplifers
Thermocouple and Bridge Amplifiers
Low Frequency Active Filters
Photo Current Amplifiers
Battery-Powered Systems
The LT1112 dual and LT1114 quad op amps achieve a new
standard in combining low cost and outstanding precision
specifications.
The performance of the selected prime grades matches or
exceeds competitive devices. In the design of the LT1112/
LT1114 however, particular emphasis has been placed on
optimizing performance in the low cost plastic and SO
packages. For example, the 75µV maximum offset voltage
in these low cost packages is the lowest on any dual or
quad non-chopper op amp.
The LT1112/LT1114 also provide a full set of matching
specifications, facilitating their use in such matching
dependent applications as two and three op amp instrumentation amplifiers.
Another set of specifications is furnished at ±1V supplies.
This, combined with the low 320µA supply current per
amplifier, allows the LT1112/LT1114 to be powered by
two nearly discharged AA cells.
Protected by U.S. Patents 4,575,685; 4,775,884 and 4,837,496
Distribution of Input Offset Voltage
(In All Packages)
Dual Output, Buffered Reference (On Single 3V Supply)
30
3V
15k
2
–
8
1/2 LT1112
3
75k
0.1%
+
LT1004-1.2
6
–
5
+
25
VS = ±15V
TA = 25°C
20
15
10
5
1/2 LT1112
46.4k
0.1%
1
TOTAL SUPPLY CURRENT = 700µA
2V REFERENCE: SOURCES 1.7mA, SINKS 5mA
RX
OPTIONAL RX = 300Ω INCREASES SOURCE
CURRENT TO 5mA
0.765V REFERENCE: SOURCES 5mA,
SINKS 0.5mA
TEMPERATURE COEFFICIENT LIMITED
BY REFERENCE = 20ppm/°C
2.000V
MINIMUM SUPPLY = 2.7V
PERCENT OF UNITS
■
7
0.765V
4
0
–70 –50
50
30
–30 –10 10
INPUT OFFSET VOLTAGE (µV)
70
LT1112/14 • TA02
LT1112/14 • TA01
1
LT1112/LT1114
W W
W
AXI U
U
ABSOLUTE
RATI GS
Supply Voltage ..................................................... ±20V
Differential Input Current (Note 1) ..................... ±10mA
Input Voltage (Equal to Supply Voltage) ............... ±20V
Output Short-Circuit Duration ......................... Indefinite
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................ 300°C
Operating Temperature Range
LT1112AM/LT1112M
LT1114AM/LT1114M ...................... – 55°C to 125°C
LT1112AC/LT1112C/LT1112S8
LT1114AC/LT1114C/LT1114S .......... – 40°C to 85°C
U
W
U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
OUT A 1
–IN A 2
A
+IN A 3
+
8
V
7
OUT B
6
–IN B
5
+IN B
B
V– 4
J8 PACKAGE
8-LEAD CERAMIC DIP
N8 PACKAGE
8-LEAD PLASTIC DIP
ORDER PART
NUMBER
OUT A
1
14 OUT D
–IN A
2
13 –IN D
+IN A
3
V+
4
+IN B
5
–IN B
6
OUT B
7
A
D
12 +IN D
11 V –
B
C
10 +IN C
9
–IN C
8
OUT C
ORDER PART
NUMBER
∆VOS
∆Time
Long Term Input Offset
Voltage Stability
IOS
Input Offset Current
V+
7
OUT B
6
–IN B
5
+IN B
S8 PACKAGE
8-LEAD PLASTIC SO
PART MARKING
TJMAX = 140°C, θJA = 190°C/W
1112
16 OUT D
OUT A 1
A
D
+IN A 3
V+ 4
+IN B 5
15 –IN D
13 V –
B
C
12 +IN C
–IN B 6
11 –IN C
OUT B 7
10 OUT C
9
NC
VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted.
CONDITIONS (Note 2)
VS = ±1.0V
LT1112AM/AC
LT1114AM/AC
MIN TYP MAX
LT1112M/C/S8
LT1114M/C/S
MIN TYP MAX
20
40
25
45
60
110
0.3
Input Bias Current
2
Input Noise Voltage
LT1114S
14 +IN D
0.1Hz to 10Hz (Note 9)
75
130
UNITS
µV
µV
µV/Mo
0.3
50
180
60
75
230
330
pA
pA
±70
±250
±80
±100
±280
±450
pA
pA
0.3
0.9
0.3
0.9
LT1114S
en
ORDER PART
NUMBER
TOP VIEW
LT1114S
IB
LT1112S8
S PACKAGE
16-LEAD PLASTIC SO (NARROW)
TJMAX = 140°C, θJA = 150°C/W
ELECTRICAL CHARACTERISTICS
Input Offset Voltage
ORDER PART
NUMBER
8
B
V– 4
NC 8
TJMAX = 160°C, θJA = 80°C/W (J)
TJMAX = 140°C, θJA = 110°C/W (N)
VOS
A
+IN A 3
–IN A 2
LT1114AMJ
LT1114MJ
LT1114ACN
LT1114CN
J PACKAGE
N PACKAGE
14-LEAD CERAMIC DIP 14-LEAD PLASTIC DIP
SYMBOL PARAMETER
OUT A 1
–IN A 2
LT1112AMJ8
LT1112MJ8
LT1112ACN8
LT1112CN8
TJMAX = 160°C, θJA = 100°C/W (J8)
TJMAX = 140°C, θJA = 130°C/W (N8)
TOP VIEW
TOP VIEW
µVP-P
LT1112/LT1114
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
in
VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted.
CONDITIONS (Note 2)
LT1112AM/AC
LT1114AM/AC
MIN TYP MAX
LT1112M/C/S8
LT1114M/C/S
MIN TYP MAX
UNITS
16
14
nV/√Hz
nV/√Hz
Input Noise Voltage Density
fO = 10Hz (Note 9)
fO = 1000Hz (Note 9)
16
14
Input Noise Current
0.1Hz to 10Hz
2.2
2.2
Input Noise Current Density
fO = 10Hz
fO = 1000Hz
0.030
0.008
0.030
0.008
pA/√Hz
pA/√Hz
±14.3
V
±13.5
28
18
±14.3
±13.5
28
18
pAP-P
VCM
Input Voltage Range
CMRR
Common-Mode Rejection Ratio
VCM = ±13.5V
120
136
115
136
dB
PSRR
Power Supply Rejection Ratio
VS = ±1.0V to ±20V
116
126
114
126
dB
Minimum Supply Voltage
(Note 4)
±1.0
Input Resistance
Differential Mode
Common Mode
(Note 3)
20
50
800
15
40
700
MΩ
GΩ
RIN
±1.0
V
AVOL
Large-Signal Voltage Gain
VO = ±12V, RL = 10kΩ
VO = ±10V, RL = 2kΩ
1000
800
5000
1500
800
600
5000
1300
V/mV
V/mV
VOUT
Output Voltage Swing
RL = 10kΩ
RL = 2kΩ
±13.0
±11.0
±14.0
±12.4
±13.0
±11.0
±14.0
±12.4
V
V
SR
Slew Rate
0.16
0.30
0.16
0.30
V/µs
GBW
Gain-Bandwidth Product
450
750
450
750
kHz
IS
Supply Current per Amplifier
fO = 10kHz
350
320
Channel Separation
fO = 10Hz
150
∆VOS
Offset Voltage Match
(Note 5)
35
100
40
130
µV
∆IB
Noninverting Bias Current Match
(Notes 5, 6)
100
450
LT1114S
100
120
500
680
pA
pA
∆CMRR
Common-Mode Rejection Match
(Notes 5, 7)
117
136
113
136
dB
∆PSRR
Power Supply Rejection Match
(Notes 5, 7)
114
130
112
130
dB
+
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
400
370
350
320
450
420
µA
µA
VS = ±1.0V
150
dB
VS = ±15V, – 55°C ≤ TA ≤ 125°C, unless otherwise noted.
CONDITIONS (Note 2)
LT1112AMJ8
LT1114AMJ
MIN TYP MAX
LT1112MJ8
LT1114MJ
MIN TYP MAX
UNITS
VS = ±1.2V
●
●
35
60
120
220
45
70
150
260
µV
µV
(Note 8)
●
0.15
0.5
0.20
0.75
µV/°C
VOS
Input Offset Voltage
∆VOS
∆Temp
Average Input Offset Voltage Drift
IOS
Input Offset Current
●
80
400
100
500
pA
IB
Input Bias Current
●
±150
±600
±170
±700
pA
VCM
Input Voltage Range
●
±13.5
±14.1
±13.5
±14.1
V
CMRR
Common-Mode Rejection Ratio
VCM = ±13.5V
●
116
130
111
130
dB
PSRR
Power Supply Rejection Ratio
VS = ±1.2V to ±20V
●
112
124
110
124
dB
AVOL
Large-Signal Voltage Gain
VO = ±12V, RL = 10kΩ
VO = ±10V, RL = 2kΩ
●
●
500
200
2500
600
400
170
2500
500
V/mV
V/mV
3
LT1112/LT1114
ELECTRICAL CHARACTERISTICS
VS = ±15V, – 55°C ≤ TA ≤ 125°C, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS (Note 2)
VOUT
Output Voltage Swing
RL = 10kΩ
SR
Slew Rate
●
IS
Supply Current per Amplifier
●
∆VOS
Offset Voltage Match
(Note 5)
Offset Voltage Match Drift
(Notes 5, 8)
∆IB+
Noninverting Bias Current Match
∆CMRR
∆PSRR
●
LT1112AMJ8
LT1114AMJ
MIN TYP MAX
LT1112MJ8
LT1114MJ
MIN TYP MAX
±13.0 ±13.85
±13.0 ±13.85
0.12
0.22
0.12
UNITS
V
0.22
V/µs
µA
380
460
●
55
●
0.2
(Notes 5, 6)
●
150
Common-Mode Rejection Ratio
(Notes 5, 7)
●
112
130
106
130
dB
Power Supply Rejection Ratio
(Notes 5, 7)
●
109
126
106
126
dB
ELECTRICAL CHARACTERISTICS
380
530
200
70
240
µV
0.7
0.3
1.0
µV/°C
750
170
850
pA
VS = ±15V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
LT1112ACN8
LT1114ACN
MIN TYP MAX
LT1112N8/S8
LT1114CN/S
MIN TYP MAX
SYMBOL PARAMETER
CONDITIONS (Note 2)
VOS
Input Offset Voltage
LT1112N8
LT1112S8, LT1114N/S
VS = ±1.2V
●
●
●
27
35
50
100
125
175
30
45
65
125
150
210
µV
µV
µV
∆VOS
∆Temp
Average Input Offset Voltage Drift
(Note 8)
LT1112N8
LT1112S8, LT1114N/S
●
●
0.15
0.3
0.5
1.1
0.2
0.4
0.75
1.3
µV/°C
µV/°C
IOS
Input Offset Current
●
●
60
220
LT1114S
70
90
290
420
pA
pA
●
●
±80
±300
LT1114S
±90
±115
±350
±550
pA
pA
IB
Input Bias Current
UNITS
VCM
Input Voltage Range
●
±13.5
±14.2
±13.5
±14.2
V
CMRR
Common-Mode Rejection Ratio
VCM = ±13.5V
●
118
133
113
133
dB
PSRR
Power Supply Rejection Ratio
VS = ±1.2V to ±20V
●
114
125
112
125
dB
AVOL
Large-Signal Voltage Gain
VO = ±12V, RL = 10kΩ
VO = ±10V, RL = 2kΩ
●
●
800
500
4000
1300
650
400
4000
1000
V/mV
V/mV
VOUT
Output Voltage Swing
RL = 10kΩ
●
±13.0
±13.9
±13.0
±13.9
V
SR
Slew Rate
●
0.14
0.27
0.14
0.27
V/µs
IS
Supply Current per Amplifier
●
370
440
370
500
µA
∆VOS
Offset Voltage Match
(Note 5)
LT1112N8
LT1112S8, LT1114N/S
●
●
45
55
170
220
55
70
210
270
µV
µV
Offset Voltage Match Drift
(Notes 5, 8)
LT1112N8
LT1112S8, LT1114N/S
●
●
0.2
0.4
0.7
1.6
0.3
0.5
1.0
1.9
µV/°C
µV/°C
Noninverting Bias Current Match
(Notes 5, 6)
●
●
120
530
LT1114S
135
160
620
880
pA
pA
∆CMRR
Common-Mode Rejection Ratio
(Notes 5, 7)
●
114
134
109
134
dB
∆PSRR
Power Supply Rejection Ratio
(Notes 5, 7)
●
110
128
108
128
dB
∆IB+
4
LT1112/LT1114
ELECTRICAL CHARACTERISTICS
VS = ±15V, – 40°C ≤ TA ≤ 85°C, (Note 10)
LT1112ACN8
LT1114ACN
MIN TYP MAX
LT1112N8/S8
LT1114CN/S
MIN TYP MAX
SYMBOL PARAMETER
CONDITIONS (Note 2)
VOS
Input Offset Voltage
LT1112N8
LT1112S8, LT1114N/S
VS = ±1.2V
●
●
●
30
40
55
110
135
200
35
45
60
135
160
240
µV
µV
µV
∆VOS
∆Temp
Average Input Offset Voltage Drift
LT1112N8
LT1112S8, LT1114N/S
●
●
0.15
0.30
0.50
1.10
0.20
0.40
0.75
1.30
µV/°C
µV/°C
IOS
Input Offset Current
●
●
70
330
LT1114S
85
110
400
600
pA
pA
●
●
±110
±500
LT1114S
±120
±150
±550
±800
pA
pA
IB
Input Bias Current
UNITS
●
±13.5
±14.1
±13.5
±14.1
V
VCM = ±13.5V
●
117
132
112
132
dB
VS = ±1.2V to ±20V
●
113
125
111
125
dB
VO = ±12V, RL = 10kΩ
VO = ±10V, RL = 2kΩ
●
●
700
400
3300
1100
600
300
3300
900
V/mV
V/mV
RL = 10kΩ
●
VCM
Input Voltage Range
CMRR
Common-Mode Rejection Ratio
PSRR
Power Supply Rejection Ratio
AVOL
Large-Signal Voltage Gain
VOUT
Output Voltage Swing
SR
Slew Rate
●
IS
Supply Current per Amplifier
●
370
450
370
510
µA
∆VOS
Offset Voltage Match
(Note 5)
LT1112N8
LT1112S8, LT1114N/S
●
●
50
60
180
230
60
70
225
270
µV
µV
Offset Voltage Match Drift
(Notes 5)
LT1112N8
LT1112S8, LT1114N/S
●
●
0.2
0.4
0.7
1.6
0.3
0.5
1.0
1.9
µV/°C
µV/°C
Noninverting Bias Current Match
(Notes 5, 6)
●
●
140
660
LT1114S
155
190
770
1300
∆CMRR
Common-Mode Rejection Ratio
(Notes 5, 7)
●
113
133
109
133
dB
∆PSRR
Power Supply Rejection Ratio
(Notes 5, 7)
●
110
127
107
127
dB
∆IB+
The ● denotes specifications which apply over the operating temperature
range.
Note 1: Differential input voltages greater than 1V will cause excessive
current to flow through the input protection diodes unless limiting
resistance is used.
Note 2: Typical parameters are defined as the 60% yield of parameter
distributions of individual amplifiers; i.e., out of 100 LT1114s (or 100
LT1112s) typically 240 op amps (or 120) will be better than the indicated
specification.
Note 3: This parameter is guaranteed by design and is not tested.
Note 4: Offset voltage, supply current and power supply rejection ratio are
measured at the minimum supply voltage.
Note 5: Matching parameters are the difference between amplifiers A and
D and between B and C on the LT1114; between the two amplifiers on the
LT1112.
±13.0 ±13.85
0.13
±13.0 ±13.85
0.24
0.13
V
0.24
V/µs
pA
pA
Note 6: This parameter is the difference between two noninverting
input bias currents.
Note 7: ∆CMRR and ∆PSRR are defined as follows: (1) CMRR and
PSRR are measured in µV/V on the individual amplifiers. (2) The
difference is calculated between the matching sides in µV/V. (3) The
result is converted to dB.
Note 8: This parameter is not 100% tested.
Note 9: These parameters are not tested. More than 99% of the op
amps tested during product characterization have passed the
maximum limits. 100% passed at 1kHz.
Note 10: The LT1112/LT1114 are not tested and are not quality
assurance sampled at – 40°C and at 85°C. These specifications are
guaranteed by design, correlation and/or inference from – 55°C, 0°C,
25°C, 70°C and/or 125°C tests.
5
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias Current Over
Common-Mode Range
IOS
IB (UNDERCANCELLED)
0
IB (OVERCANCELLED)
–100
30
VS = ±15V
TA = 25°C
RINCM = 800GΩ
50
VS = ±15V
TA = 25°C
DEVICE WITH POSITIVE INPUT CURRENT
0
DEVICE WITH NEGATIVE INPUT CURRENT
–50
–
IB
–100
VS = ±15V
–200
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
100 125
–150
–15
+
10
–5
0
5
–10
COMMON-MODE INPUT VOLTAGE (V)
0
0
100
200
–300 –200 –100
INPUT BIAS CURRENT (pA)
15
Distribution of Offset Voltage at
VS = ±1.0V (In All Packages)
25
PERCENT OF UNITS
20
10
5
960 OP AMPS TESTED
240 LT1112S8
80 LT1114N
40 LT1114S
30
VS = ±15V
TA = 25°C
25
PERCENT OF UNITS
VS = ±15V
15
10
5
20
15
10
5
0
0.6 1.0 1.4
–1.4 –1.0 –0.6 –0.2 0.2
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)
0
–0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)
0
–80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE (µV)
LT1112/14 • TPC05
LT1112/14 • TPC04
LT1112/14 • TPC06
Distribution of Offset Voltage
Match Drift (LT1112J8, LT1112N8,
LT1114J Packages)
Distribution of Offset
Voltage Match
Distribution of Offset Voltage
Match Drift (LT1112S8, LT1114N,
LT1114S Packages)
20
30
25
VS = ±15V
TA = 25°C
25
20
300
LT1112/14 • TPC03
Drift with Temperature
LT1112S8, LT1114N/S
20
VS = ±15V
342 PAIRS TESTED
VS = ±15V
364 PAIRS TESTED
PERCENT ON UNITS
15
15
10
PERCENT OF UNITS
PERCENT OF INPUTS
10
LT1112/14 • TPC02
Drift with Temperature
LT1112N8/J8, LT1114J
850 OP AMPS TESTED
100 LT1112J8
165 LT1112N8
80 LT1114J
20
VCM
LT1112/14 • TPC01
PERCENT OF UNITS
PERCENT OF UNITS
100
∆IB+
100
15
Distribution of Input Bias Current
(In All Packages Except LT1114S)
150
200
INPUT BIAS CURRENT (pA)
INPUT BIAS, OFFSET, MATCH CURRENT (pA)
Input Bias and Offset Current,
Noninverting Bias Current Match
vs Temperature
20
15
10
10
5
5
5
0
–100 –80 –60 – 40 –20 0 20 40 60 80 100
∆VOS, OFFSET VOLTAGE MATCH (µV)
0
–0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8
OFFSET VOLTAGE MATCH DRIFT (µV/°C)
LT1112/14 • TPC07
6
LT1112/14 • TPC08
0
–1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6
OFFSET VOLTAGE MATCH DRIFT (µV/°C)
LT1112/14 • TPC09
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Noise Spectrum
0.1Hz to 10Hz Noise
0.01Hz to 1Hz Noise
VS = ±1V TO ±20V
TA = 25°C
CURRENT NOISE
VOLTAGE NOISE
10
1/fCORNER
2.5Hz
VS = ±15V
TA = 25°C
1/fCORNER
140Hz
NOISE VOLTAGE (0.2µV/DIV)
100
VS = ±15V
TA = 25°C
NOISE VOLTAGE (0.2µV/DIV)
VOLTAGE NOISE DENSITY (nV/√Hz)
CURRENT NOISE DENSITY (fA/√Hz)
1000
1
1
10
100
FREQUENCY (Hz)
1000
2
0
6
4
TIME (SEC)
LT1112/14 • TPC10
LT1112S8, LT1114N/S PACKAGES
LT1114J PACKAGE
LT1112J8, N8 PACKAGES
4
2A
3A
2
2B
0
1A
3B
–2
1B
–4
–6
0
2.5
0
1
2
3
4
TIME (MONTHS)
COMMON-MODE RANGE OR OUTPUT SWING (V)
±1.1
±1.0
±0.9
100
80
60
40
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
LT1112/14 • TPC16
400
TA = 125°C
TA = 25°C
300
TA = –55°C
200
6
0
±10
±15
±5
SUPPLY VOLTAGE (V)
Output Voltage Swing
vs Load Current
V+
V + – 0.2
V+
VS = ±1V TO ±20V
IL < 100µA
V+ – 1
V + – 0.4
SWING
V + – 0.6
V + – 0.8
V + – 1.0
CM RANGE
V – + 0.8
SWING
V – + 0.6
V – + 0.4
CM RANGE
VS = ±1V TO ± 20V
TA = 25°C
MAX IL AT ±1V = 1.3mA
AT ±1.5V = 3mA
V+ – 2
V+ – 3
V– + 3
V– + 2
V– + 1
V – + 0.2
V–
–75
±20
LT1112/14 • TPC15
Common-Mode Range and
Voltage Swing with Respect to
Supply Voltages
Minimum Supply Voltage vs Temp
Voltage Gain at Minimum Supply
Voltage
100
500
LT1112/14 • TPC14
LT1112/14 • TPC13
±1.2
5
OUTPUT SWING (V)
0.5
1.0
1.5
2.0
TIME AFTER POWER ON (MINUTES)
80
600
VS = ±15V
TA = 25°C
SUPPLY CURRENT PER AMPLIFIER (µA)
CHANGE IN OFFSET VOLTAGE (µV)
CHANGE IN OFFSET VOLTAGE (µV)
2
0
60
40
TIME (SEC)
Supply Current per Amplifier
vs Supply Voltage
6
VS = ±15V
TA = 25°C
1
20
LT1112/14 • TPC12
Long Term Stability of Three
Representative Units
3
MINIMUM SUPPLY (V)
0
10
LT1112/14 • TPC11
Warm-Up Drift
VOLTAGE GAIN (V/mV)
8
–25
25
75
TEMPERATURE (°C)
125
LT1112/14 • TPC17
V–
–9
–6
SINK
0
3
6
SOURCE
OUTPUT CURRENT (mA)
–3
9
LT1112/14 • TPC18
7
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Voltage Gain
100
40
140
VS = ±15V
TA = 25°C
VS = ±15V
TA = 25°C
VS = ±15V
TA = 25°C
120
120
–5
RL = 10k
0
RL = 2k
5
PHASE
80
GAIN (dB)
VOLTAGE GAIN (dB)
30
100
60
40
20
140
20
GAIN
160
10
0
10
15
–15
–10
–5
0
5
OUTPUT VOLTAGE (V)
10
–20
0.01 0.1
15
1
–10
0.01
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
180
PHASE MARGIN = 70°C
0
PHASE SHIFT (DEG)
CHANGE IN OFFSET VOLTAGE (µV)
–15
–10
Gain, Phase Shift vs Frequency
Voltage Gain vs Frequency
200
0.1
1
10
FREQUENCY (MHz)
LT1112/14 • TPC21
LT1112/14 • TPC19
LT1112/14 • TPC20
Common-Mode Rejection
vs Frequency
Power Supply Rejection
vs Frequency
100
80
60
40
20
10
10k
1k
100
FREQUENCY (Hz)
100k
NEGATIVE
SUPPLY
100
80
POSITIVE
SUPPLY
60
1M
1
10
100 1k
10k
FREQUENCY (Hz)
1M
SLEW
70
800
60
700
OUTPUT IMPEDANCE (Ω)
80
GBW
100
125
LT1112/14 • TPC25
100k
1M
Capacitive Loading Handling
120
100
10
AV = 100
AV = +1
1
0.1
VS = ±15V
TA = 25°C
80
60
AV = +1
40
AV = 10
0.01
50
25
0
75
TEMPERATURE (°C)
1k
100
10k
FREQUENCY (Hz)
10
LT1112/14 • TPC24
VS = ±15V
TA = 25°C
100
φm
AMP 1 IN UNITY-GAIN
20VP-P, RL = 2k
AMP 2 IN GAIN = 1000
RS = 100Ω, RF = 100k
1
1000
PHASE MARGIN (DEG)
GAIN-BANDWIDTH PRODUCT (kHz) SLEW RATE (V/µs)
100k
Closed-Loop Output Impedance
0.4
600
–50 –25
100
LT1112/14 • TPC23
Slew Rate, Gain-Bandwidth
Product and Phase Margin
vs Temperature
0.2
120
80
LT1112/14 • TPC22
0.3
140
40
OVERSHOOT (%)
1
120
20
0.1
0
VS = ±15V
TA = 25°C
VS = ±15V
TA = 25°C
CHANNEL SEPARATION (dB)
POWER SUPPLY REJECTION RATIO (dB)
COMMON-MODE REJECTION RATIO (dB)
VS = ±15V
TA = 25°C
120
8
Channel Separation vs Frequency
160
140
140
0.001
20
1
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
LT1112/14 • TPC26
0
0.1
0.00001 0.0001 0.001 0.01
CAPACITIVE LOAD (µF)
1
10
LT1112/14 • TPC27
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Small-Signal Transient Response
Undistorted Output Voltage
vs Frequency
Large-Signal Transient Response
PEAK-TO-PEAK OUTPUT VOLTAGE (V)
5V/DIV
20mV/DIV
28
50µs/DIV
2µs/DIV
AV = +1
RF = 10k
CF = 100pF
VS = ±15V
W
U
UO
APPLICATI
VS = ±15V
20
16
12
8
VS = ±5V
4
0
1
10
100
FREQUENCY (kHz)
1000
LT1112/14 • TPC30
U
AV = +1
CL = 500pF
VS = ±15V
TA = 25°C
RL = 10k
24
S I FOR ATIO
The LT1112 dual and LT1114 quad in the plastic and
ceramic DIP packages are pin compatible to and directly
replace such precision op amps as the OP-200, OP-297,
AD706 duals and OP-400, OP-497, AD704 quads with
improved price/performance.
the input is driven by a fast large-signal pulse (>1V), the
input protection diodes effectively short the output to the
input during slewing, and a current, limited only by the
output short-circuit protection, will flow through the
diodes.
The LT1112 in the S8 surface mount package has the
standard pin configuration, i.e., the same configuration as
the plastic and ceramic DIP packages.
The use of a feedback resistor is recommended because
this resistor keeps the current below the short-circuit limit,
resulting in faster recovery and settling of the output.
The LT1114 quad is offered in the narrow 16-pin surface
mount package. All competitors are in the wide 16-pin
package which occupies 1.8 times the area of the narrow
package. The wide package is also 1.8 times thicker than
the narrow package.
The input voltage of the LT1112/1114 should never exceed
the supply voltages by more than a diode drop. However,
the example below shows that as the input voltage exceeds
the common-mode range, the LT1112’s output clips
cleanly, without any glitches or phase reversal. The OP297 exhibits phase reversal. The photos also illustrate that
both the input and output ranges of the LT1112 are within
The inputs of the LT1112/1114 are protected with back-toback diodes. In the voltage follower configuration, when
Voltage Follower with Input Exceeding the Common-Mode Range (VS = ±5V)
INPUT: ±5.2V Sine Wave
LT1112 Output
OP-297 Output
9
LT1112/LT1114
U
W
U
UO
APPLICATI
S I FOR ATIO
800mV of the supplies. The effect of input and output
overdrive on the other amplifiers in the LT1112 or
LT1114 packages is negligible, as each amplifier is
biased independently.
Input offset current = 100pA
Input resistance = 800GΩ
Input noise = 0.42µVP-P
Three Op Amp Instrumentation Amplifier
Advantages of Matched Dual and Quad Op Amps
In many applications the performance of a system depends on the matching between two operational amplifiers rather than the individual characteristics of the two op
amps. Two or three op amp instrumentation amplifiers,
tracking voltage references and low drift active filters are
some of the circuits requiring matching between two op
amps.
The well-known triple op amp configuration illustrates
these concepts. Output offset is a function of the difference between the offsets of the two halves of the LT1112.
This error cancellation principle holds for a considerable
number of input referred parameters in addition to offset
voltage and its drift with temperature. Input bias current
will be the average of the two noninverting input currents
(IB+). The difference between these two currents (∆IB+) is
the offset current of the instrumentation amplifier. Common-mode and power supply rejections will be dependent
only on the match between the two amplifiers (assuming
perfect resistor matching).
The concepts of common-mode and power supply rejection ratio match (∆CMRR and ∆PSRR) are best demonstrated with a numerical example:
Assume CMRRA = + 1µV/V or 120dB,
and CMRRB = + 0.75µV/V or 122.5dB,
then ∆CMRR = 0.25µV/V or 132dB;
if CMRRB = – 0.75µV/V which is still 122.5dB,
then ∆CMRR = 1.75µV/V or 115dB.
Clearly the LT1112/LT1114, by specifying and guaranteeing all of these matching parameters, can significantly
improve the performance of matching-dependent
circuits.
Typical performance of the instrumentation amplifier:
Input offset voltage = 35µV
Offset voltage drift = 0.3µV/°C
Input bias current = 80pA
10
IN–
R4
100Ω
0.5%
+
1/2 LT1112
OR
1/4 LT1114
– A
R6
10k
0.5%
R1
10k
1%
–
R3
2.1k
1%
R8
200Ω
–
IN+
1/2 LT1112
OR
1/4
+ LT1114
D
C1
33pF
R10
1M
R2
R5
10k 100Ω
1% 0.5%
LT1097 OR
1/4LT1114
+B OR C
OUTPUT
GAIN = 1000
R7
9.88k
0.5%
TRIM R8 FOR GAIN
TRIM R9 FOR DC
COMMON-MODE REJECTION
TRIM R10 FOR AC
COMMON-MODE REJECTION
R9
200Ω
LT1112/14 • AI02
When the instrumentation amplifier is used with high
impedance sources, the LT1114 is recommended because its CMRR vs frequency performance is better than
the LT1112’s. For example, with two matched 1MΩ source
resistors, CMRR at 100Hz is 100dB with the LT1114, 76dB
with the LT1112.
This difference is explained by the fact that capacitance
between adjacent pins on an IC package is about 0.25pF
(including package, socket and PC board trace capacitances).
On the dual op amp package, positive input A is next to the
V – pin (AC ground), while positive input B has no AC
ground pin adjacent to it, resulting in a 0.25pF input
capacitance mismatch. At 100Hz, 0.25pF represents a
6.4 × 109 input impedance mismatch, which is only 76dB
higher than the 1MΩ source resistors.
On the quad package, all four inputs are adjacent to a
power supply terminal–therefore, there is no mismatch.
LT1112/LT1114
UO
TYPICAL APPLICATI
Dual Buffered ±0.617V Reference Powered by Two AA Batteries
+1.5V
RX*
15k
*OPTIONAL
+
1/2 LT1112
+0.617V
–
20k
0.1%
LT1004-1.2
TOTAL SUPPLY CURRENT = 700µA
WORKS WITH BATTERIES DISCHARGED
TO ±1.3V
AT ±1.5V: MAXIMUM LOAD CURRENT = 800µA;
CAN BE INCREASED WITH OPTIONAL RX, RY;
AT RX = RY = 750Ω LOAD CURRENT = 2mA
TEMPERATURE COEFFICIENT LIMITED BY
REFERENCE = 20ppm/°C
100pF
–
1/2 LT1112
+
RY*
20k
0.1%
*OPTIONAL
–1.5V
–0.617V
LT1112/14 • TA03
W
W
SCHE ATIC DIAGRA (1/2 LT1112, 1/4 LT1114)
12pF
30k
V+
20µA
30k
35µA
Q35 Q34
Q19
Q22
30pF
800Ω
80µA
1.5k
4k
Q33
Q21
Q6
Q5
Q25
Q27
Q29
S
Q8
Q4
Q24
28Ω
Q7
3k
90Ω
OUT
Q13
Q11 Q23
INVERTING
INPUT
S
–
2.5k
S
Q1
Q2
Q20
S
Q3
50k
1.5k
Q26
J1
30Ω
Q28
Q32
Q9
NONINVERTING
INPUT
Q12
Q16
10k
Q18
Q10
+
Q30
Q17
460Ω
Q31
15µA
5µA
Q14
Q15
5µA
V–
200Ω
460Ω
200Ω
460Ω
Q1 TO Q4 ARE SUPERGAIN TRANSISTORS
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights.
LT1112/14 • SD01
11
LT1112/LT1114
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
0.290 – 0.320
(7.366 – 8.128)
J8 Package
8-Lead Ceramic DIP
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.460)
0.405
(10.287)
MAX
0.005
(0.127)
MIN
0.200
(5.080)
MAX
8
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
1
0.038 – 0.068
(0.965 – 1.727)
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
N8 Package
8-Lead Plastic DIP
3
+0.025
0.325 –0.015
8
7
6
5
0.250 ± 0.010
(6.350 ± 0.254)
0.125
(3.175)
MIN
0.045 ± 0.015
(1.143 ± 0.381)
)
4
0.400
(10.160)
MAX
0.130 ± 0.005
(3.302 ± 0.127)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
+0.635
–0.381
2
0.055
(1.397)
MAX
0.125
3.175
0.100 ± 0.010 MIN
(2.540 ± 0.254)
0.014 – 0.026
(0.360 – 0.660)
8.255
5
0° – 15°
0.385 ± 0.025
(9.779 ± 0.635)
(
6
7
0.020
(0.508)
MIN
1
2
4
3
0.018 ± 0.003
(0.457 ± 0.076)
0.100 ± 0.010
(2.540 ± 0.254)
0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020
× 45°
(0.254 – 0.508)
S8 Package
8-Lead Plastic SOIC
0.014 – 0.019
(0.355 – 0.483)
0.228 – 0.244
(5.791 – 6.197)
0.050
(1.270)
BSC
0.150 – 0.157
(3.810 – 3.988)
1
0.005
(0.127)
MIN
0.200
(5.080)
MAX
0.290 – 0.320
(7.366 – 8.128)
J Package
14-Lead Ceramic DIP
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.460)
0.038 – 0.068
(0.965 – 1.727)
0.100 ± 0.010
(2.540 ± 0.254)
0.014 – 0.026
(0.360 – 0.660)
0.300 – 0.325
(7.620 – 8.255)
14
12
13
11
10
9
8
0.220 – 0.310
(5.588 – 7.874)
0.025
(0.635)
RAD TYP
2
)
4
5
6
7
0.770
(19.558)
MAX
0.065
(1.651)
TYP
14
13
12
11
10
9
8
1
2
3
4
5
6
7
0.260 ± 0.010
(6.604 ± 0.254)
0.009 – 0.015
(0.229 – 0.381)
+0.025
0.325 –0.015
3
0.098
(2.489)
MAX
0.125
(3.175)
MIN
0.045 – 0.065
(1.143 – 1.651)
0.015
(0.380)
MIN 0.130 ± 0.005
(3.302 ± 0.127)
N Package
14-Lead Plastic DIP
(
4
0.785
(19.939)
MAX
1
+0.635
–0.381
3
2
0° – 15°
0.385 ± 0.025
(9.779 ± 0.635)
8.255
5
6
0.004 – 0.010
(0.101 – 0.254)
0.016 – 0.050
0.406 – 1.270
0°– 8° TYP
7
8
0.053 – 0.069
(1.346 – 1.752)
0.008 – 0.010
(0.203 – 0.254)
0.075 ± 0.015
(1.905 ± 0.381)
0.018 ± 0.003
(0.457 ± 0.076)
0.100 ± 0.010
(2.540 ± 0.254)
0.125
(3.175)
MIN
0.386 – 0.394
(9.804 – 10.008)
0.010 – 0.020
× 45°
(0.254 – 0.508)
S Package
16-Lead Plastic SOIC
16
0.004 – 0.010
(0.101 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
14
13
12
11
10
9
0.008 – 0.010
(0.203 – 0.254)
0° – 8°
TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
TYP
0.150 – 0.157
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
12
15
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
2
3
4
5
6
7
8
LT/GP 1292 10K REV 0
 LINEAR TECHNOLOGY CORPORATION 1992