LINER LTC1046

LTC1046
“Inductorless”
5V to – 5V Converter
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FEATURES
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DESCRIPTIO
50mA Output Current
Plug-In Compatible with ICL7660/LTC1044
ROUT = 35Ω Maximum
300µA Maximum No Load Supply Current at 5V
Boost Pin (Pin 1) for Higher Switching Frequency
97% Minimum Open-Circuit Voltage Conversion
Efficiency
95% Minimum Power Conversion Efficiency
Wide Operating Supply Voltage Range: 1.5V to 6V
Easy to Use
Low Cost
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APPLICATIO S
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Designed to be pin-for-pin and functionally compatible
with the ICL7660 and LTC1044, the LTC1046 provides 2.5
times the output drive capability.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Conversion of 5V to ± 5V Supplies
Precise Voltage Division, VOUT = VIN /2
Supply Splitter, VOUT = ± VS /2
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The LTC®1046 is a 50mA monolithic CMOS switched
capacitor voltage converter. It plugs in for ICL7660/
LTC1044 in 5V applications where more output current is
needed. The device is optimized to provide high current
capability for input voltages of 6V or less. It trades off
operating voltage to get higher output current. The
LTC1046 provides several voltage conversion functions:
the input voltage can be inverted (VOUT = – VIN), divided
(VOUT =VIN/2) or multiplied (VOUT = ± nVIN).
TYPICAL APPLICATIO
Output Voltage vs Load Current for V + = 5V
–5
TA = 25°C
Generating – 5V from 5V
2
+
10µF
3
4
BOOST
CAP +
GND
CAP –
V+
OSC
LV
VOUT
8
5V INPUT
7
6
5
–5V INPUT
10µF
+
1
1046 TA01
OUTPUT VOLTAGE (V)
–4
LTC1046
ICL7660/LTC1044,
ROUT = 55Ω
–3
LTC1046,
ROUT = 27Ω
–2
–1
0
0
10
20
30
40
LOAD CURRENT, IL (mA)
50
1046 TA02
1
LTC1046
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ABSOLUTE
PACKAGE/ORDER I FOR ATIO
(Note 1)
Supply Voltage ....................................................... 6.5V
Input Voltage on Pins 1, 6 and 7
(Note 2) ............................ – 0.3 < VIN < (V +) + 0.3V
Current into Pin 6 .................................................. 20µA
Output Short Circuit Duration
(V + ≤ 6V) ............................................... Continuous
Operating Temperature Range
LTC1046C .................................... 0°C ≤ TA ≤ 70°C
LTC1046I ................................. – 40°C ≤ TA ≤ 85°C
LTC1046M .................................... – 55°C to 125°C
Storage Temperature Range ............... – 65°C to + 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
ORDER PART
NUMBER
TOP VIEW
BOOST 1
8
V+
CAP + 2
7
OSC
GND 3
6
LV
CAP – 4
5
VOUT
J8 PACKAGE
8-LEAD CERDIP
LTC1046CN8
LTC1046CS8
LTC1046IN8
LTC1046IS8
LTC1046MJ8
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
S8 PART MARKING
TJMAX = 160°C, θJA = 100°C (J8)
TJMAX = 110°C, θJA = 130°C (N8)
TJMAX = 150°C, θJA = 150°C (S8)
1046
1046I
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V + = 5V, COSC = 0pF, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
IS
Supply Current
RL = ∞, Pins 1 and 7 No Connection
RL = ∞, Pins 1 and 7 No Connection,
V+ = 3V
V+L
Minimum Supply Voltage
RL = 5kΩ
●
V+H
Maximum Supply Voltage
RL = 5kΩ
●
ROUT
Output Resistance
V+ = 5V, IL = 50mA (Note 3)
V+ = 2V, IL = 10mA
MIN
LTC1046C
TYP
MAX
165
35
MIN
300
1.5
LTC1046I/M
TYP
MAX
165
35
UNITS
µA
µA
1.5
V
6
27
27
60
●
●
300
35
45
85
27
27
60
6
V
35
50
90
Ω
Ω
Ω
fOSC
Oscillator Frequency
V+ = 5V (Note 4)
V+ = 2V
20
4
30
5.5
20
4
30
5.5
kHz
kHz
PEFF
Power Efficiency
RL = 2.4kΩ
95
97
95
97
%
VOUTEFF
Voltage Conversion
Efficiency
RL = ∞
97
99.9
97
99.9
%
IOSC
Oscillator Sink or Source
Current
VOSC = 0V or V+
Pin 1 = 0V
Pin 1 = V+
Note 1: Absolute Maximum Ratings are those values beyond which
the life of the device may be impaired.
Note 2: Connecting any input terminal to voltages greater than V+ or
less than ground may cause destructive latch-up. It is recommended
that no inputs from sources operating from external supplies be
applied prior to power-up of the LTC1046.
2
●
●
4.2
15
35
45
4.2
15
40
50
µA
µA
Note 3: ROUT is measured at TJ = 25°C immediately after power-on.
Note 4: fOSC is tested with COSC = 100pF to minimize the effects of test
fixture capacitance loading. The 0pF frequency is correlated to this 100pF
test point, and is intended to simulate the capacitance at pin 7 when the
device is plugged into a test socket and no external capacitor is used.
LTC1046
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TYPICAL PERFOR A CE CHARACTERISTICS
Output Resistance vs
Supply Voltage
1000
TA = 25°C
V + = 5V
IL = 10mA
400
300
OUTPUT RESISTANCE, RO (Ω)
OUTPUT RESISTANCE, RO (Ω)
500
C1 = C2
= 1µF
200
C1 = C2
= 10µF
C1 = C2
= 100µF
100
Output Resistance vs
Temperature
80
TA = 25°C
IL = 3mA
C1 = C2 = 10µF
70
OUTPUT RESISTANCE (Ω)
Output Resistance vs
Oscillator Frequency
(Using Test Circuit in Figure 1)
COSC = 100pF
100
COSC = 0pF
60
V + = 2V, COSC = 0pF
50
40
V + = 5V, COSC = 0pF
30
20
1k
10k
10
100k
0
1
2
3
4
5
1046 G01
8
80
IS
6
50
5
40
4
3
30
TA = 25°C
V + = 2V
C1 = C2 = 10µF
fOSC = 8kHz
20
10
0
0
1
2
3 4 5 6 7 8
LOAD CURRENT, IL (mA)
9
2
1
100
100
90
90
PEFF
80
80
70
70
60
60
50
50
IS
40
40
30
30
TA = 25°C
V + = 5V
C1 = C2 = 10µF
fOSC = 30kHz
20
10
0
0
10
0
10
20
50
30
40
LOAD CURRENT, IL (mA)
3
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TA = 25°C
V + = 5V
fOSC = 30kHz
C1 = C2 = 10µF
4
–1.0
–1.5
2
1
0
–1
–2
–3
SLOPE = 52Ω
–2.0
–4
–2.5
SLOPE = 27Ω
2
4
6 8 10 12 14 16 18 20
LOAD CURRENT, IL (mA)
1046 G07
94
C
92
V + = 5V
TA = 25°C
C1 = C2
B
90
E
88
86
D
84
F
82
1k
10k
100k
OSCILLATOR FREQUENCY, fOSC (Hz)
0
1M
1046 G06
Oscillator Frequency as a
Function of COSC
V + = 5V
TA = 25°C
PIN 1 = V +
10
PIN 1 = OPEN
1
0.1
–5
0
96
80
100
70
A = 100µF, 1mA
B = 100µF, 15mA
C = 10µF, 1mA
D = 10µF, 15mA
E = 1µF, 1mA
F = 1µF, 15mA
A
100
5
–0.5
0
98
Output Voltage vs Load Current
for V+ = 5V
2.5
0.0
10
OSCILLATOR FREQUENCY, fOSC (kHz)
Output Voltage vs Load Current
for V+ = 2V
0.5
60
20
100
1046 G05
1046 G04
TA = 25°C
2.0 V + = 2V
fOSC = 8kHz
1.5 C1
= C2 = 10µF
1.0
Power Conversion Efficiency vs
Oscillator Frequency
SUPPLY CURRENT (mA)
7
70
POWER CONVERSION EFFICIENCY, PEFF (%)
9
PEFF
SUPPLY CURRENT (mA)
POWER CONVERSION EFFICIENCY, PEFF (%)
10
125
1046 G03
Power Conversion Efficiency vs
Load Current for V+ = 5V
100
–25
0
75 100
25
50
AMBIENT TEMPERATURE (°C)
1046 G02
Power Conversion Efficiency vs
Load Current for V+ = 2V
60
10
–55
7
SUPPLY VOLTAGE, V + (V)
OSCILLATOR FREQUENCY, fOSC (Hz)
90
6
POWER CONVERSION EFFICIENCY, PEFF (%)
0
100
10 20 30 40 50 60 70 80 90 100
LOAD CURRENT, IL (mA)
1046 G08
10
100
10000
1000
1
EXTERNAL CAPACITOR (PIN 7 TO GND), COSC (pF)
1046 G09
3
LTC1046
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TYPICAL PERFOR A CE CHARACTERISTICS
(Using Test Circuit in Figure 1)
Oscillator Frequency as a
Function of Supply Voltage
40
TA = 25°C
COSC = 0pF
OSCILLATOR FREQUENCY, fOSC (kHz)
OSCILLATOR FREQUENCY, fOSC (kHz)
100
Oscillator Frequency vs
Temperature
10
1
0
1
2
3
6
4
5
AMBIENT TEMPERATURE (°C)
V + = 5V
COSC = 0pF
38
36
34
32
30
28
26
–55
7
–25
0
75 100
25
50
AMBIENT TEMPERATURE (°C)
1046 G10
125
1046 G11
TEST CIRCUIT
V + (5V)
LTC1046
1
2
+
C1
10µF
3
4
V+
BOOST
CAP +
OSC
LV
GND
CAP –
VOUT
IS
8
7
EXTERNAL
OSCILLATOR
6
IL
RL
5
COSC
VOUT
C2
10µF
+
1046 F01
Figure 1
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APPLICATI
S I FOR ATIO
Theory of Operation
To understand the theory of operation of the LTC1046, a
review of a basic switched capacitor building block is
helpful.
In Figure 2, when the switch is in the left position, capacitor
C1 will charge to voltage V1. The total charge on C1 will be
q1 = C1V1. The switch then moves to the right, discharging C1 to voltage V2. After this discharge time, the charge
on C1 is q2 = C1V2. Note that charge has been transferred
from the source, V1, to the output, V2. The amount of
charge transferred is:
∆q = q1 – q2 = C1(V1 – V2).
4
If the switch is cycled “f” times per second, the charge
transfer per unit time (i.e., current) is:
I = f • ∆q = f • C1(V1 – V2).
V1
V2
f
RL
C1
C2
1046 F02
Figure 2. Switched Capacitor Building Block
LTC1046
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APPLICATI
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Rewriting in terms of voltage and impedance equivalence,
I=
V1 – V 2
(1 / fC1)
V1 – V 2
.
REQUIV
=
A new variable, REQUIV, has been defined such that
REQUIV = 1/fC1. Thus, the equivalent circuit for the switched
capacitor network is as shown in Figure 3.
REQUIV
V1
V2
C2
REQUIV = 1
fC1
RL
Note also that power efficiency decreases as frequency
goes up. This is caused by internal switching losses which
occur due to some finite charge being lost on each
switching cycle. This charge loss per unit cycle, when
multiplied by the switching frequency, becomes a current
loss. At high frequency this loss becomes significant and
the power efficiency starts to decrease.
LV (Pin 6)
1046 F03
Figure 3. Switched Capacitor Equivalent Circuit
Examination of Figure 4 shows that the LTC1046 has the
same switching action as the basic switched capacitor
building block. With the addition of finite switch ON
resistance and output voltage ripple, the simple theory,
although not exact, provides an intuitive feel for how the
device works.
V+
(8)
As frequency is decreased, the output impedance will
eventually be dominated by the 1/fC1 term and power
efficiency will drop. The typical curves for power efficiency versus frequency show this effect for various capacitor values.
SW1
SW2
The internal logic of the LTC1046 runs between V+ and LV
(Pin 6). For V+ greater than or equal to 3V, an internal
switch shorts LV to GND (Pin 3). For V+ less than 3V, the
LV pin should be tied to ground. For V+ greater than or
equal to 3V, the LV pin can be tied to ground or left floating.
OSC (Pin 7) and BOOST (Pin 1)
The switching frequency can be raised, lowered or driven
from an external source. Figure 5 shows a functional
diagram of the oscillator circuit.
CAP +
(2)
BOOST
φ
3x
(1)
V+
+
C1
OSC
+2
φ
OSC
(7)
CAP –
(4)
VOUT
(5)
2I
C2
+
LV
(6)
CLOSED WHEN
V + > 3.0V
GND
(3)
I
BOOST
(1)
1046 F04
OSC
(7)
Figure 4. LTC1046 Switched Capacitor
Voltage Converter Block Diagram
For example, if you examine power conversion efficiency
as a function of frequency (see typical curve), this simple
theory will explain how the LTC1046 behaves. The loss,
and hence the efficiency, is set by the output impedance.
SCHMITT
TRIGGER
∼14pF
2I
LV
(6)
I
1046 F05
Figure 5. Oscillator
5
LTC1046
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APPLICATI
S I FOR ATIO
By connecting the BOOST (Pin 1) to V+, the charge and
discharge current is increased and, hence, the frequency
is increased by approximately three times. Increasing the
frequency will decrease output impedance and ripple for
higher load currents.
Loading Pin 7 with more capacitance will lower the frequency. Using the BOOST pin in conjunction with external
capacitance on Pin 7 allows user selection of the frequency over a wide range.
Driving the LTC1046 from an external frequency source
can be easily achieved by driving Pin 7 and leaving the
BOOST pin open, as shown in Figure 6. The output current
from Pin 7 is small, typically 15µA, so a logic gate is
capable of driving this current. The choice of using a CMOS
logic gate is best because it can operate over a wide supply
voltage range (3V to 15V) and has enough voltage swing
to drive the internal Schmitt trigger shown in Figure 5. For
5V applications, a TTL logic gate can be used by simply
adding an external pull-up resistor (see Figure 6).
Capacitor Selection
While the exact values of CIN and COUT are noncritical,
good quality, low ESR capacitors such as solid tantalum
are necessary to minimize voltage losses at high currents.
For CIN the effect of the ESR of the capacitor will be
multiplied by four, due to the fact that switch currents are
approximately two times higher than output current, and
losses will occur on both the charge and discharge cycle.
This means that using a capacitor with 1Ω of ESR for CIN
will have the same effect as increasing the output impedance of the LTC1046 by 4Ω. This represents a significant
increase in the voltage losses. For COUT the effect of ESR
is less dramatic. COUT is alternately charged and discharged at a current approximately equal to the output
current, and the ESR of the capacitor will cause a step
function to occur, in the output ripple, at the switch
transitions. This step function will degrade the output
regulation for changes in output load current, and should
be avoided. Realizing that large value tantalum capacitors
can be expensive, a technique that can be used is to
parallel a smaller tantalum capacitor with a large aluminum electrolytic capacitor to gain both low ESR and
reasonable cost. Where physical size is a concern some
of the newer chip type surface mount tantalum capacitors
can be used. These capacitors are normally rated at
working voltages in the 10V to 20V range and exhibit very
low ESR (in the range of 0.1Ω).
REQUIRED FOR TTL LOGIC
V+
LTC1046
NC
1
2
+
C1
3
4
BOOST
CAP +
GND
CAP –
V+
OSC
LV
VOUT
8
100k
7
OSC INPUT
6
5
–(V +)
C2
+
1046 F06
Figure 6. External Clocking
6
LTC1046
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TYPICAL APPLICATI
S
Negative Voltage Converter
Figure 7 shows a typical connection which will provide a
negative supply from an available positive supply. This
circuit operates over full temperature and power supply
ranges without the need of any external diodes. The LV pin
(Pin 6) is shown grounded, but for V+ ≥ 3V, it may be
floated, since LV is internally switched to GND (Pin 3) for
V+ ≥ 3V.
The output voltage (Pin 5) characteristics of the circuit are
those of a nearly ideal voltage source in series with an 27Ω
resistor. The 27Ω output impedance is composed of two
terms: 1) the equivalent switched capacitor resistance
(see Theory of Operation), and 2) a term related to the ON
resistance of the MOS switches.
At an oscillator frequency of 30kHz and C1 = 10µF, the first
term is:
the typical curves of output impedance and power efficiency versus frequency. For C1 = C2 = 10µF, the output
impedance goes from 27Ω at fOSC = 30kHz to 225Ω at
fOSC = 1kHz. As the 1/fC term becomes large compared to
switch ON resistance term, the output resistance is determined by 1/fC only.
Voltage Doubling
Figure 8 shows a two diode, capacitive voltage doubler.
With a 5V input, the output is 9.1V with no load and 8.2V
with a 10mA load.
LTC1046
1
2
3
4
V+
BOOST
CAP +
OSC
LV
GND
CAP –
VOUT
V+
1.5V TO 6V
8
+
7
VD
6
REQUIRED
FOR
V + < 3V
5
+
VD
+
VOUT = 2
(VIN – 1)
+
10µF
REQUIV =
1
(fOSC / 2) • C1
=
10µF
1046 F08
Figure 8. Voltage Doubler
1
= 6.7Ω.
15 • 103 • 10 • 10 –6
Ultraprecision Voltage Divider
Notice that the equation for REQUIV is not a capacitive
reactance equation (XC = 1/ωC) and does not contain a 2π
term.
An ultraprecision voltage divider is shown in Figure 9. To
achieve the 0.0002% accuracy indicated, the load current
should be kept below 100nA. However, with a slight loss
in accuracy, the load current can be increased.
The exact expression for output impedance is complex,
but the dominant effect of the capacitor is clearly shown on
LTC1046
1
LTC1046
1
2
+
4
CAP +
GND
CAP –
V+
OSC
LV
VOUT
V+
1.5V TO 6V
8
7
REQUIRED FOR V + < 3V
5
VOUT = –V +
10µF
TMIN ≤ TA ≤ TMAX
2
+
C1
3
10µF
6
+
10µF
3
BOOST
1046 F07
Figure 7. Negative Voltage Converter
V+
±0.002%
2
TMIN ≤ TA ≤ TMAX
IL ≤ 100nA
4
+
BOOST
CAP +
GND
CAP –
V+
OSC
LV
VOUT
8
7
V+
3V TO 12V
6
5
1046 F09
C2
10µF
REQUIRED FOR V + < 6V
Figure 9. Ultraprecision Voltage Divider
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LTC1046
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TYPICAL APPLICATI
S
Battery Splitter
equal to one half the input voltage. The output voltages are
both referenced to Pin 3 (output common). If the input
voltage between Pin 8 and Pin 5 is less than 6V, Pin 6
should also be connected to Pin 3, as shown by the
dashed line.
A common need in many systems is to obtain positive and
negative supplies from a single battery or single power
supply system. Where current requirements are small, the
circuit shown in Figure 10 is a simple solution. It provides
symmetrical positive or negative output voltages, both
Paralleling for Lower Output Resistance
Additional flexibility of the LTC1046 is shown in Figures 11
and 12. Figure 11 shows two LTC1046s connected in
parallel to provide a lower effective output resistance. If,
however, the output resistance is dominated by 1/fC1,
increasing the capacitor size (C1) or increasing the frequency will be of more benefit than the paralleling
circuit shown.
LTC1046
1
VB
9V
2
C1
10µF
+
3
4
V+
BOOST
CAP +
OSC
LV
GND
CAP –
VOUT
8
+VB /2
4.5V
7
REQUIRED FOR VB < 6V
6
5
–VB /2
–4.5V
+
3V ≤ VB ≤ 12V
Figure 12 makes use of “stacking” two LTC1046s to
provide even higher voltages. In Figure 12, a negative
voltage doubler or tripler can be achieved depending upon
how Pin 8 of the second LTC1046 is connected, as shown
schematically by the switch.
C2
10µF
OUTPUT COMM0N
1046 F10
Figure 10. Battery Splitter
V+
LTC1046
1
2
C1
10µF
+
3
4
LTC1046
V+
BOOST
CAP +
OSC
LV
GND
CAP –
VOUT
8
1
7
2
6
C1
10µF
5
+
3
4
V+
BOOST
CAP +
OSC
LV
GND
CAP –
VOUT
8
7
6
5
VOUT = –(V +)
1/4 CD4077
+
OPTIONAL SYNCHRONIZATION
CIRCUIT TO MINIMIZE RIPPLE
C2
20µF
1046 F11
Figure 11. Paralleling for 100mA Load Current
FOR VOUT = –3V +
LTC1046
1
+
10µF
3
4
BOOST
CAP +
GND
CAP –
OSC
LV
VOUT
+
2
C1
10µF
8
V+
7
LTC1046
1
2
6
3
5
4
–(V +)
10µF
FOR VOUT = –2V +
BOOST
CAP +
GND
CAP –
V+
OSC
LV
VOUT
8
7
6
5
VOUT
10µF
+
V+
+
1046 F12
Figure 12. Stacking for Higher Voltage
8
LTC1046
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PACKAGE DESCRIPTIO
Dimensions in inches (milimeters) unless otherwise noted.
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
CORNER LEADS OPTION
(4 PLCS)
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.005
(0.127)
MIN
0.405
(10.287)
MAX
8
7
6
5
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
1
0.300 BSC
(0.762 BSC)
2
3
4
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
0.045 – 0.065
(1.143 – 1.651)
0.014 – 0.026
(0.360 – 0.660)
0.100
(2.54)
BSC
0.125
3.175
MIN
J8 1298
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LTC1046
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PACKAGE DESCRIPTIO
Dimensions in inches (milimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
(
+0.035
0.325 –0.015
8.255
+0.889
–0.381
)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.100
(2.54)
BSC
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
10
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175) 0.020
MIN (0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
N8 1098
LTC1046
U
PACKAGE DESCRIPTIO
Dimensions in inches (milimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
2
3
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SO8 1298
11
LTC1046
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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12V CMOS Voltage Converter
Doubler or Inverter, 20mA IOUT, 1.5V to 12V Input Range
LT®1054
Switched Capacitor Voltage Converter with Regulator
Doubler or Inverter, 100mA IOUT, SO-8 Package
LTC1550
Low Noise, Switched Capacitor Regulated Inverter
< 1mVP-P Output Ripple, 900kHz Operation, SO-8 Package
LT1611
1.4MHz Inverting Switching Regulator
5V to –5V at 150mA, Low Output Noise, SOT-23 Package
LT1617
Micropower Inverting Switching Regulator
5V to – 5V at 20µA Supply Current, SOT-23 Package
LTC1754-5
Micropower Regulated 5V Charge Pump in SOT-23
5V/50mA, 13µA Supply Current, 2.7V to 5.5V Input Range
12
Linear Technology Corporation
1046fa LT/TP 1099 2K REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1991