LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 Low Noise Regulated Charge Pump in 2 × 2 DFN FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ U ■ DESCRIPTIO Fixed 3.3V or 5V Outputs VIN Range: 1.8V to 4.5V (LTC3204-3.3/LTC3204B-3.3) 2.7V to 5.5V (LTC3204-5/LTC3204B-5) Output Current: Up to 150mA (LTC3204-5/LTC3204B-5) Up to 50mA (LTC3204-3.3/LTC3204B-3.3) Automatic Burst Mode® Operation with IQ = 48µA (LTC3204-3.3/LTC3204-5) Constant Frequency Operation at All Loads (LTC3204B-3.3/LTC3204B-5) Low Noise Constant Frequency (1.2MHz) Operation* Built-In Soft-Start Reduces Inrush Current Shutdown Disconnects Load from Input Shutdown Current <1µA Short-Circuit/Thermal Protection Available in Low Profile 6-Lead DFN Package U APPLICATIO S ■ ■ ■ ■ ■ 2 AA Cell to 3.3V Li-Ion to 5V USB On-The-Go Devices White LED Drivers Handheld Devices The LTC®3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 are low noise, constant frequency (1.2MHz) switched capacitor voltage doublers. The LTC3204-3.3/LTC3204B-3.3 can produce a regulated output voltage of 3.3V from a minimum input voltage of 1.8V (2 alkaline cells) whereas the LTC3204-5/LTC3204B-5 can produce 5V from a minimum of 2.7V (Li-Ion battery) input. LTC3204-3.3/LTC3204-5 feature automatic Burst Mode® operation at light loads to maintain low supply current whereas LTC3204B-3.3/LTC3204B-5 feature constant frequency operation at any load. Built-in soft-start circuitry prevents excessive inrush current during start-up. Thermal shutdown and current-limit circuitry allow the parts to survive a continuous short-circuit from VOUT to GND. High switching frequency minimizes overall solution footprint by allowing the use of tiny ceramic capacitors. In shutdown, the load is disconnected from the input and the quiescent current is reduced to <1µA. The LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 are available in a low profile (0.75mm) 6-lead 2mm × 2mm DFN package. , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Burst Mode is a registered trademark of Linear Technology Corporation. *Protected by U.S. Patents including 6411531. TYPICAL APPLICATIO U Output Ripple vs Load Current 30 OUTPUT CAPACITANCE = 2.2µF VIN = 3.6V 2.2µF 2.7V TO 5.5V 2 2.2µF 1, 7 OFF ON 6 5 C– VIN 4 C+ 3 VOUT LTC3204-5/ LTC3204B-5 5V 2.2µF GND SHDN 3204 TA01a OUTPUT RIPPLE (mVp-p) 25 20 LTC3204-5 15 10 LTC3204B-5 5 0 0 25 50 75 100 125 OUTPUT CURRENT (mA) 150 3204 TA01b 3204fa 1 LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 AXI U RATI GS U W W W ABSOLUTE U W U PACKAGE/ORDER I FOR ATIO (Note 1) VIN to GND ................................................... –0.3V to 6V VOUT to GND ............................................. –0.3V to 5.5V SHDN to GND............................................... –0.3V to 6V VOUT Short-Circuit Duration ............................. Indefinite Operating Temperature Range (Note 2) ...–40°C to 85°C Storage Temperature Range.................. –65°C to 125°C Maximum Junction Temperature .......................... 125°C ORDER PART NUMBER LTC3204EDC-3.3 LTC3204EDC-5 LTC3204BEDC-3.3 LTC3204BEDC-5 DC PART MARKING LBJV LBNK LBVF LBVG TOP VIEW GND 1 VIN 2 6 SHDN 7 VOUT 3 5 C– 4 C+ DC PACKAGE 6-LEAD (2mm × 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 80°C/W EXPOSED PAD IS GND (PIN 7) MUST BE SOLDERED TO PCB Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range. Specifications are at TA = 25°C, VIN = 2.4V (LTC3204-3.3/LTC3204B-3.3) or 3.6V (LTC3204-5/LTC3204B-5), SHDN = VIN, CFLY = 2.2µF, CIN = 2.2µF, COUT = 2.2µF unless otherwise noted. SYMBOL PARAMETER CONDITIONS VIN Input Voltage Range VOUT Output Voltage Range (LTC3204-3.3/LTC3204B-3.3) (LTC3204-5/LTC3204B-5) 1.8V < VIN < 4.5V, IOUT < 40mA 1.9V < VIN < 4.5V, IOUT < 50mA (LTC3204-3.3/LTC3204B-3.3) 2.7V < VIN < 5.5V, IOUT < 65mA 3.1V < VIN < 5.5V, IOUT < 150mA (LTC3204-5/LTC3204B-5) IOUT = 0 (LTC3204-3.3) IOUT = 0 (LTC3204-5) IOUT = 0 (LTC3204B-3.3) IOUT = 0 (LTC3204B-5) SHDN = 0V, VOUT = 0V (LTC3204-3.3) (LTC3204-5) IOUT = 100mA VIN = 3V, IOUT = 100mA (LTC3204-5/LTC3204B-5) IIN No Load Input Current ISHDN IBURST Shutdown Current Burst Mode Threshold VR η fOSC VIH VIL IIH IIL ROL Output Ripple Efficiency Switching Frequency SHDN Input Threshold SHDN Input Threshold SHDN Input Current SHDN Input Current Effective Open-Loop Output Resistance (Note 3) Output Current Limit Soft-Start Time ILIM TSS MIN ● ● 1.8 2.7 ● 3.168 ● 4.8 TYP ● 0.6 1.3 V V 3.3 3.432 V 5 48 60 1.25 3.6 5.2 15 20 20 82 1.2 Note 1: Absolute Maximum Ratings are those beyond which the life of a device may be impaired. Note 2: The LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 are guaranteed to meet performance specifications from 0°C to 70°C. ● 1.8 0.4 1 1 ● ● UNITS 4.5 5.5 1 ● SHDN = 0V VIN = 1.8V, VOUT = 3V (LTC3204-3.3/LTC3204B-3.3) VIN = 2.7V, VOUT = 4.5V (LTC3204-5/LTC3204B-5) VOUT = OV From the Rising Edge of SHDN to 90% of VOUT MAX –1 –1 7 6 300 0.75 V µA µA mA mA µA mA mA mVP-P % MHz V V µA µA Ω Ω mA ms Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: ROL ≡ (2VIN – VOUT)/IOUT 3204fa 2 LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 TYPICAL PERFOR A CE CHARACTERISTICS U W (TA = 25°C, CFLY = CIN = COUT = 2.2µF unless otherwise specified) Oscillator Frequency vs Temperature 1.4 1.25 1.3 1.00 0.75 0.50 0.25 0.9 VIN = 4.5V 1.2 VIN = 2.4V 1.1 VIN = 1.8V 1.0 1.5 2.0 2.5 3.0 3.5 SUPPLY VOLTAGE (V) 4.0 0.8 –50 4.5 –20 10 40 70 TEMPERATURE (°C) 100 3204 G01 0.7 HIGH-TO-LOW THRESHOLD 0.6 SHDN THRESHOLD HI-TO-LO (V) VIN = 3.2V 0.7 VIN = 2.4V VIN = 1.8V 0.6 0 50 100 150 TEMPERATURE (°C) VIN = 3.2V 0.7 VIN = 2.4V 0.6 VIN = 1.8V 0.5 0.4 –50 4.0 4.5 Short-Circuit Current vs Supply 0 50 100 150 TEMPERATURE (°C) 3204 G04 2.5 3.0 3.5 SUPPLY VOLTAGE (V) 350 0.8 0.8 2.0 3204 G03 SHDN HI-to-LO Threshold vs Temperature 0.9 0.5 –50 0.5 1.5 130 3204 G02 SHDN LO-to-HI Threshold vs Temperature SHDN THRESHOLD LO-TO-HI (V) LOW-TO-HIGH THRESHOLD 0.8 0.9 SHORT-CIRCUIT CURRENT (mA) 0 SHDN Threshold Voltage vs Supply Voltage THRESHOLD VOLTAGE (V) 1.50 FREQUENCY (MHz) FREQUENCY (MHz) Oscillator Frequency vs Supply Voltage 3204 G05 300 250 200 DEVICE CYCLES IN AND OUT OF THERMAL SHUTDOWN 150 100 50 0 1.5 2.0 2.5 3.0 3.5 SUPPLY VOLTAGE (V) 4.0 4.5 3204 G06 3204fa 3 LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 TYPICAL PERFOR A CE CHARACTERISTICS U W (TA = 25°C, CFLY = CIN = COUT = 2.2µF unless otherwise specified) Output Load Capability at 4% Below Regulation Load Regulation 400 3.35 LOAD CURRENT (mA) 3.25 VIN = 3.2V VIN = 1.8V 3.15 3.10 3.05 100 200 300 400 LOAD CURRENT (mA) TA = 25°C 300 250 TA = –45°C 200 6 100 0 1.5 500 2.5 3.0 2.0 SUPPLY VOLTAGE (V) 1.8 60 1.6 LTC3204B-3.3 1.4 56 1.2 54 1.0 52 0.8 0.6 LTC3204-3.3 0.4 46 10 Efficiency vs Supply Voltage 100 VIN = 2.4V 90 80 1 LTC3204-3.3 (BURST MODE OPERATION) 0.1 2 2.2 2.4 2.6 2.8 SUPPLY VOLTAGE (V) 3 3.2 0.1 1 10 100 LOAD CURRENT (mA) VOUT Soft-Start Response IOUT = 1mA 40 30 1.8 2.0 2.2 2.4 2.6 2.8 SUPPLY VOLTAGE (V) VOUT 20mV/DIV (AC COUPLED) VIN = 2.4V ILOAD = 50mA 500ns/DIV 3204 G14 3204 G14 50mA 30mA 10µs/DIV VIN = 2.4V IOUT = 30mA TO 50mA STEP 32043204 G15 G15 3204fa 4 3.2 3204 G12 IOUT 3204 G13 3204 G13 3.0 Load Transient Response SHDN 2V/DIV 500µs/DIV 50 0 1000 Output Ripple VOUT 20mV/DIV (AC COUPLED) VIN = 2.4V ILOAD = 50mA IOUT = 30mA 3204 G11 3204 G10 VOUT 2V/DIV 60 10 0.01 0.01 0 THEORETICAL MAX 70 20 0.2 1.8 100 3204 G09 LTC3204B-3.3 (NON-BURST MODE OPERATION) EXCESS INPUT CURRENT (mA) NO-LOAD INPUT CURRENT (µA) 62 50 0 TEMPERATURE (°C) 3204 G08 NO-LOAD INPUT CURRENT (mA) 2.0 44 5 –50 3.5 Extra Input Current vs Load Current (IIN-2ILOAD) 64 48 7 150 No-Load Input Current vs Supply Voltage 50 8 TA = 90°C 3204 G07 58 VIN = 1.8V VOUT = 3V 50 VIN = 2.4V 0 9 EFFICIENCY (%) OUTPUT VOLTAGE (V) 3.30 Effective Open-Loop Output Resistance vs Temperature VOUT = 3.168V 350 3.20 (LTC3204-3.3/LTC3204B-3.3 ONLY) LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 TYPICAL PERFOR A CE CHARACTERISTICS U W (LTC3204-5/LTC3204B-5 ONLY) (TA = 25°C, CFLY = CIN = COUT = 2.2µF unless otherwise specified) 5.20 500 450 VIN = 4.2V VIN = 3.6V 4.80 VIN = 2.7V 4.70 TA = 90°C 300 250 200 150 5 50 200 400 300 LOAD CURRENT (mA) 0 2.7 500 3.0 3.3 3.6 3.9 SUPPLY VOLTAGE (V) 2.8 2.4 2.0 LTC3204B-5 58 1.6 56 1.2 54 0.8 52 0.4 2.7 3 3.6 3.9 3.3 SUPPLY VOLTAGE (V) 4.2 0 4.5 EXCESS INPUT CURRENT (mA) NO-LOAD INPUT CURRENT (µA) 64 62 NO-LOAD INPUT CURRENT (mA) 3.2 50 10 3.6 66 100 Efficiency vs Supply Voltage 100 VIN = 3.6V 1 90 LTC3204B-5 (N0N-BURST MODE OPERATION) THEORETICAL MAX 80 LTC3204-5 (BURST-MODE OPERATION) 0.1 70 60 IOUT = 100mA IOUT = 10mA 50 IOUT = 1mA 40 30 20 10 0.01 0.01 0.1 1 10 100 LOAD CURRENT (mA) 0 2.7 1000 3.0 3.3 3.6 3.9 SUPPLY VOLTAGE (V) VOUT Soft-Start 4.2 4.5 3204 G21 3204 G20 3204 G19 Output Ripple VOUT 2V/DIV 50 3204 G18 Extra Input Current vs Load Current (IIN-2ILOAD) LTC3204-5 0 TEMPERATURE (°C) 3204 G17 4.0 60 4 –50 4.2 EFFICIENCY (%) 100 0 No-Load Input Current vs Supply Voltage 68 6 TA = –45°C 3204 G16 70 VIN = 2.7V VOUT = 4.5V 7 TA = 25°C 350 100 4.60 4.50 8 VOUT = 4.8V 400 5.00 OUTPUT LOAD (mA) OUTPUT VOLTAGE (V) 5.10 4.90 Effective Open-Loop Output Resistance vs Temperature Output Load Capability at 4% Below Regulation Load Regulation Load Transient Response VOUT 50mV/DIV (AC COUPLED) VOUT 20mV/DIV (AC COUPLED) IOUT HDN S 5V/DIV 100mA 60mA VIN = 3.6V IOUT = 100mA 500µs/DIV 3204 G22 VIN = 3.6V IOUT = 100mA 500ns/DIV 3204 G23 10µs/DIV VIN = 3.6V IOUT = 60mA TO 100mA STEP 3204 G24 3204fa 5 LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 PI FU CTIO S U U U GND (Pin 1, 7): Ground. These pins should be tied to a ground plane for best performance. The exposed pad must be soldered to PCB ground to provide electrical contact and optimum thermal performance. VIN (Pin 2): Input Supply Voltage. VIN should be bypassed with a 1µF to 4.7µF low ESR ceramic capacitor. C+ (Pin 4): Flying Capacitor Positive Terminal. C– (Pin 5): Flying Capacitor Negative Terminal. HDN (Pin 6): Active Low Shutdown Input. A low on S H D N disables the LTC3204-3.3/LTC3204-5/LTC3204B-3.3/ S LTC3204B-5. This pin must not be allowed to float. VOUT (Pin 3): Regulated Output Voltage. VOUT should be bypassed with a low ESR ceramic capacitor providing at least 2µF of capacitance as close to the pin as possible for best performance. BLOCK DIAGRA W SOFT-START AND SWITCH CONTROL VOUT 6 SHDN 4 C+ 5 C– 3 1.2MHz OSCILLATOR – + CHARGE PUMP VIN 2 3204 BD GND 1, 7 3204fa 6 U OPERATIO LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 (Refer to the Block Diagram) The LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 use a switched capacitor charge pump to boost VIN to a regulated output voltage. Regulation is achieved by sensing the output voltage through an internal resistor divider and modulating the charge pump output current based on the error signal. A 2-phase nonoverlapping clock activates the charge pump switches. The flying capacitor is charged from VIN on the first phase of the clock. On the second phase of the clock it is stacked in series with VIN and connected to VOUT. This sequence of charging and discharging the flying capacitor continues at a free running frequency of 1.2MHz (typ). Burst Mode operation is initiated, the part shuts down the internal oscillator to reduce the switching losses and goes into a low current state. This state is referred to as the sleep state in which the IC consumes only about 40µA from the input. When the output voltage droops enough to overcome the burst comparator hysteresis, the part wakes up and commences normal fixed frequency operation. The output capacitor recharges and causes the part to reenter the sleep state if the output load still remains less than the Burst Mode threshold. This Burst Mode threshold varies with VIN, VOUT and the choice of output storage capacitor. Shutdown Mode Soft-Start In shutdown mode, all circuitry is turned off and the LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 draws only leakage current from the VIN supply. Furthermore, VOUT is disconnected from VIN. The SHDN pin is a CMOS input with a threshold voltage of approximately 0.7V. The LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 are in shutdown when a logic low is applied to the SHDN pin. Since the SHDN pin is a very high impedance CMOS input, it should never be allowed to float. To ensure that its state is defined, it must always be driven with a valid logic level. The LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 have built-in soft-start circuitry to prevent excessive current flow during start-up. The soft-start is achieved by charging an internal capacitor with a very weak current source. The voltage on this capacitor, in turn, slowly ramps the amount of current available to the output storage capacitor from zero to a value of 300mA over a period of approximately 0.75ms. The soft-start circuit is reset in the event of a commanded shutdown or thermal shutdown. Since the output voltages of these devices can go above the input voltage, special circuitry is required to control the internal logic. Detection logic will draw an input current of 5µA when the devices are in shutdown. However, this current will be eliminated if the output voltage (VOUT) is less than approximately 0.8V. The LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 have built-in short-circuit current limit as well as over-temperature protection. During a short-circuit condition, they will automatically limit their output current to approximately 300mA. At higher temperatures, or if the input voltage is high enough to cause excessive self-heating of the part, the thermal shutdown circuitry will shutdown the charge pump once the junction temperature exceeds approximately 160°C. It will enable the charge pump once the junction temperature drops back to approximately 150°C. The LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 will cycle in and out of thermal shutdown indefinitely without latchup or damage until the short-circuit condition on VOUT is removed. Burst Mode Operation The LTC3204-3.3/LTC3204-5 provide automatic Burst Mode operation to reduce supply current at light loads. Burst Mode operation is initiated if the output load current falls below an internally programmed threshold. Once Short-Circuit/Thermal Protection 3204fa 7 LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 APPLICATIO S I FOR ATIO U U U The power efficiency (η) of the LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 is similar to that of a linear regulator with an effective input voltage of twice the actual input voltage. This occurs because the input current for a voltage doubling charge pump is approximately twice the output current. In an ideal regulating voltage doubler the power efficiency would be given by: η= POUT VOUT • IOUT VOUT = = PIN VIN • 2IOUT 2VIN At moderate to high output power, the switching losses and the quiescent current of the LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 are negligible and the expression above is valid. For example, with VIN = 3V, IOUT = 100mA and VOUT regulating to 5V, the measured efficiency is 81.8% which is in close agreement with the theoretical 83.3% calculation. Maximum Available Output Current For the LTC3204-3.3/LTC3204-5/LTC3204B-3.3/ LTC3204B-5,the maximum available output current and voltage can be calculated from the effective open-loop output resistance, ROL, and the effective input voltage, 2VIN(MIN). ROL + – 2VIN + IOUT VOUT – 3204 F01 Figure 1. Equivalent Open-Loop Circuit From Fig. 1, the available current is given by: IOUT = 2VIN – VOUT ROL Effective Open Loop Output Resistance (ROL) The effective open loop output resistance (ROL) of a charge pump is a very important parameter which determines the strength of the charge pump. The value of this parameter depends on many factors such as the oscillator frequency 8 (fOSC), value of the flying capacitor (CFLY), the nonoverlap time, the internal switch resistances (RS), and the ESR of the external capacitors. A first order approximation for ROL is given below: ROL ≅ 2∑ RS + S=1 TO 4 1 f OSC • C FLY Typical ROL values as a function of temperature are shown in Figure 2. EFFECTIVE OPEN-LOOP OUTPUT RESISTANCE (Ω) W Power Efficiency 8 VIN = 2.7V VOUT = 4.5V 7 6 5 4 –50 0 50 100 TEMPERATURE (°C) 3204 F02 Figure 2. Typical ROL vs Temperature VIN, VOUT Capacitor Selection The style and value of capacitors used with the LTC3204-3.3/ LTC3204-5/LTC3204B-3.3/LTC3204B-5 determine several important parameters such as regulator control loop stability, output ripple, charge pump strength and minimum start-up time. To reduce noise and ripple, it is recommended that low ESR (<0.1Ω) ceramic capacitors be used for both CIN and COUT. These capacitors should be 1µF or greater. Tantalum and aluminum capacitors are not recommended because of their high ESR. The value of COUT directly controls the amount of output ripple for a given load current. Increasing the size of COUT will reduce the output ripple at the expense of higher minimum turn-on time. The peak-to-peak output ripple is approximately given by the expression: VRIPPLE(P −P) ≅ IOUT 2f OSC • C OUT 3204fa LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 APPLICATIO S I FOR ATIO U W U U where f OSC is the oscillator frequency (typically 1.2MHz) and COUT is the value of output charge storage capacitor. Also, the value and style of the output capacitor can significantly affect the stability of the LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5. As shown in the Block Diagram, the LTC3204-3.3/LTC3204-5/LTC3204B3.3/LTC3204B-5 use a linear control loop to adjust the strength of the charge pump to match the current required at the output. The error signal of this loop is stored directly on the output storage capacitor. This output capacitor also serves to form the dominant pole of the control loop. To prevent ringing or instability on the LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5, it is important to maintain at least 1µF of capacitance over all conditions. Excessive ESR on the output capacitor can degrade the loop stability of the LTC3204-3.3/LTC3204-5/LTC3204B-3.3/ LTC3204B-5. The closed loop output resistance of the LTC3204-5 is designed to be 0.5Ω. For a 100mA load current change, the output voltage will change by about 50mV. If the output capacitor has 0.5Ω or more of ESR, the closed loop frequency response will cease to roll off in a simple one-pole fashion and poor load transient response or instability could result. Ceramic capacitors typically have exceptional ESR performance and combined with a good board layout should yield very good stability and load transient performance. As the value of COUT controls the amount of output ripple, the value of CIN controls the amount of ripple present at the input pin (VIN). The input current to the LTC3204-3.3/ LTC3204-5/LTC3204B-3.3/LTC3204B-5 will be relatively constant during the input charging phase or the output charging phase but will drop to zero during the nonoverlap times. Since the nonoverlap time is small (~25ns), these missing notches will result in only a small perturbation on the input power supply line. Note that a higher ESR capacitor such as tantalum will have higher input noise due to the voltage drop in the ESR. Therefore, ceramic capacitors are again recommended for their exceptional ESR performance. Further input noise reduction can be achieved by powering the LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5 through a very small series inductor as shown in Figure 3. A 10nH inductor will reject the fast current notches, thereby presenting a nearly constant current load to the input power supply. For economy, the 10nH inductor can be fabricated on the PC board with about 1cm (0.4") of PC board trace. 1cm OF WIRE 10nH VIN 0.22µF 2 VIN LTC3204-3.3/ LTC3204-5 2.2µF 1 GND 32005 F03 Figure 3. 10nH Inductor Used for Additional Input Noise Reduction Flying Capacitor Selection Warning: A polarized capacitor such as tantalum or aluminum should never be used for the flying capacitor since its voltage can reverse upon start-up of the LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5. Low ESR ceramic capacitors should always be used for the flying capacitor. The flying capacitor controls the strength of the charge pump. In order to achieve the rated output current, it is necessary to have at least 1µF of capacitance for the flying capacitor. For very light load applications, the flying capacitor may be reduced to save space or cost. From the first order approximation of ROL in the section “Effective Open-Loop Output Resistance,” the theoretical minimum output resistance of a voltage doubling charge pump can be expressed by the following equation: R0L(MIN) = 2VIN – VOUT 1 ≅ IOUT f OSC • C FLY where fOSC is the switching frequency (1.2MHz) and CFLY is the value of the flying capacitor. The charge pump will typically be weaker than the theoretical limit due to additional switch resistance. However, for very light load applications, the above expression can be used as a guideline in determining a starting capacitor value. 3204fa 9 LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 APPLICATIO S I FOR ATIO U W U U Ceramic Capacitors Ceramic capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. For example, a capacitor made of X5R or X7R material will retain most of its capacitance from –40°C to 85°C whereas a Z5U or Y5V style capacitor will lose considerable capacitance over that range. Z5U and Y5V capacitors may also have a poor voltage coefficient causing them to lose 60% or more of their capacitance when the rated voltage is applied. Therefore when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than discussing the specified capacitance value. For example, over rated voltage and temperature conditions, a 1µF 10V Y5V ceramic capacitor in a 0603 case may not provide any more capacitance than a 0.22µF 10V X7R capacitor available in the same 0603 case. In fact, for most LTC3204-3.3/ LTC3204-5/LTC3204B-3.3/LTC3204B-5 applications, these capacitors can be considered roughly equivalent. The capacitor manufacturer’s data sheet should be consulted to ensure the desired capacitance at all temperatures and voltages. Below is a list of ceramic capacitor manufacturers and how to contact them: AVX Kemet Murata Taiyo Yuden Vishay www.avxcorp.com www.kemet.com www.murata.com www.t-yuden.com www.vishay.com TDK www.component.tdk.com Layout Considerations Due to the high switching frequency and high transient currents produced by LTC3204-3.3/LTC3204-5/LTC3204B3.3/LTC3204B-5, careful board layout is necessary for optimum performance. A true ground plane and short connections to all the external capacitors will improve performance and ensure proper regulation under all conditions. Figure 4 shows an example layout for the LTC3204-3.3/ LTC3204-5/LTC3204B-3.3/LTC3204B-5. CIN 0603 GND SHDN C– VIN VOUT CFLY 0603 COUT 0603 C+ 3204 F04 Figure 4. Recommended Layout Thermal Management For higher input voltages and maximum output current, there can be substantial power dissipation in the LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5. If the junction temperature increases above approximately 160°C, the thermal shutdown circuitry will automatically deactivate the output. To reduce the maximum junction temperature, a good thermal connection to the PC board is recommended. Connecting the GND pin (Pin 1) and the exposed pad of the DFN package (Pin 7) to a ground plane under the device on two layers of the PC board can reduce the thermal resistance of the package and PC board considerably. Derating Power at High Temperatures To prevent an overtemperature condition in high power applications, Figure 5 should be used to determine the maximum combination of ambient temperature and power dissipation. The power dissipated in the LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 should always fall under the line shown for a given ambient temperature. The power dissipation in the LTC3204-3.3/ LTC3204-5/LTC3204B-3.3/ LTC3204B-5 is given by the expression: PD = (2VIN – VOUT )• IOUT This derating curve assumes a maximum thermal resistance, θJA, of 80°C/W for the 2mm × 2mm DFN package. 3204fa 10 LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 APPLICATIO S I FOR ATIO U W U U This can be achieved from a printed circuit board layout with a solid ground plane and a good connection to the ground pins of LTC3204-3.3/LTC3204-5/LTC3204B-3.3/ LTC3204B-5 and the exposed pad of the DFN package. Operation out of this curve will cause the junction temperature to exceed 160°C which may trigger the thermal shutdown. 3.0 POWER DISSIPATION (W) 2.5 2.0 1.5 1.0 0.5 0 –50 –25 25 50 75 100 125 150 0 AMBIENT TEMPERATURE (C) 3204 G05 Figure 5. Maximum Power Dissipation vs Ambient Temperature PACKAGE DESCRIPTIO U DC Package 6-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1703) R = 0.115 TYP 0.56 ± 0.05 (2 SIDES) 0.675 ±0.05 2.50 ±0.05 1.15 ±0.05 0.61 ±0.05 (2 SIDES) PIN 1 BAR PACKAGE TOP MARK OUTLINE (SEE NOTE 6) 0.38 ± 0.05 4 2.00 ±0.10 (4 SIDES) PIN 1 CHAMFER OF EXPOSED PAD 3 0.25 ± 0.05 0.50 BSC 1.42 ±0.05 (2 SIDES) 0.200 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 6 0.75 ±0.05 1 (DC6) DFN 1103 0.25 ± 0.05 0.50 BSC 1.37 ±0.05 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3204fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC3204-3.3/LTC3204-5/ LTC3204B-3.3/LTC3204B-5 TYPICAL APPLICATIO S U Regulated 3.3V Output 2.2µF 2 VIN 1.8V TO 4.5V 2.2µF 1, 7 6 OFF ON 4 C+ 3 VOUT 5 C– VIN VOUT 3.3V 2.2µF LTC3204-3.3/ LTC3204B-3.3 GND SHDN 3204 TA02 Lithium-Ion Battery to 5V White or Blue LED Driver 2.2µF 5 2 3V TO 4.4V Li-Ion BATTERY ON OFF 2.2µF C– VIN 4 C+ 3 VOUT DRIVE UP TO 5 LEDS 6 SHDN (APPLY PWM WAVEFORM FOR ADJUSTABLE BRIGHTNESS CONTROL) 100Ω 2.2µF LTC3204-5/ LTC3204B-5 GND 100Ω 100Ω 100Ω 100Ω 1, 7 VSHDN 3200-5 TA03 t USB Port to Regulated 5V Power Supply 2.2µF 5 C– 2 VIN 4 C+ VOUT 3 LTC3204-5 2.2µF 6 SHDN GND 1, 7 2.2µF VOUT 5V ±4% 32005 TA05 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1751-3.3/ LTC1751-5 LTC1983-3/ LTC1983-5 LTC3200-5 100mA, 800kHz Regulated Doubler VIN: 2V to 5V, VOUT(MAX) = 3.3V/5V, IQ = 20µA, ISD <2µA, MS8 Package VIN: 3.3V to 5.5V, VOUT(MAX) = –3V/–5V, IQ = 25µA, ISD <1µA, ThinSOT Package VIN: 2.7V to 4.5V, VOUT(MAX) = 5V, IQ = 3.5mA, ISD <1µA, ThinSOT Package VIN: 2.7V to 4.5V, VOUT(MAX) = 5.5V, IQ = 2.5mA, ISD <1µA, DFN, MS Packages LTC3202 100mA, 900kHz Regulated Inverter 100mA, 2MHz Low Noise, Doubler/ White LED Driver 125mA, 1.5MHz Low Noise, Fractional White LED Driver 3204fa 12 Linear Technology Corporation LT/LT 0605 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2004