QUINT LVPECL-TO-PECL OR PECL-TO-LVPECL TRANSLATOR DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ SY100E417 3.3V and 5V power supplies required Also, supports LVPECL-to-PECL translation 500ps propagation delays Fully differential design Differential line receiver capability Available in 28-pin PLCC package The SY100E417 is a quint LVPECL-to-PECL translator. It can also be used as a quint PECL-to-LVPECL translator. The device receives standard PECL signals and translates them to differential LVPECL output signals (or vice versa). The SY100E417 can also be used as a differential line receiver for PECL-to-PECL or LVPECL-to-LVPECL signals. However, please note that for the latter we will need two different power supplies. Please refer to Function Table for more details. A VBB output is provided for interfacing single ended input signals. If a single ended input is to be used, the VBB output should be connected to the Dn input and the active signal will drive the Dn input. When used, the VBB should be bypassed to VCC via a 0.01µF capacitor. The VBB is designed to act as a switching reference for the SY100E417 under single ended input conditions. As a result, the pin can only source/sink 0.5mA of current. To accomplish the PECL-to-LVPECL level translation, the SY100E417 requires three power rails. The VCC and VCC_VBB supply is to be connected to the standard PECL supply, the 3.3V supply is to be connected to the VCCO supply, and GND is connected to the system ground plane. Both the VCC and VCCO should be bypassed to ground with a 0.01µF capacitor. To accomplish the LVPECL-to-PECL level translation, the SY100E417 requires three power rails as well. The 5.0V supply is connected to the VCC and VCCO pins, 3.3V supply is connected to the VCC_VBB pin and GND is connected to the system ground plane. VCC_VBB is used to provide a proper VBB output level if a single ended input is used. VCC_VBB = 3.3V is only required for single-ended LVPECL input. For differential LVPECL input, VCC_VBB can be either 3.3V or 5.0V. Under open input conditions, the Dn input will be biased at a VCC/2 voltage level and the Dn input will be pulled to GND. This condition will force the "Qn" output low, ensuring stability. BLOCK DIAGRAM D0 D0 Q0 Q0 D1 D1 Q1 Q1 D2 D2 Q2 Q2 D3 D3 Q3 Q3 D4 D4 Q4 Q4 VBB FUNCTION TABLE Function Vcc Vcco Vcc_VBB PECL-to-LVPECL 5.0V 3.3V 5.0V LVPECL-to-PECL 5.0V 5.0V 3.3V PECL-to-PECL 5.0V 5.0V 5.0V LVPECL-to-LVPECL 5.0V 3.3V 3.3V Rev.: B 1 Amendment: /1 Issue Date: March, 1999 SY100E417 Micrel PIN NAMES Pin Q4 Q4 VCCO D4 D4 VCC_VBB D3 PIN CONFIGURATION 25 24 23 22 21 20 19 D3 D2 D2 26 18 27 17 28 16 GND VBB D0 D0 1 TOP VIEW PLCC J28-1 2 Q3 Q3 VCC Q2 Q2 VCCO Q1 15 14 3 13 VCCO Q0 8 9 10 11 VCCO Q1 7 Q0 6 D1 12 5 D1 4 Function Dn PECL / LVPECL Inputs Qn PECL / LVPECL Outputs VBB Reference Voltage Output VCCO VCC for Outputs VCC_VBB VCC for VBB Output GND Common Ground Rail VCC VCC for Internal Circuitry PECL INPUT DC ELECTRICAL CHARACTERISTICS VCC_VBB = VCC = +4.5V to +5.5V TA = –40°C Symbol VCC TA = 0°C TA = +25°C TA = +85°C Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Power Supply Voltage 4.5 — 5.5 4.5 — 5.5 4.5 — 5.5 4.5 — 5.5 V Input HIGH Voltage(1) 3.835 — 4.120 3.835 — 4.120 3.835 — 4.120 3.835 — 4.120 V VIL Input LOW Voltage(1) 3.190 — 3.515 3.190 — 3.525 3.190 — 3.525 3.190 — 3.525 V VPP Minimum Peak-to-Peak 150 — — 150 — — 150 — — 150 — — mV — — 150 — — 150 — — 150 — — 150 µA 0.5 –600 — — — — 0.5 –600 — — — — 0.5 –600 — — — — 0.5 –600 — — — — µA 3.620 — 3.740 3.620 — 3.740 3.620 — 3.740 3.620 — 3.740 V — — 20 — — 20 — 14 20 — — 20 mA VIH Input IIH Input HIGH Current IIL Input LOW Current VBB Output Reference(1) ICC Power Supply Current Dn Dn NOTE: 1. These levels are for VCC_VBB = 5.0V. Level specifications will vary 1:1 with VCC_VBB. 2 SY100E417 Micrel LVPECL OUTPUT DC ELECTRICAL CHARACTERISTICS VCC = +4.5V to +5.5V; VCCO = +3.0V to 3.8V TA = –40°C Symbol TA = 0°C Parameter Min. Typ. Max. Min. Typ. VCCO Power Supply Voltage 3.0 — 3.8 3.0 — VOH Output HIGH Voltage(1) 2.215 — 2.420 2.275 — VOL Output LOW Voltage(1) 1.470 — 1.745 1.490 — ICCO Power Supply Current — — 35 — — TA = +25°C TA = +85°C Max. Min. Typ. Max. Min. Typ. Max. Unit 3.8 3.0 3.3 3.8 3.0 — 3.8 V 2.420 2.275 2.350 2.420 2.275 — 2.420 V 1.680 1.490 1.600 1.680 1.490 — 1.680 V — 37 mA 35 — 23 35 — NOTE: 1. These levels are for VCCO = 3.3V. Level specifications will vary 1:1 with VCCO. LVPECL INPUT DC ELECTRICAL CHARACTERISTICS VCC_VBB = +3.0V to +3.8V(1); VCC = +4.5V to +5.5V TA = –40°C Symbol TA = 0°C TA = +25°C TA = +85°C Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit VCC Power Supply Voltage 4.5 — 5.5 4.5 — 5.5 4.5 — 5.5 4.5 — 5.5 V VIH Input HIGH Voltage(2) 2.135 — 2.420 2.135 — 2.420 2.135 — 2.420 2.135 — 2.420 V VIL Input LOW Voltage(2) 1.490 — 1.825 1.490 — 1.825 1.490 — 1.825 1.490 — 1.825 V VPP Minimum Peak-to-Peak 150 — — 150 — — 150 — — 150 — — mV — — 150 — — 150 — — 150 — — 150 µA 0.5 –600 — — — — 0.5 –600 — — — — 0.5 –600 — — — — 0.5 –600 — — — — µA 1.92 — 2.04 1.92 — 2.04 1.92 — 2.04 1.92 — 2.04 V — — 20 — — 20 — 14 20 — — 20 mA Input IIH Input HIGH Current IIL Input LOW Current VBB Output Reference(2) ICC Power Supply Current Dn Dn NOTES: 1. VCC_VBB = 3.3V is only required for single-ended LVPECL input. For differential LVPECL input, VCC_VBB can be either 3.3V or 5V. 2. These levels are for VCC_VBB = 3.3V. Level specifications will vary 1:1 with VCC_VBB. 3 SY100E417 Micrel PECL OUTPUT DC ELECTRICAL CHARACTERISTICS VCC = VCCO = +4.5V to +5.5V TA = –40°C Symbol TA = 0°C Parameter Min. Typ. Max. Min. Typ. VCCO Power Supply Voltage 4.5 — 5.5 4.5 VOH Output HIGH Voltage(1) 3.915 — 4.120 VOL Output LOW Voltage(1) 3.170 — ICCO Power Supply Current — — TA = +25°C TA = +85°C Max. Min. Typ. Max. Min. Typ. Max. Unit — 5.5 4.5 — 5.5 4.5 — 5.5 V 3.975 — 4.120 3.975 — 4.120 3.975 — 4.120 V 3.445 3.190 — 3.380 3.190 — 3.380 3.190 — 3.380 V 35 — — 35 — 23 35 — — 37 mA NOTES: 1. These levels are for VCCO = 5.0V. Level specifications will vary 1:1 with VCCO. AC ELECTRICAL CHARACTERISTICS(1) TA = –40°C Symbol Parameter tPLH tPHL Propagation Delay D to Q tskew Within-Device Skew Output-to-Output(2) Part-to-Part (Diff.)(2) Duty Cycle (Diff.)(3) VPP VCMR tr tf Diff. S.E. Minimum Input Swing(4) TA = 0°C TA = +25°C TA = +85°C Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit 410 380 510 530 610 680 410 380 510 530 610 680 410 380 510 530 610 680 410 380 510 530 610 680 ps — — — 20 20 25 100 200 — — — — 20 20 25 100 200 — — — — 20 20 25 100 200 — — — — 20 20 25 100 200 — ps 150 — — 150 — — 150 — — 150 — — mV 1.3 1.5 — — VCC–0.2 — — VCC–0.2 — — VCC–0.2 1.2 1.4 — — VCC–0.2 VCC–0.2 1.2 1.4 VCC–0.2 VCC–0.2 1.2 1.4 320 — 580 320 — 580 320 — 580 320 — 580 Range(5) Common Mode VPP < 500mV VPP ≥ 500mV Output Rise/Fall Times Q (20% to 80%) V VCC–0.2 ps NOTES: 1. Power supply requirements applies as indicated in the DC electrical characteristics tables. 2. Skew is measured between outputs under identical transitions. 3. Duty cycle skew is the difference between a TPLH and TPHL propagation delay through a device Common Mode Range. 4. Minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ~40. 5. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPP min. and 1V. PRODUCT ORDERING CODE Ordering Code Package Type Operating Range SY100E417JC J28-1 Commercial SY100E417JCTR J28-1 Commercial Ordering Code 4 Package Type Operating Range SY100E417JI J28-1 Industrial SY100E417JITR J28-1 Industrial SY100E417 Micrel 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD + 1 (408) 980-9191 FAX SANTA CLARA + 1 (408) 914-7878 WEB CA 95054 USA http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 5