Revised December 2001 74ALVC132 Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs General Description Features The ALVC132 contains four 2-input NAND gates with Schmitt Trigger Inputs. The pin configuration and function are the same as the ALVC00 except the inputs have hysteresis between the positive-going and negative-going input thresholds. This hysteresis is useful for transforming slowly switching input signals into sharply defined, jitterfree output signals. This product should be used where noise margin greater than that of conventional gates is required. ■ 1.65V to 3.6V VCC supply operation ■ 3.6V tolerant inputs and outputs ■ tPD 3.8 ns max for 3.0V to 3.6V VCC 4.6 ns max for 2.3V to 2.7V VCC 8.2 ns max for 1.65V to 1.95V VCC ■ Power-off high impedance inputs and outputs The ALVC132 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. ■ Uses patented Quiet Series noise/EMI reduction circuitry This product is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. ■ Latchup conforms to JEDEC JED78 ■ ESD performance: Human body model > 2000V Machine model > 250V Ordering Code: Order Number Package Number 74ALVC132M M14A 74ALVC132MTC MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Diagram Connection Diagram Pin Descriptions Pin Name Description An, Bn Inputs On Outputs Quiet Series is a trademark of Fairchild Semiconductor Corporation. © 2001 Fairchild Semiconductor Corporation ds500720 www.fairchildsemi.com 74ALVC132 Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs December 2001 74ALVC132 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 3) −0.5V to +4.6V Supply Voltage (VCC) −0.5V to 4.6V DC Input Voltage (VI) Output Voltage (VO) (Note 2) Power Supply −0.5V to VCC +0.5V Operating DC Input Diode Current (IIK) VI < 0V −50 mA 0V to VCC Output Voltage (VO) DC Output Diode Current (IOK) 0V to VCC Free Air Operating Temperature (TA) VO < 0V −50 mA −40°C to +85°C Minimum Input Edge Rate (∆t/∆V) VIN = 0.8V to 2.0V, VCC = 3.0V DC Output Source/Sink Current ±50 mA (IOH/IOL) ±100 mA Supply Pin (I CC or GND) 10 ns/V Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. DC VCC or GND Current per Storage Temperature Range (TSTG) 1.65V to 3.6V Input Voltage (VI) −65°C to +150°C Note 2: IO Absolute Maximum Rating must be observed. Note 3: Floating or unused inputs must be held HIGH or LOW. DC Electrical Characteristics Symbol Vt+ Parameter Conditions Positive Threshold VCC (V) Min 1.65 1.3 2.3 1.6 3.0 2.0 3.6 Vt− VH VOH VOL Negative Threshold Input Hysteresis HIGH Level Output Voltage LOW Level Output Voltage 0.25 2.3 0.5 3.0 0.7 V 3.6 0.8 V 1.65 0.2 0.9 2.3 0.3 1.0 3.0 0.3 1.2 1.2 3.6 0.3 VCC - 0.2 IOH = −4 mA 1.65 1.2 IOH = −6 mA 2.3 2 IOH = −12 mA 2.3 1.7 2.7 2.2 V V 3.0 2.4 IOH = −24 mA 3.0 2 IOL = 100 µA 1.65 - 3.6 0.2 1.65 0.45 IOL = 6 mA 2.3 0.4 IOL = 12mA 2.3 0.7 IOL = 4 mA Units 2.2 1.65 1.65 - 3.6 IOH = −100 µA Max 2.7 0.4 IOL = 24 mA 3 0.55 V II Input Leakage Current 0 ≤ VI ≤ 3.6V 3.6 ±5.0 µA IOZ 3-STATE Output Leakage 0 ≤ VO ≤ 3.6V 3.6 ±10 µA ICC Quiescent Supply Current VI = VCC or GND, IO = 0 3.6 40 µA ∆ICC Increase in ICC per Input VIH = VCC − 0.6V 3 -3.6 750 µA www.fairchildsemi.com 2 T A = −40°C to +85°C, RL = 500Ω Symbol tPHL, tPLH CL = 50 pF Parameter V CC = 3.3V ± 0.3V Propagation Delay Bus to Bus CL = 30 pF V CC = 2.7V V CC = 2.5V ± 0.2V V CC = 1.8V ± 0.15V Min Max Min Max Min Max Min Max 1.1 3.8 1.3 4.6 0.8 4.1 1.0 8.2 Units ns Capacitance Symbol Parameter TA = +25°C Conditions VCC Typical Units CIN Input Capacitance VI = 0V or VCC 3.3 6 pF COUT Output Capacitance VI = 0V or VCC 3.3 7 pF CPD Power Dissipation Capacitance 3.3 20 2.5 20 Outputs Enabled f = 10 MHz, CL = 50 pF AC Loading and Waveforms pF TABLE 1. Values for Figure 1 TEST SWITCH tPLH, tPHL Open FIGURE 1. AC Test Circuit TABLE 2. Variable Matrix (Input Characteristics: f = 1MHz; tr = tf = 2ns; Z0 = 50Ω) Symbol VCC 3.3V ± 0.3V 2.7V 2.5V ± 0.2V 1.8V ± 0.15V Vmi 1.5V 1.5V VCC /2 VCC/2 Vmo 1.5V 1.5V VCC /2 VCC/2 FIGURE 2. Waveform for Inverting and Non-inverting Functions 3 www.fairchildsemi.com 74ALVC132 AC Electrical Characteristics 74ALVC132 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 4 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com 74ALVC132 Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued)