ETC 74VCX38MTCX

Revised November 2001
74VCX38
Low Voltage Quad 2-Input NAND Gate with
Open Drain Outputs and
3.6V Tolerant Inputs and Outputs
General Description
Features
The VCX38 contains four 2-input NAND gates with open
drain outputs. This product is designed for low voltage
(1.4V to 3.6V) VCC applications with I/O compatibility up to
3.6V.
■ 1.4V-3.6V VCC supply operation
The VCX38 is fabricated with advanced CMOS technology
to achieve high-speed operation while maintaining CMOS
low power dissipation.
■ 3.6V tolerant inputs and outputs
■ tPD
2.8 ns max for 3.0V to 3.6V VCC
■ Power-Off high impedance inputs and outputs
■ Static Drive (IOL)
+24 mA @ 3.0V VCC
■ Uses patented Quiet Series noise/EMI reduction
circuitry
■ Latchup performance exceeds 300 mA
■ ESD performance:
Human body model > 2000V
Machine model > 250V
Ordering Code:
Order Number
Package Number
74VCX38M
74VCX38MTC
M14A
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
An , Bn
Inputs
On
Outputs
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation
ds500161
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74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
July 1999
74VCX38
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC )
−0.5V to +4.6V
DC Input Voltage (VI)
−0.5V to +4.6V
Output Voltage (VO) (Note 2)
−0.5V to +4.6V
Recommended Operating
Conditions (Note 3)
Power Supply
DC Input Diode Current (IIK)
VI < 0V
−50 mA
1.4V to 3.6V
−0.3V to 3.6V
Output Voltage (VO)
DC Output Diode Current (IOK)
0V to 3.6V
Output Current in IOL
VO < 0V
DC Output Source/Sink Current (IOL)
DC VCC or Ground Current per
−50 mA
VCC = 3.0V to 3.6V
+24 mA
+50 mA
VCC = 2.3V to 2.7V
+18 mA
±100 mA
VCC = 1.65V to 2.3V
+6 mA
VCC = 1.4V to 1.6V
Supply Pin (ICC or Ground)
Storage Temperature Range (Tstg)
Operating
Input Voltage
−65°C to +150 °C
+2 mA
Free Air Operating Temperature (TA)
−40°C to +85°C
Minimum Input Edge Rate (∆t/∆V)
Vin = 0.8V to 2.0V, VCC = 3.0V
10 ns/V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 2: IO Absolute Maximum Rating must be observed.
Note 3: Floating or unused inputs must be held HIGH or LOW
DC Electrical Characteristics
Symbol
Parameter
Conditions
VCC
Min
Max
Units
(V)
VIH
VIL
VOL
HIGH Level Input Voltage
2.7 - 3.6
LOW Level Input Voltage
LOW Level Output Voltage
2.0
2.3 - 2.7
1.6
1.65 - 2.3
0.65 × VCC
1.4 - 1.6
0.65 × VCC
2.7 - 3.6
V
0.8
2.3 - 2.7
0.7
1.65 - 2.3
0.35 × VCC
1.4 - 1.6
0.35 × VCC
IOL = 100 µA
2.7 - 3.6
0.2
IOL = 12 mA
2.7
0.4
IOL = 18 mA
3.0
0.4
IOL = 24 mA
3.0
0.55
IOL = 100 µA
2.3 - 2.7
0.2
IOL = 12 mA
2.3
0.4
IOL = 18 mA
2.3
0.6
IOL = 100 µA
1.65 - 2.3
0.2
1.65
0.3
IOL = 6 mA
IOL = 100 µA
IOL = 2 mA
V
V
1.4 - 1.6
0.2
1.4
0.35
1.4 - 3.6
±5.0
µA
0
10
µA
II
Input Leakage Current
0 ≤ VI ≤ 3.6V
IOFF
Power-Off Leakage Current
0 ≤ (VI, VO) ≤ 3.6V
ICC
Quiescent Supply Current
VI = VCC or GND
1.4 - 3.6
20
VCC ≤ (VI) ≤ 3.6V
1.4 - 3.6
±20
µA
∆ICC
Increase in ICC per Input
VIH = VCC −0.6V
2.7 - 3.6
750
µA
IOHZ
Off State Current
VO = 3.6
1.4 - 3.6
10
µA
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2
Symbol
tPZL, tPLZ
Parameter
(Note 4)
VCC
Conditions
CL = 30 pF, RL = 500Ω
Propagation Delay
CL = 15 pF, RL = 2kΩ
tOSHL
Output to Output Skew
tOSLH
(Note 5)
CL = 30 pF, RL = 500Ω
TA = −40°C to +85°C
(V)
Min
Max
3.3 ± 0.3
0.6
2.8
2.5 ± 0.2
0.8
3.7
1.8 ± 0.15
1.0
6.7
1.5 ± 0.1
1.0
13.4
3.3 ± 0.3
CL = 15 pF, RL = 2kΩ
Units
ns
Figure
Number
Figures
1, 2
Figures
3, 4
0.5
2.5 ± 0.2
0.5
1.8 ± 0.15
0.75
1.5 ± 0.1
1.5
ns
Note 4: For CL = 50PF, add approximately 300 ps to the 30 pF AC maximum specification.
Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol
VOLP
VOLV
Parameter
Quiet Output Dynamic Peak VOL
Quiet Output Dynamic Valley VOL
Conditions
CL = 30 pF, VIH = VCC, VIL = 0V
CL = 30 pF, VIH = VCC, VIL = 0V
VCC
TA = +25°C
(V)
Typical
1.8
0.25
2.5
0.6
3.3
0.8
1.8
−0.25
2.5
−0.6
3.3
−0.8
Units
V
V
Capacitance
Symbol
Parameter
Conditions
TA +25°C
Typical
Units
CIN
Input Capacitance
VI = 0v OR VCC, VCC = 1.8V, 2.5V or 3.3V
6
pF
COUT
Output Capacitance
VI = 0V or VCC, VCC = 1.8V, 2.5V or 3.3V
7
pF
CPD
Power Dissipation Capacitance
VI = 0V or VCC, f = 10 MHz, VCC = 1.8V, 2.5V or 3.3V
20
pF
3
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74VCX38
AC Electrical Characteristics
74VCX38
AC Loading and Waveforms (VCC 3.3V ± 0.3V to 1.8V ± 0.15V)
FIGURE 1. AC Test Circuit
TEST
SWITCH
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V;
VCC × 2 at VCC = 2.5V ± 0.2V; 1.8V
FIGURE 2. Waveform for Open Drain, Inverting and Non-inverting Functions
Symbol
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VCC
3.3V ± 0.3V
2.5V ± 0.2V
1.8V ± 0.15V
Vmi
1.5V
VCC/2
VCC/2
Vmo
1.5V
VCC/2
VCC/2
Vx
VOL + 0.3V
VOL + 0.15V
VOL + 0.15V
4
74VCX38
AC Loading and Waveforms (VCC 1.5 ± 0.1V)
TEST
SWITCH
tPZL, tPLZ
VCC x 2 at VCC = 1.5V ± 0.1V
FIGURE 3. AC Test Circuit
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
VCC
Symbol
1.5V ± 0.1V
Vmi
VCC/2
Vmo
VCC/2
VX
VOL +0.1V
VY
VOH −0.1V
5
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74VCX38
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
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6
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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7
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74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)