MITSUBISHI<Dig.Ana.INTERFACE> M62353P,FP,GP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M62353 is an integrated circuit semiconductor of CMOS structure with 8 channels of built-in D-A converters with output buffer operational amplifiers. The 3-wire serial interface method is used for the transfer format mum wiring. It is able to cascading serial use with Do terminal. The output buffer operational amplifier operates in the whole voltage range from power supply to ground for both input/output. Vss (VrefL) 1 16 GND Ao2 2 15 Ao1 Ao3 3 14 DI Ao4 4 13 CLK Ao5 5 12 LD Ao6 6 11 DO 7 10 Ao8 8 9 Vcc FEATURES •12bit serial data input(3-wire serial data transfer method) •Highly stable output buffer operational amplifier allow operation in the all voltage range from power supply to ground. Ao7 VDD (VrefU) APPLICATION Outline 16P4(P) 16P2N-A(FP) 16P2E-A(GP) Adjustment/control of industrial or home-use electronic equipment,such as VTR camera,VTR set,TV,and CRT display. BLOCK DIAGRAM GND 16 Ao1 DI CLK LD Do Ao8 Vcc 15 14 13 12 11 10 9 - 12-BIT SHIFT REGISTER 8-BIT R-2R D-A D-A D0 1 2 3 4 5 6 D7 Ch1 D8 9 10 D11 8-BIT LATCH 8 L ..... ADDRESS DECODER (8) .... 8-BIT LATCH Ch2 1 Vss (VrefL) - 2 Ao2 L L 4 3 8-BIT R-2R D-A BUFFER OP AMP (8) (8) (8) L 5 L L 7 6 D-A D-A D-A D-A D-A - - - - - 3 Ao3 4 5 6 7 Ao4 Ao5 Ao6 Ao7 MITSUBISHI ELECTRIC 8 VDD (VrefU) ( 1 / 6 ) MITSUBISHI<Dig.Ana.INTERFACE> M62353P,FP,GP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS EXPLANATION OF TERMINALS Pin No. 14 11 13 12 15 2 Function Symbol DI DO CLK LD Ao1 Ao2 Ao3 Ao4 Ao5 Ao6 Ao7 Ao8 Vcc GND VDD Vss 3 4 5 6 7 10 9 16 8 1 Serial data input terminal Serial data output terminal Serial clock input terminal LD terminal input high level than latch circuit data load 8-bit D-A converter output terminal Power supply terminal Digital and analog common GND D-A converter upper reference voltage input terminal D-A converter lower reference voltage input terminal BLOCK DIAGRAM FOR EXPLANATION OF TERMINALS DI Vcc GND 9 16 14 11 12-BIT SHIFT REGISTER CLK 13 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 12 ADDRESS DECODER 8 8 D0 1 ............ 8-BIT LATCH 8-BIT R-2R D-A - 8 VDD (VrefU) 1 2 3 4 5 6 7 8 .............................................8 ............ 8-BIT LATCH .............................................. 8-BIT R-2R D-A D7 D0 ................................................................................................... D7 - 15 10 1 Ao1 Ao8 VSS (VrefL) MITSUBISHI ELECTRIC D0 D11 ( 2 / 6 ) LD MITSUBISHI<Dig.Ana.INTERFACE> M62353P,FP,GP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS DIGITAL DATA FORMAT LAST LSB FIRST MSB D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D0 0 D1 0 D2 0 D3 D4 D5 D6 D7 0 0 0 0 0 (VrefU-VrefL)/256X1+VrefL 1 0 0 0 0 0 0 0 (VrefU-VrefL)/256X2+VrefL 0 1 0 0 0 0 0 0 (VrefU-VrefL)/256X3+VrefL 1 1 0 0 0 0 0 0 (VrefU-VrefL)/256X4+VrefL 0 1 1 1 1 (VrefU-VrefL)/256X255+VrefL 1 1 1 1 1 1 1 1 1 1 VrefU D8 0 0 0 0 0 0 0 0 D9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 D10 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D11 DAC SELECT DATA DAC DATA 1 D-A output DAC selection *VrefU=VDD VrefL=Vss Don’t care Ao1 selection Ao2 Ao3 Ao4 Ao5 Ao6 Ao7 Ao8 Ao9 Ao10 Ao11 Ao12 Don’t care Don’t care Don’t care TIMING CHART (MODEL) LSB MSB DI D11 D10 D9 D8 D2 D1 D0 CLK LD D-A OUTPUT MITSUBISHI ELECTRIC ( 3 / 6 ) MITSUBISHI<Dig.Ana.INTERFACE> M62353P,FP,GP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS ABSOLUTE MAXIMUM RATINGS Symbol Vcc VDD VIN Vo Pd Topr Tstg Conditions Parameter Supply voltage D-A converter upper reference voltage Input voltage Output voltage Power dissipation Operating temperature Storage temperature Ratings -0.3~7.0 -0.3~7.0 -0.3~Vcc+0.3 -0.3~Vcc+0.3 450(P)/300(FP)/150(GP) Unit V V V V mV -20~+85 °C -55~+125 °C ELECTRICAL CHARACTERISTICS Digital part(Vcc,VrefU=+5V±10%,Vcc≥VrefU,GND,VrefL=0V,Ta=-20°C~+85°C, unless otherwise noted) Symbol Test conditions Parameter Vcc Supply voltage Icc Circuit current CLK=1MHz operation IOA=0µA IILK Input leak current VIN=0~Vcc VIL VIH VOL Input low voltage Input high voltage Output low voltage IOL=2.5mA VOH Output high voltage IOH=-400µA Min. Limits Typ. Max. 4.5 5.0 5.5 V 1.6 3.2 mA -10 Unit 10 µA 0.2Vcc V 0.4 V V 0.8Vcc Vcc-0.4 V Analog part(Vcc,VrefU=+5V±10%,Vcc≥VrefU,Ta=-20°C~+85°C, unless otherwise noted) Symbol Test conditions Parameter Limits Typ. Max. 0.9 1.7 mA 3.5 Vcc V GND Vcc-3.5 V Min. Unit IDD Current dissipation VrefU=5V,VrefL=0V Data condition;at maximum current VDD D-A converter upper reference voltage range Vss D-A converter lower reference voltage range The output dose not necessarily be the value within the reference voltage setting range. The output value is determined by the buffer amplifier output voltage range(VAO) VAO Buffer amplifier output voltage range IOA=±100µA IOA=±500µA 0.1 0.2 Vcc-0.1 Vcc-0.2 V IAO Buffer amplifier output drive range Upper side saturation voltage=0.3V Lower side saturation voltage=0.2V -1 1 mA SDL Differential nonlinearity error -1.0 -1.5 LSB Nonlinearity error VrefU=4.79V VrefL=0.95V Vcc=5.5V(15mV/LSB) Without load(IOA=±0) 1.0 SL 1.5 LSB 2 LSB 2 LSB 0.1 µF SZERO Zero code error SFULL Full scale error CO Output capacitive load RO Buffer amplifier output impedance -2 -2 Ω 5 MITSUBISHI ELECTRIC ( 4 / 6 ) MITSUBISHI<Dig.Ana.INTERFACE> M62353P,FP,GP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS AC CHARACTERISTICS(Vcc,VrefU=+5V±10%,Vcc≥VrefU,GND,VrefL=0V,Ta=-20~+85°C, unless otherwise noted) Parameter Symbol tCLK tCKH tCR tCF tDCH tCHD tCHL tLDC tLDH tDO tLDD Test conditions Min 200 200 Clock "L"pulse width Clock "H"pulse width Clock rise time Clock fall time Data setup time Data hold time Limits Typ Max Unit 200 ns ns ns ns ns ns ns 100 100 70 350 ns ns ns 300 µs 200 200 30 60 LD setup time LD hold time LD "H" pulse width Data output delay time CL≤100pF CL≤100pF VAQ:0.5 4.5V The time until the output becomes the final value of 1/2 LSB D-A output setting time TIMING CHART tCKH tCR tCF CLK tCKL DI tDCH tLDC tCHD tLDH tCHL LD tLDD D-A OUTPUT tDO DO OUTPUT MITSUBISHI ELECTRIC ( 5 / 6 ) MITSUBISHI<Dig.Ana.INTERFACE> M62353P,FP,GP 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS TYPICAL CHARACTERISTICS LOWER SIDE SATURATION VOLTAGE VS. OUTPUT SINK CURRENT UPPER SIDE SATURATION VOLTAGE VS. OUTPUT SOURCE CURRENT 150 150 100 100 50 50 0 0 0 200 400 600 800 0 1000 OUTPUT SOURCE CURRENT IAOD(µA) 200 400 600 800 1000 OUTPUT SINK CURRENT IAOD(µA) SATURATION VOLTAGE VS.OUTPUT CURRENT MITSUBISHI ELECTRIC ( 6 / 6 )