NJW5210 8bit 3ch D/A Converter ■ GENERAL DESCRIPTION The NJW5210 is 8bit 3ch D/A converter for electronic adjustment. 3ch DC out put can be independently controlled by three-wire serial interface. The NJW5210 features low operating voltage(2.7V) and can be full-swing outputted regardless of supply voltage. ■ PACKAGE OUTLINE The small package(TVSP8) is suitable for portable applications. NJW5210RB1 ■ FEATURES ● Low Operating Voltage 2.7 to 5.5V ● 8bit 3ch D/A Converters Adopting R-2R System ● 3-wire 10-bit Serial Interface ● Internal POWER ON RESET Circuit ● Bi-CMOS Technology ● Package Outline TVSP8 ■ BLOCK DIAGLAM and PIN DIAGRAM AO1 1 R-2R DAC 8bitREG +DEC AO2 2 R-2R DAC 8bitREG +DEC AO3 3 R-2R DAC 8bitREG +DEC V+ 4 Serial Interface Power on Reset Pin No. 1 2 3 4 5 6 7 8 Pin Name AO1 AO２ AO３ Ｖ+ ＧＮＤ ＤＩ ＣＬＫ ＬＤ IN/OUT OUT OUT OUT ＩＮ ＩＮ ＩＮ 8 LD 7 CLK 6 D1 5 GND Function Analog Output Analog Output Analog Output V+ GND Serial Data Input Serial CLK Input Serial Load Input Ver.1 -1- NJW5210 ■ ABOSOLUTE MAXIMUM RATINGS (Ta=25°C) PARAMETER Supply Voltage Terminal Voltage Power Dissipation Operating Temperature Range Storage Temperature Range SYMBOL + V Vin PD Topr Tstg RATING -0.3 to 7.0 + -0.3 to V 300 -40 to +85 -40 to +150 UNIT V V mW °C °C ■ RECOMMENDED OPERATING CONDITION (Ta=25°C) PARAMETER Operating Voltage Analog Output Source Current Analog Output Sink Current Serial Clock Frequency Limit Road Capacitance SYMBOL TEST CONDITION Vopr IOL IOH FSCLK CL MIN. TYP. MAX. UNIT 2.7 - 1.0 - 5.5 1.0 1.0 0.1 V mA mA MHz µF MIN. TYP. MAX. UNIT - 0.4 0.8 mA 0 1.8 - - 0.3 + V 10 10 V V µA µA 0 0 0 + V -0.1 + V -0.2 + V -0.3 - 0.1 0.2 0.3 + V + V + V -1.0 -1.5 8 - 1.0 1.5 bit LSB LSB MIN. TYP. MAX. UNIT 10 - 1.9 - ms V + ■ ELECTRICAL CHARACTERISTICS ( V =3.0V, RL=OPEN, CL=0pF, Ta=25°C) PARAMETER Operating Current <Logic Interface> Input low voltage Input high voltage Input low current Input high current <Buffer Amplifier> Minimum output voltage Maximum output voltage <DAC accuracy> Resolution Difference non-linearity error Integral non-linearity error SYMBOL ICC TEST CONDITION CLK=1MHz 80H set VIL VIH IIL IIH ZS1 ZS2 ZS3 FS1 FS2 FS3 RES DNL INL 00H 00H 00H FFH FFH FFH set set set set set set IOH=0.0mA IOH=0.5mA IOH=1.0mA IOL=0.0mA IOL=0.5mA IOL=1.0mA Input code 02H to FDH Input code 02H to FDH V V ■ POWER ON RESET PARAMETER + V supply voltage rise time Power on reset voltage Ver.1 -2- SYMBOL trVcc VPOR TEST CONDITION V+=0→2.7V NJW5210 ■ Condition of operating timing PARAMETER SYMBOL CLK L level pulse width CLK H level pulse width DI setup time DI hold time LD setup time LD hold time LD “H” level pulse width Analog output delay time voltage tCLKL tCLKL tCLKH tSDI tHDI tSLD tHLD tLDH tOUT TEST CONDITION CL=50pF, RL=10kΩ TYP. MAX. UNIT 200 200 30 60 200 100 100 - - 300 ns ns ns ns ns ns ns µA tCLKH 0.8V+ CLK 0.2V+ 0.8Vcc 0.2Vcc DI tSDI LD MIN. tHDI tLD tHL 0.8V+ tSL 0.2V+ 0.8V+ 0.2V+ OUTPUT tOU *A signal level is judged at 80% or 20% of V + Ver.1 -3- NJW5210 ■ Command sending Control command is 3wire 10bit serial interface.(MSB first) Data is taken in with rise edge og the CLK and output data is fixed in the LD high section. Data is maintained in the LD low section. LSB(LAST) MSB(FIRST) Data set Channel select D1 D2 D3 D4 D0 D1 D2 D3 D4 D5 D6 D7 0 1 0 1 0 : 0 1 0 0 1 1 0 : 0 0 0 0 1 : 0 0 0 0 0 : 1 1 0 0 0 0 0 : 1 1 GND + (V -GND)/256x1 + (V -GND)/256x2 + (V -GND)/256x3 + (V -GND)/256x4 1 1 0 0 0 0 0 : 1 1 0 0 0 0 0 1 1 0 0 0 0 0 : 1 1 1 1 : + (V -GND)/256x254 + (V -GND)/256x255 D0 D5 D6 D7 D8 D9 Data Set Analog output voltage level Channel select D8 D9 0 1 0 1 0 0 1 1 Address select AO1 AO2 AO3 Don’t care [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.1 -4-