Order this document from Analog Marketing Y–C PICTURE–IN–PICTURE (PIP) CONTROLLER The MC44462 Y–C PIP controller is a low cost member of a family of high performance PIP controllers and video signal processors for television. It is a follow–up to the MC44461 PIP and has a modified input selection to allow higher performance in TV systems which have S–Video inputs on the back panel. The S–Video input is separate luma (luminance) and chroma components. It is NTSC compatible and contains all the analog signal processing, control logic and memory necessary to provide for the overlay of a small picture from a second non synchronized source onto the main picture of a television. All control and setup of the MC44462 is via a standard two pin I2C bus interface. The device is fabricated using BICMOS technology. It is available in a 56–pin shrink dip (SDIP) package. SEMICONDUCTOR TECHNICAL DATA The main features of the MC44462 are: • • • • • • • • • • • • • • Switchable PIP Composite Video Signals – Video 1 and Video 2 S–Video Output Allows High Performance in TV Two PIP Sizes; 1/16 and 1/9 Screen Area 56 Freeze Field Feature 1 Variable PIP Position in 64–X by 64–Y Steps PIP Border with Programmable Color B SUFFIX PLASTIC PACKAGE CASE 859 (SDIP) Programmable PIP Tint and Saturation Control Automatic Main to PIP Contrast Balance Vertical Filter Integrated 64 k Bit DRAM Memory Resulting in Minimal RFI ORDERING INFORMATION Minimal RFI Allows Simple Low Cost Application into TV Device Operating Temperature Range Package MC44462B TJ = –65° to +150°C SDIP I2C Bus Control – No External Variable Adjustments Needed Operates from a Single 5.0 V Supply Economical 56–Pin Shrink DIP Package YC–PIP System Diagram CV Tuner/IF Back Panel S–VHS Inputs Cable Y C Comb Filter (MC141625) Y C S W CV Main IIC M T R X CV Video Processor Ymain in Cmain in Back Panel Composite Video Input (unused) YC PIP MC44462 Ymain out Cmain out CV1 CV2 Yin Cin R G B IIC This document contains information on a product under development. Motorola reserves the right to change or discontinue thisIC product without notice. MOTOROLA ANALOG DEVICE DATA Motorola, Inc. 1996 Issue 2 1 MC44462 MAXIMUM RATINGS ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁ Symbol Value Unit Power Supply Voltage Rating VDD –0.5 to +6.0 V Power Supply Voltage VCC –0.5 to +6.0 V Input Voltage Range VIR –0.5, VDD + 0.5 V IO 160 mA PD RθJA TJ 1.3 59 W °C/W –65 to +150 °C Output Current Power Dissipation Maximum Power Dissipation @ 70°C Thermal Resistance, Junction–to–Air Junction Temperature (Storage and Operating) NOTE: ESD data available upon request. ELECTRICAL CHARACTERISTICS (VCC = VDD = 5.0 V, TA = 25°C, unless otherwise noted.) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ Characteristic Symbol Min Typ Max Unit Total ISupply – 100 160 mA Composite Video Input (Pin 34 or 36) CVi – 1.0 – Vpp Luma Output (Pin 49, Unterminated) – – 2.0 – Vpp Video Output DC Level (Sync Tip) – – 1.0 – Vdc Video Gain – – 6.0 – dB Video Frequency Response (Main Video to –1.0 dB) – – 10 – MHz Color Bar Accuracy – – ±4.0 – deg Video Crosstalk (@ 75% Color Bars) Main to PIP PIP to Main – – – 55 55 – – Output Impedance – – 5.0 – Ω Free Run HPLL Frequency (Pin 16) – – 15734 – Hz HPLL Pull–In Range – – ±400 – Hz HPLL Jitter – – ±4.0 – ns Burst Gate Timing (from Trailing Edge Hsync, Pin 24) – – 1.0 – µs Burst Gate Width – – 4.0 – µs Vertical Countdown Window – – 232 – 296 – H lines Vertical Sync Integration Time – – 31 – µs Resolution – – 6 – Bits Integral Non–Linearity – – ±1 – LSB Differential Non–Linearity – – +2/–1 – LSB ADC – Y Frequency Response @ –5.0 dB – – 1.0 – MHz ADC – U, V Frequency Response @ –5.0 dB – – 200 – kHz Sample Clock Frequency (4/3 FSC) – – 4.773 – MHz POWER SUPPLY Total Supply (Pins 8, 15, 43 and 50) VIDEO dB HORIZONTAL TIMEBASE VERTICAL TIMEBASE ANALOG TO DIGITAL CONVERTER 2 MOTOROLA ANALOG IC DEVICE DATA MC44462 ELECTRICAL CHARACTERISTICS (continued) (VCC = VDD = 5.0 V, TA = 25°C, unless otherwise noted.) Characteristic Symbol Min Typ Max Resolution – Integral Non–Linearity – Differential Non–Linearity Unit – – 6 Bits – ±1 – LSB – – +2/–1 – LSB Tint DAC Control Range (in 64 Steps) – – ±10 – Deg Saturation DAC Control Range (in 64 steps) – – ±6.0 – dB Color Kill Threshold – – –24/–16 – dB Threshold Hysteresis – – ±1.0 – dB ACC (Chroma Amplitude Change, +3.0 dB to –12 dB) – – ±0.5 – dB – – – – 114 71 84 53 – – – – pels lines pels lines ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ DIGITAL TO ANALOG CONVERTER NTSC DECODER PIP CHARACTERISTICS PIP Size 1/9 Screen Horizontal 1/9 Screen Vertical 1/16 Screen Horizontal 1/16 Screen Vertical – Border Size Horizontal – – 3 – pels Border Size Vertical – – 2 – lines Output PEL Clock (4 FSC) – – 14.318 – MHz Position Control Range Horizontal (% of Main Picture), 64 Steps – – 100 – % Position Control Range Vertical (% of Main Picture), 64 Steps – – 100 – % Figure 1. Representative Block Diagram Decoder Clamp Caps Filter PLL 33 Input Switch PIP Switch 90° 4X S/C Osc + PLL 46 Encoder PLL 47 H and V Timebase 28 31 Band Pass Filter Y 0° 42 Filter Tracking Low Pass Filter NTSC Decoder NTSC Encoder 41 0° 90° 4X S/C Osc + PLL 14.32 MHz 16X S/C Osc + PLL Clamp Y U V V U 57.28 MHz Y Y U V Clamp V U Multiplexer 36 Video 1/ Luma 34 Video 2/Chroma 29 Y Main 32 C Main 37 Decoder ACC 49 Y Out 51 C Out 38 Decoder Xtal 39 Decoder PLL 7 16 FSC PLL 44 Encoder Phase 45 Encoder ACC 40 6–Bit ADC 6 3 Tint DAC Sat DAC 6 Vert Digital Logic 6 10 30 6 3.0 MHz LPF U DAC 3.0 MHz LPF V DAC 3.0 MHz LPF Y DAC 1 2 3 4 5 6 6 Sync Sep H PLL Hin Vin SCL SDA Reset Vid 1/2 Sel Multi Test Memory 8.0 k x 8 DRAM 52 53 54 Encoder Encoder Clamp Caps Xtal This device contains approximately 500,000 active transistors. MOTOROLA ANALOG IC DEVICE DATA 3 MC44462 Figure 2. Application Circuit 5.0 V 5.0 V 1.0 k 1.0 k 1.0 k 1.0 k Horiz In Vert In I2C Ser Cl I2C Ser Data N/C 56 0.01 N/C 55 0.01 SCL Encoder V Cap 54 0.01 4 SDA Encoder U Cap 53 0.01 5 Reset Endoder Y Cap 52 10 µF 6 N/C C Out 51 7 16 FSC Filter Video Out VCC 50 8 Y Out 49 9 VDD (dig) VSS (dig) Analog Gnd 48 10 Video 1/2 Select Encoder Xtal 47 11 N/C Encoder PLL 46 12 N/C Encoder ACC 45 13 N/C Encoder Phase 44 14 Analog VCC 43 15 VDD (mem) VSS (mem) Decoder V Cap 42 16 N/C Decoder U Cap 41 17 N/C Decoder Y Cap 40 18 N/C Decoder PLL 39 19 N/C Decoder Xtal 38 2 Hin Vin 3 1 470 k 5.0 V 2.2 µF 100 1000 5.0 V 10 µF 100 0.01 Video 1/2 Select Out 5.0 V 10 µF 0.01 20 N/C 21 22 23 24 MC44462 Decoder ACC 37 N/C V1/YPIP 36 N/C Analog Gnd 35 N/C V2/CPIP 34 N/C Filter PLL 33 25 N/C C Main 32 26 N/C H PLL 31 27 N/C Multi Test 30 28 SN Sep Y Main 29 75 Chroma Output 5.0 V 75 Luma Output 0.1 100 k 12 X3 1000 0.1 0.01 5.0 V 10 µF 0.01 0.01 2700 0.01 0.01 68 k 0.068 0.22 12 X2 Video 1/ Luma Input 0.1 0.1 0.01 75 1.0 µF 75 0.0068 Main Chroma Input 75 Video 2/ Chroma Input 75 Main Luma Input 12 k 1.0 µF X2 – 14.31818 MHz – Fox 143–20 or equivalent X3 – 14.31818 MHz – Fox 143–20 or equivalent NOTE: 4 For proper noise isolation, Power Supply Pins 8, 14, 43 and 50 should be bypassed by both high and low frequency capacitors. As a guideline, a 10 µF in parallel with a 0.1 µF at each supply pin is recommended. MOTOROLA ANALOG IC DEVICE DATA MC44462 I2C REGISTER DESCRIPTIONS Base write address = 24h Base read address = 25h Test Mode/Main Vertical and Horizontal Polarity Register Sub–address = 03h Read Register There are two active bits in the single read byte available from the MC44462 as follows: Internal Test Mode Register (ITM0–2) – D0–D2 Sets the Multi Test Pin output to provide one of several internal signals for test and production alignment. Also controls the test memory address counter. Write Vertical Indicator (WVI0) – D7 When 0 indicates that the write operation specified by the last I2C command has been completed. PIP Sync Detect Bit (PSD0) – D1 When 0 indicates that the PIP video H pulses are present and the horizontal timebase oscillator is within acceptable limits. Write Registers Read Start Position/Write Start Position Registers Sub–address = 00h Write Raster Position Start Bits (WPS0–2) – D0–D2 Establishes the horizontal beginning of the PIP and its black level measurement gate. This beginning may be varied by approximately 3.0 µs. The position of this pulse may be observed through the Multi Test Pin 30 (See Test Mode Register Sub–address 03h). Read Raster Position Bits (RPS0–3) – D4–D7 Establishes the clamp gate position for the black level reference for the main picture. This position may be varied by approximately 5.0 µs. The position of this pulse may be observed through the Multi Test Pin 30 (See Test Mode Register Sub–address 03h). Pip Switch Delay/Vertical Filter Register Sub–address = 01h PIP Switch Delay Bits (PSD0–3) – D0–D3 Delays the start of PIP on time relative to the PIP picture. These bits are used to center the PIP border and PIP picture in the horizontal direction. Vertical Filter Bit (VFON) – D4 When the filter is activated (VFON = 1) a three line weighted average is taken to provide the data stored in the field memory. Border Color Register Sub–address = 02h Border Color Bits (BC0–2) – D0–D2 These Bits control the color of the border. Note that when using one of the saturated border colors it is possible to get objectionable dot crawl at the edge of the border in some TVs unless appropriate comb filtering is used in the TV circuitry. ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ BC (2:0) Border Color 000 Black 001 White 70% 010 No Border (clear) 011 No Border (clear) 100 Blue 101 Green 110 Red 111 White MOTOROLA ANALOG IC DEVICE DATA ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ITM (2:0) Multi–Test I/O and Function 000 Input – Analog Test mode 001 Input – Digital Test mode 010 Output – Sync Detect 011 Output – PIP Switch 100 Output – PIP H Detect 101 Output – PIP V Detect 110 Output – PIP Clamp 111 Output – Main Clamp Main vertical polarity select bit (MVP0) – D6 Selects polarity of active level of vertical reference input. 0 = positive going, 1 = negative going. Main horizontal polarity select bit (MHP0) – D7 Selects polarity of active level of horizontal reference input. 0 = positive going, 1 = negative going. PIP Freeze/PIP Size/Main and PIP Video Source Register Sub–address = 04h PIP Freeze Bit (STIL0) – D4 When set to one, the most recently received field is continuously displayed until the freeze bit is cleared. PIP Size Bit (PSI90) – D5 Switches the PIP size between 1/16 main size (when 0) and 1/9 main size (when 1). Video Type Select Bit (YCPSEL) – D6 Selects which video type will be applied to the PIP input. PIP Video Source Select Bit (PSEL0) – D7 Selects which composite video input will be applied to the video decoder to provide the PIP video in CV mode. ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ PSEL YCPSEL Function 0 1 YC Input to PIP 0 1 0 CV1 Input to PIP CV2 Input to PIP PIP On/PIP Blank Register Sub–address = 05h PIP On Bit (PON0) – D0 When on (1) turns the PIP on. PIP Blanking Bit (PBL0) – D4 When on (1) sets the PIP to black. If the PIP is off, then it will be black if it is turned on. Overrides all other settings of the PIP control. PIP X Position Register Sub–address = 06h X Position Bits (XPS0–5) – D0–D5 Moves the PIP start position from the left to the right edge of the display in 64 steps. There is protection circuitry 5 MC44462 to prevent the PIP from interfering with the main picture sync pulses. PIP Y Position Register Sub–address = 07h Y Position Bits (YPS0–5) – D0–D5 Moves the PIP start position from the top to the bottom edge of the display in 64 steps. There is protection circuitry to prevent the PIP from interfering with the main picture sync pulses. PIP Chroma Level Register Sub–address = 08h are matched. In addition to this, the tint of the PIP can be varied ±10° in a total of 64 steps by changing the value of these bits to suit viewer preference. PIP Luma Delay Register Sub–address = 0Ah Y Delay (YDL0–2) – D0–D2 Since the Chroma passes through a bandpass filter and the color decoder, it is delayed with respect to the Luma signal. Therefore, to time match the Luma and Chroma these bits are set to a single value determined to be correct in the application. Pip Fill/Test Register Sub–address = 0Ch Chroma (C0–5) – D0–D5 The color of the PIP can be adjusted to suit viewer preference by setting the value stored in these bits. A total of 64 steps varies the color from no color to maximum. This control acts in conjunction with the auto phase control. PIP Fill Bits (PIPFILL0–1) – D0–D1 May be used to fill the PIP with one of three selectable solid colors PIP Tint Level Register Sub–address = 09h Test Register Bits (INTC0 and MACR0) – D6–D7 Used for production test only. Tint (T0–5) – D0–D5 An auto phase control compares the main color burst to the internally generated pseudo color burst so that the tints ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ I2C REGISTER TABLE Data Bit Sub– address D7 D6 D5 D4 D3 D2 D1 D0 00 RPS3 RPS2 RPS1 RPS0 – WPS2 WPS1 WPS0 01 – – – VFON PSD3 PSD2 PSD1 PSD0 02 – – – – – BC2 BC1 BC0 03 MHP0 MVP0 – – – ITM2 ITM1 ITM0 04 PSEL0 YCPSEL PSI90 STIL0 – – – – 05 – – – PBL0 – – – PON0 06 – – XPS5 XPS4 XPS3 XPS2 XPS1 XPS0 07 – – YPS5 YPS4 YPS3 YPS2 YPS1 YPS0 08 – – C5 C4 C3 C2 C1 C0 09 – – T5 T4 T3 T2 T1 T0 0A – – – – – YDL2 YDL1 YDL0 0B – – – – – – – – 0C – – – – – – – – 6 MOTOROLA ANALOG IC DEVICE DATA MC44462 OUTLINE DIMENSIONS B SUFFIX PLASTIC PACKAGE CASE 859–01 (SDIP) ISSUE O NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH. MAXIMUM MOLD FLASH 0.25 (0.010). -A56 29 -B1 DIM A B C D E F G H J K L M N L 28 H C -TSEATING PLANE K G F D 56 PL 0.25 (0.010) N T A S 0.25 (0.010) M MILLIMETERS MIN MAX 51.69 52.45 13.72 14.22 3.94 5.08 0.36 0.56 0.89 BSC 0.81 1.17 1.778 BSC 7.62 BSC 0.20 0.38 2.92 3.43 15.24 BSC 0° 15° 0.51 1.02 M E M INCHES MIN MAX 2.035 2.065 0.540 0.560 0.155 0.200 0.014 0.022 0.035 BSC 0.032 0.046 0.070 BSC 0.300 BSC 0.008 0.015 0.115 0.135 0.600 BSC 0° 15° 0.020 0.040 T J 56 PL B S Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 MOTOROLA ANALOG IC DEVICE DATA ◊ 7 *MC44462/D* MC44462/D