SEMICONDUCTOR TECHNICAL DATA &-&$* *$ ")*( (%)",( "*! +$ +*'+* % $&# %$) "*! &$(%* %'+*) % +*'+*) ** &%%,(*"% The MC74LCX2952 is a high performance, non–inverting octal registered transceiver operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5V allows MC74LCX2952 inputs to be safely driven from 5V devices. The MC74LCX2952 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Two 8–bit back to back registers store data from either of two bidirectional buses. Data applied to the inputs is entered and stored on the rising edge of the Clock (CAB, CBA) provided that the Clock Enable (CEAB, CEBA) is Low. The data is then presented at the 3–state output buffers, but is only accessible when the Output Enable (OEAB, OEBA) is Low. The operation of the MC74LCX2952 is symmetrical — A inputs to B outputs occurs in the same manner as B inputs to A outputs. LOW–VOLTAGE CMOS OCTAL REGISTERED TRANSCEIVER DW SUFFIX 24–LEAD PLASTIC SOIC WIDE PACKAGE CASE 751E–04 • Designed for 2.7 to 3.6V VCC Operation SD SUFFIX 24–LEAD PLASTIC SSOP PACKAGE CASE 940D–03 • 5V Tolerant — Interface Capability With 5V TTL Logic • Supports Live Insertion and Withdrawal • IOFF Specification Guarantees High Impedance When VCC = 0V • LVTTL Compatible • LVCMOS Compatible • 24mA Balanced Output Sink and Source Capability • Near Zero Static Supply Current in All Three Logic States (10µA) DT SUFFIX 24–LEAD PLASTIC TSSOP PACKAGE CASE 948H–01 Substantially Reduces System Power Requirements • Latchup Performance Exceeds 500mA • ESD Performance: Human Body Model >2000V; Machine Model >200V VCC A7 A6 A5 A4 A3 A2 A1 A0 OEBA CBA CEBA 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 B7 B6 B5 B4 B3 B2 B1 B0 OEAB CAB CEAB GND PIN NAMES Pins Function A0–A7 B0–B7 CAB, CBA CEAB, CEBA OEAB, OEBA Side A Inputs/Outputs Side B Inputs/Outputs Clock Pulse Inputs Clock Enable Inputs Output Enable Inputs Figure 1. 24–Lead Pinout (Top View) 3/97 Motorola, Inc. 1997 1 REV 1 MC74LCX2952 OEAB CAB CEAB 9 10 11 8 C A0 Q 16 D C Q D 7 C A1 Q 17 D Q 6 C Q 18 D Q 5 C Q 19 D Q 4 C Q 20 D Q 3 C Q 21 D Q 2 C Q 22 D Q 1 C Q 23 CBA CEBA B7 D C D OEBA B6 C D A7 B5 C D A6 B4 C D A5 B3 C D A4 B2 C D A3 B1 C D A2 B0 Q 15 14 13 Figure 2. Logic Diagram MOTOROLA 2 LCX DATA BR1339 — REV 3 MC74LCX2952 FUNCTION TABLE Inputs OEAB OEBA H H CEAB l L Data Ports CEBA CAB l CBA Bn Input Input Operating Mode ↑ ↑ X X Load Register; Disable Outputs ↑ ↑ X X Hold; Disable Outputs X X Hold; Disable Outputs h h X X Input Output l X ↑ X l h L H ↑ X X QA Hold; Read B Output h X X X X QA Hold; Read B Output Output Input X l X ↑ L H l h Load B to A Register; Read A Output X ↑ QB X Hold; Read A Output X X QB X Hold; Read A Output H H An L X h Load A to B Register; Read B Output H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Low–to–High Clock Transition; L = Low Voltage Level; l = Low Voltage Level One Setup Time Prior to the Low–to–High Clock Transition; X = Don’t Care; ↑ = Low–to–High Clock Transition; ↑ = NOT Low–to–High Clock Transition; QA = A input storage register; QB = B input storage register; * = The clocks are not internally gated with either the Output Enables or the Source Inputs. Therefore, data at the A or B ports may be clocked into the storage registers, at any time. For ICC reasons, Do Not Float Inputs. ABSOLUTE MAXIMUM RATINGS* Symbol Parameter Value Condition Unit VCC DC Supply Voltage –0.5 to +7.0 V VI DC Input Voltage –0.5 ≤ VI ≤ +7.0 V VO DC Output Voltage –0.5 ≤ VO ≤ +7.0 Output in 3–State V –0.5 ≤ VO ≤ VCC + 0.5 Note 1. V –50 VI < GND mA –50 VO < GND mA +50 VO > VCC mA IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current Per Ground Pin ±100 mA TSTG Storage Temperature Range –65 to +150 °C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. 1. Output in HIGH or LOW State. IO absolute maximum rating must be observed. LCX DATA BR1339 — REV 3 3 MOTOROLA MC74LCX2952 RECOMMENDED OPERATING CONDITIONS Symbol Parameter Operating Data Retention Only Min Typ Max Unit 2.0 1.5 3.3 3.3 3.6 3.6 V 0 5.5 V 0 0 VCC 5.5 V VCC Supply Voltage VI Input Voltage VO Output Voltage IOH HIGH Level Output Current, VCC = 3.0V – 3.6V –24 mA IOL LOW Level Output Current, VCC = 3.0V – 3.6V 24 mA IOH HIGH Level Output Current, VCC = 2.7V – 3.0V –12 mA IOL LOW Level Output Current, VCC = 2.7V – 3.0V 12 mA TA Operating Free–Air Temperature –40 +85 °C ∆t/∆V Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V 0 10 ns/V (HIGH or LOW State) (3–State) DC ELECTRICAL CHARACTERISTICS TA = –40°C to +85°C Symbol Characteristic Condition Min 2.0 VIH HIGH Level Input Voltage (Note 2.) 2.7V ≤ VCC ≤ 3.6V VIL LOW Level Input Voltage (Note 2.) 2.7V ≤ VCC ≤ 3.6V VOH HIGH Level Output Voltage VOL LOW Level Output Voltage Max V 0.8 2.7V ≤ VCC ≤ 3.6V; IOH = –100µA VCC – 0.2 VCC = 2.7V; IOH = –12mA 2.2 VCC = 3.0V; IOH = –18mA 2.4 VCC = 3.0V; IOH = –24mA 2.2 Unit V V 2.7V ≤ VCC ≤ 3.6V; IOL = 100µA 0.2 VCC = 2.7V; IOL= 12mA 0.4 VCC = 3.0V; IOL = 16mA 0.4 VCC = 3.0V; IOL = 24mA 0.55 V II Input Leakage Current 2.7V ≤ VCC ≤ 3.6V; 0V ≤ VI ≤ 5.5V ±5.0 µA IOZ 3–State Output Current 2.7 ≤ VCC ≤ 3.6V; 0V ≤ VO ≤ 5.5V; VI = VIH or V IL ±5.0 µA IOFF Power–Off Leakage Current VCC = 0V; VI or VO = 5.5V 10 µA ICC Quiescent Supply Current 2.7 ≤ VCC ≤ 3.6V; VI = GND or VCC 10 µA 2.7 ≤ VCC ≤ 3.6V; 3.6 ≤ VI or VO ≤ 5.5V ±10 µA 500 µA ∆ICC Increase in ICC per Input 2.7 ≤ VCC ≤ 3.6V; VIH = VCC – 0.6V 2. These values of VI are used to test DC electrical characteristics only. MOTOROLA 4 LCX DATA BR1339 — REV 3 MC74LCX2952 AC CHARACTERISTICS (Note 3.; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω) Limits TA = –40°C to +85°C VCC = 3.0V to 3.6V Symbol Parameter Waveform Min Max VCC = 2.7V Min Max Unit fmax Clock Pulse Frequency 3 150 MHz tPLH tPHL Propagation Delay Clock to Output 1 1.5 1.5 8.0 8.0 1.5 1.5 9.0 9.0 ns tPZH tPZL Output Enable Time to High and Low Level 2 1.5 1.5 8.0 8.0 1.5 1.5 9.0 9.0 ns tPHZ tPLZ Output Disable Time From High and Low Level 2 1.5 1.5 6.0 6.0 1.5 1.5 7.0 7.0 ns ts Setup Time, HIGH to LOW Data to Clock 3 2.5 2.5 ns th Hold Time, HIGH to LOW Data to Clock 3 1.5 1.5 ns ts Setup Time, HIGH to LOW CExx to Clock 3 2.5 2.5 ns th Hold Time, HIGH to LOW CExx to Clock 3 1.5 1.5 ns tw Clock Pulse Width, HIGH or LOW 3 3.3 3.3 ns tOSHL tOSLH Output–to–Output Skew (Note 4.) 1.0 1.0 ns 3. These AC parameters are preliminary and may be modified prior to release. The maximum AC limits are design targets. Actual performance will be specified upon completion of characterization. 4. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter guaranteed by design. DYNAMIC SWITCHING CHARACTERISTICS TA = +25°C Symbol Characteristic Condition VOLP Dynamic LOW Peak Voltage (Note 5.) VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V Min Typ 0.8 Max Unit V VOLV Dynamic LOW Valley Voltage (Note 5.) VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V 0.8 V 5. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Unit CIN Input Capacitance VCC = 3.3V, VI = 0V or VCC 7 pF CI/O Input/Output Capacitance VCC = 3.3V, VI = 0V or VCC 8 pF CPD Power Dissipation Capacitance 10MHz, VCC = 3.3V, VI = 0V or VCC 25 pF LCX DATA BR1339 — REV 3 5 MOTOROLA MC74LCX2952 2.7V CAB, CBA 1.5V 0V tPLH, tPHL VOH Bn, An 1.5V VOL WAVEFORM 1 – Cxx to An/Bn PROPAGATION DELAYS tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns OEAB, OEBA 2.7V 1.5V 1.5V 0V tPZH tPHZ VOH – 0.3V 1.5V An, Bn ≈ 0V tPZL tPLZ ≈ 3V 1.5V Bn, An VOL + 0.3V WAVEFORM 2 – OExx to An/Bn OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns 2.7V An, Bn, CEAB, CEBA 1.5V 0V ts th 2.7V CAB, CBA tw 1.5V 1.5V 0V fmax WAVEFORM 3 – Cxx MINIMUM PULSE WIDTH, An/Bn/CExx to Cxx SETUP AND HOLD TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns except when noted Figure 3. AC Waveforms MOTOROLA 6 LCX DATA BR1339 — REV 3 MC74LCX2952 tw NEGATIVE PULSE 1.5V 1.5V POSITIVE PULSE 1.5V 1.5V tw WAVEFORM 4 – INPUT PULSE DEFINITION tR = tF = 2.5ns, 10% to 90% of 0V to 2.7V Figure 4. AC Waveforms (continued) VCC PULSE GENERATOR R1 DUT CL RT TEST 6V OPEN GND RL SWITCH tPLH, tPHL Open tPZL, tPLZ 6V Open Collector/Drain tPLH and tPHL 6V tPZH, tPHZ GND CL = 50pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 5. Test Circuit LCX DATA BR1339 — REV 3 7 MOTOROLA MC74LCX2952 OUTLINE DIMENSIONS DW SUFFIX PLASTIC SOIC PACKAGE CASE 751E–04 ISSUE E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A – 24 13 –B – 1 P 12 PL 0.010 (0.25) M B M 12 J D 24 PL 0.010 (0.25) T A M B S DIM A B C D F G J K M P R S F R X 45° C –T – SEATING PLANE M K G 22 PL MILLIMETERS MIN MAX 15.25 15.54 7.60 7.40 2.65 2.35 0.49 0.35 0.90 0.41 1.27 BSC 0.32 0.23 0.29 0.13 8° 0° 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.601 0.612 0.292 0.299 0.093 0.104 0.014 0.019 0.016 0.035 0.050 BSC 0.009 0.013 0.005 0.011 0° 8° 0.395 0.415 0.010 0.029 SD SUFFIX PLASTIC SSOP PACKAGE CASE 940D–03 ISSUE B 24X K REF 0.12 (0.005) M T U S V ÇÇÇÇ ÉÉÉ ÇÇÇÇ ÉÉÉ ÇÇÇÇ S K L/2 24 J 13 K1 B L J1 SECTION N–N PIN 1 IDENT 1 12 0.20 (0.008) M T U 0.25 (0.010) –U– A –V– N M S NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 5 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION/INTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF K DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR INTRUSION SHALL NOT REDUCE DIMENSION K BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL CONDITION. 6 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. N F DETAIL E 0.076 (0.003) –T– SEATING PLANE –W– C D G H MOTOROLA DETAIL E 8 DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 8.07 8.33 5.20 5.38 1.73 1.99 0.05 0.21 0.63 0.95 0.65 BSC 0.44 0.60 0.09 0.20 0.09 0.16 0.25 0.38 0.25 0.33 7.65 7.90 0_ 8_ INCHES MIN MAX 0.317 0.328 0.205 0.212 0.068 0.078 0.002 0.008 0.024 0.037 0.026 BSC 0.017 0.024 0.003 0.008 0.003 0.006 0.010 0.015 0.010 0.013 0.301 0.311 0_ 8_ LCX DATA BR1339 — REV 3 MC74LCX2952 OUTLINE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948H–01 ISSUE O 24X K REF 0.10 (0.004) 0.15 (0.006) T U T U M V S S S 2X 24 L/2 13 B –U– L PIN 1 IDENT. 12 1 0.15 (0.006) T U NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. S A –V– DIM A B C D F G H J J1 K K1 L M C 0.10 (0.004) –T– SEATING PLANE G D H –W– MILLIMETERS MIN MAX 7.70 7.90 4.30 4.50 ––– 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.303 0.311 0.169 0.177 ––– 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ DETAIL E N 0.25 (0.010) K ÉÉ ÇÇÇ ÇÇÇ ÉÉ K1 J1 M N F SECTION N–N DETAIL E J LCX DATA BR1339 — REV 3 9 MOTOROLA MC74LCX2952 Motorola reserves the right to make changes without further notice to any products herein. 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