SEMICONDUCTOR TECHNICAL DATA ! " The MC74LCX74 is a high performance, dual D–type flip–flop with asynchronous clear and set inputs and complementary (O, O) outputs. It operates from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5V allows MC74LCX74 inputs to be safely driven from 5V devices. The MC74LCX74 consists of 2 edge–triggered flip–flops with individual D–type inputs. The flip–flop will store the state of individual D inputs, that meet the setup and hold time requirements, on the LOW–to–HIGH Clock (CP) transition. LOW–VOLTAGE CMOS DUAL D–TYPE FLIP–FLOP • Designed for 2.7 to 3.6V VCC Operation • 5V Tolerant Inputs — Interface Capability With 5V TTL Logic D SUFFIX PLASTIC SOIC CASE 751A–03 14 • LVTTL Compatible 1 • LVCMOS Compatible • 24mA Balanced Output Sink and Source Capability • Near Zero Static Supply Current in All Three Logic States (10µA) M SUFFIX PLASTIC SOIC EIAJ CASE 965–01 14 1 Substantially Reduces System Power Requirements • Latchup Performance Exceeds 500mA • ESD Performance: Human Body Model >2000V; Machine Model >200V Pinout: 14–Lead (Top View) VCC 14 1 SD SUFFIX PLASTIC SSOP CASE 940A–03 1 DT SUFFIX PLASTIC TSSOP CASE 948G–01 14 14 CD2 D2 CP2 SD2 O2 O2 13 12 11 10 9 8 PIN NAMES Pins 1 2 3 4 5 6 7 CD1 D1 CP1 SD1 O1 O1 GND CP1, CP2 D1, D2 CD1, CD2 SD1, SD2 On, On 11/96 Motorola, Inc. 1996 1 REV 1 Function Clock Pulse Inputs Data Inputs Direct Clear Inputs Direct Set Inputs Outputs MC74LCX74 LOGIC DIAGRAM SD1 4 SD D1 CP1 2 3 D Q Q CP 5 6 O1 O1 CD CD1 SD2 1 10 SD D2 CP2 12 11 D Q Q CP 9 8 O2 O2 CD CD2 13 INPUTS OUTPUTS SDn CDn CPn Dn On On OPERATING MODE L H H L X X X X H L L H Asynchronous Set Asynchronous Clear L L X X H H Undetermined H H H H ↑ ↑ h l H L L H Load and Read Register H H ↑ X NC NC Hold H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Low–to–High Clock Transition; L = Low Voltage Level; l = Low Voltage Level One Setup Time Prior to the Low–to–High Clock Transition; NC = No Change; X = High or Low Voltage Level or Transitions are Acceptable; ↑ = Low–to–High Transition; ↑ = Not a Low–to–High Transition; For ICC Reasons DO NOT FLOAT Inputs MOTOROLA 2 LCX DATA BR1339 — REV 3 MC74LCX74 ABSOLUTE MAXIMUM RATINGS* Symbol Parameter Value Condition Unit VCC DC Supply Voltage –0.5 to +7.0 V VI DC Input Voltage –0.5 ≤ VI ≤ +7.0 V VO DC Output Voltage –0.5 ≤ VO ≤ VCC + 0.5 Note 1. V IIK DC Input Diode Current –50 VI < GND mA IOK DC Output Diode Current –50 VO < GND mA +50 VO > VCC mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current Per Ground Pin ±100 mA TSTG Storage Temperature Range –65 to +150 °C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. 1. Output in HIGH or LOW State. IO absolute maximum rating must be observed. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Operating Data Retention Only Min Typ Max Unit 2.0 1.5 3.3 3.3 3.6 3.6 V 0 5.5 V 0 VCC V VCC Supply Voltage VI Input Voltage VO Output Voltage IOH HIGH Level Output Current, VCC = 3.0V – 3.6V –24 mA IOL LOW Level Output Current, VCC = 3.0V – 3.6V 24 mA IOH HIGH Level Output Current, VCC = 2.7V – 3.0V –12 mA IOL LOW Level Output Current, VCC = 2.7V – 3.0V TA Operating Free–Air Temperature ∆t/∆V Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V (HIGH or LOW State) 12 mA –40 +85 °C 0 10 ns/V DC ELECTRICAL CHARACTERISTICS TA = –40°C to +85°C Symbol Characteristic Condition Min 2.0 VIH HIGH Level Input Voltage (Note 2.) 2.7V ≤ VCC ≤ 3.6V VIL LOW Level Input Voltage (Note 2.) 2.7V ≤ VCC ≤ 3.6V VOH HIGH Level Output Voltage VOL LOW Level Output Voltage Max V 0.8 2.7V ≤ VCC ≤ 3.6V; IOH = –100µA VCC – 0.2 VCC = 2.7V; IOH = –12mA 2.2 VCC = 3.0V; IOH = –18mA 2.4 VCC = 3.0V; IOH = –24mA 2.2 Unit V V 2.7V ≤ VCC ≤ 3.6V; IOL = 100µA 0.2 VCC = 2.7V; IOL= 12mA 0.4 VCC = 3.0V; IOL = 16mA 0.4 VCC = 3.0V; IOL = 24mA 0.55 V 2. These values of VI are used to test DC electrical characteristics only. LCX DATA BR1339 — REV 3 3 MOTOROLA MC74LCX74 DC ELECTRICAL CHARACTERISTICS (continued) TA = –40°C to +85°C Symbol Characteristic II Input Leakage Current ICC Quiescent Supply Current ∆ICC Increase in ICC per Input Condition Min Max Unit 2.7V ≤ VCC ≤ 3.6V; 0V ≤ VI ≤ 5.5V ±5.0 µA 2.7 ≤ VCC ≤ 3.6V; VI = GND or VCC 10 µA 2.7 ≤ VCC ≤ 3.6V; 3.6 ≤ VI ≤ 5.5V ±10 µA 2.7 ≤ VCC ≤ 3.6V; VIH = VCC – 0.6V 500 µA AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω) Limits TA = –40°C to +85°C VCC = 3.0V to 3.6V Symbol Parameter Max VCC = 2.7V Waveform Min fmax Clock Pulse Frequency 1 150 Min Max Unit tPLH tPHL Propagation Delay CPn to On or On 1 1.5 1.5 7.0 7.0 8.0 8.0 ns tPLH tPHL Propagation Delay SDn or CDn to On or On 2 1.5 1.5 7.0 7.0 8.0 8.0 ns ts Setup TIme, HIGH or LOW Dn to CPn 1 2.5 2.5 ns th Hold TIme, HIGH or LOW Dn to CPn 1 1.5 1.5 ns tw CPn Pulse Width, HIGH or LOW 1 3.3 3.3 ns SDn or CDn Pulse Width, LOW 3 3.3 3.6 ns trec Recovery TIme SDn or CDn to CPn 1 2.5 3.0 ns tOSHL tOSLH Output–to–Output Skew (Note 3.) MHz 1.0 1.0 ns 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter guaranteed by design. DYNAMIC SWITCHING CHARACTERISTICS TA = +25°C Symbol Characteristic Condition Min Typ Max Unit VOLP Dynamic LOW Peak Voltage (Note 4.) VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V 0.8 V VOLV Dynamic LOW Valley Voltage (Note 4.) VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V 0.8 V 4. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Parameter CIN Input Capacitance COUT Output Capacitance CPD Power Dissipation Capacitance MOTOROLA Condition Typical Unit VCC = 3.3V, VI = 0V or VCC 7 pF VCC = 3.3V, VI = 0V or VCC 8 pF 10MHz, VCC = 3.3V, VI = 0V or VCC 25 pF 4 LCX DATA BR1339 — REV 3 MC74LCX74 2.7V Dn 1.5V 0V th ts 2.7V tw CPn 1.5V 0V fmax tPLH, tPHL VOH On, On 1.5V VOL WAVEFORM 1 – PROPAGATION DELAYS, SETUP AND HOLD TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns 2.7V SDn 0V 2.7V CDn 1.5V 0V tPLH On tPHL 1.5V 1.5V VOL VOH tPLH On 1.5V 1.5V tPHL WAVEFORM 2 – PROPAGATION DELAYS tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns 2.7V tw SDn, CDn 1.5V 0V trec 2.7V 1.5V CPn 0V WAVEFORM 3 – RECOVERY TIME tR = tF = 2.5ns from 10% to 90%; f = 1MHz; tw = 500ns Figure 1. AC Waveforms LCX DATA BR1339 — REV 3 5 MOTOROLA MC74LCX74 2.7V CPn 1.5V 1.5V tw 0V 2.7V tw 1.5V SDn, CDn, CPn 1.5V 0V WAVEFORM 4 – PULSE WIDTH tR = tF = 2.5ns (or fast as required) from 10% to 90%; Output requirements: VOL ≤ 0.8V, VOH ≥ 2.0V Figure 1. AC Waveforms (continued) VCC PULSE GENERATOR DUT RT CL RL CL = 50pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 2. Test Circuit MOTOROLA 6 LCX DATA BR1339 — REV 3 MC74LCX74 OUTLINE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751A–03 ISSUE F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A – 14 8 –B – 1 P7 PL 0.25 (0.010) 7 G D 0.25 (0.010) M T F B A S DIM A B C D F G J K M P R J M K 14 PL M R X 45° C SEATING PLANE B M S MILLIMETERS MIN MAX 8.75 8.55 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 BSC 0.25 0.19 0.25 0.10 7° 0° 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 7° 0° 0.228 0.244 0.010 0.019 M SUFFIX PLASTIC SOIC EIAJ PACKAGE CASE 965–01 ISSUE O 14 NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5 THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). LE 8 Q1 E HE M_ L 7 1 DETAIL P Z D e VIEW P A c b 0.13 (0.005) LCX DATA BR1339 — REV 3 A1 M 0.10 (0.004) 7 DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --1.42 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.056 MOTOROLA MC74LCX74 OUTLINE DIMENSIONS SD SUFFIX PLASTIC SSOP PACKAGE CASE 940A–03 ISSUE B 14X K REF 0.12 (0.005) T U M S V S NOTES: 6 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 7 CONTROLLING DIMENSION: MILLIMETER. 8 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 9 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 10 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION/INTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF K DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR INTRUSION SHALL NOT REDUCE DIMENSION K BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL CONDITION. 11 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 12 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. 0.25 (0.010) N 14 L/2 8 M N B L F PIN 1 IDENT 1 7 DETAIL E –U– A –V– 0.20 (0.008) M T U ÉÉÉÉ ÇÇÇÇ ÇÇÇÇ ÉÉÉÉ K J S J1 K1 SECTION N–N 0.076 (0.003) –T– –W– C SEATING PLANE DIM A B C D F G H J J1 K K1 L M D G DETAIL E H MILLIMETERS MIN MAX 6.07 6.33 5.20 5.38 1.73 1.99 0.05 0.21 0.63 0.95 0.65 BSC 1.08 1.22 0.09 0.20 0.09 0.16 0.25 0.38 0.25 0.33 7.65 7.90 0_ 8_ INCHES MIN MAX 0.238 0.249 0.205 0.212 0.068 0.078 0.002 0.008 0.024 0.037 0.026 BSC 0.042 0.048 0.003 0.008 0.003 0.006 0.010 0.015 0.010 0.013 0.301 0.311 0_ 8_ DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G–01 ISSUE O 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. S S N 2X 14 L/2 0.25 (0.010) 8 M B –U– L PIN 1 IDENT. F 7 1 0.15 (0.006) T U N S DETAIL E K A –V– ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ K1 J J1 SECTION N–N –W– C 0.10 (0.004) –T– SEATING PLANE MOTOROLA D G H DETAIL E 8 DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 ––– 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 ––– 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ LCX DATA BR1339 — REV 3 MC74LCX74 Motorola reserves the right to make changes without further notice to any products herein. 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