SN54/74LS107A
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct
Clear and Clock Pulse inputs. Output changes are initiated by the
HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the
other inputs and makes the Q output LOW.
The SN54 / 74LS107A is the same as the SN54 / 74LS73A but has corner
power pins.
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
CONNECTION DIAGRAM DIP (TOP VIEW)
J SUFFIX
CERAMIC
CASE 632-08
14
1
NOTE:
The Flatpak version has the
same pinouts (Connection
Diagram) as the Dual In-Line
Package.
N SUFFIX
PLASTIC
CASE 646-06
14
1
LOGIC SYMBOL
14
1
D SUFFIX
SOIC
CASE 751A-02
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
GUARANTEED OPERATING RANGES
Min
Typ
Max
Unit
VCC
Symbol
Supply Voltage
Parameter
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
TA
Operating Ambient Temperature Range
54
74
– 55
0
25
25
125
70
°C
IOH
Output Current — High
54, 74
– 0.4
mA
IOL
Output Current — Low
54
74
4.0
8.0
mA
FAST AND LS TTL DATA
5-177
SN54/74LS107A
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIK
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
IIH
Min
Parameter
Typ
Max
2.0
54
0.7
74
0.8
– 0.65
– 1.5
Unit
Test Conditions
V
Guaranteed Input HIGH Voltage for
All Inputs
V
Guaranteed Input LOW Voltage for
All Inputs
V
VCC = MIN, IIN = – 18 mA
54
2.5
3.5
V
74
2.7
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
54, 74
0.25
0.4
V
IOL = 4.0 mA
74
0.35
0.5
V
IOL = 8.0 mA
J, K
Clear
Clock
20
60
80
µA
VCC = MAX, VIN = 2.7 V
J, K
Clear
Clock
0.1
0.3
0.4
mA
VCC = MAX, VIN = 7.0 V
– 0.4
– 0.8
mA
VCC = MAX, VIN = 0.4 V
–100
mA
VCC = MAX
6.0
mA
VCC = MAX
Max
Unit
Input HIGH Current
IIL
Input LOW Current
IOS
Short Circuit Current (Note 1)
ICC
Power Supply Current
J, K
Clear and Clock
– 20
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Limits
Symbol
Parameter
fMAX
Maximum Clock Frequency
tPLH
tPHL
Propagation Delay,
Clock to Output
Min
Typ
30
45
Test Conditions
MHz
15
20
ns
15
20
ns
Max
Unit
VCC = 5.0 V
CL = 15 pF
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Limits
Symbol
Parameter
Min
Typ
tW
Clock Pulse Width
20
ns
tW
Clear Pulse Width
25
ns
ts
Setup Time
20
ns
th
Hold Time
0
ns
FAST AND LS TTL DATA
5-178
Test Conditions
VCC = 5.0 V
Case 751A-02 D Suffix
14-Pin Plastic
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14-Pin Ceramic Dual In-Line
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FAST AND LS TTL DATA
5-179
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◊
FAST AND LS TTL DATA
5-180