KM23V8105D(G) CMOS MASK ROM 8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Switchable organization 1,048,576 x 8(byte mode) 524,288 x 16(word mode) • Random access time/Page Access Time 3.3V Operation : 100/30ns(Max.) 3.0V Operation : 120/50ns(Max.) • 4 Words / 8 bytes page access • Supply voltage : single +3.0V/ single +3.3V • Current consumption Operating : 40mA(Max.) Standby : 30µA(Max.) • Fully static operation • All inputs and outputs TTL compatible • Three state outputs • Package -. KM23V8105D : 42-DIP-600 -. KM23V8105DG : 44-SOP-600 The KM23V8105D(G) is a fully static mask programmable ROM fabricated using silicon gate CMOS process technology, and is organized either as 1,048,576 x 8 bit(byte mode) or as 524,288 x 16 bit(word mode) depending on BHE voltage level.(See mode selection table) This device includes PAGE read mode function, page read mode allows 4 words(or 8 bytes) of data to read fast in the same page, CE and A2 ~ A18 should not be changed. This device operates with 3.0V or 3.3V power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and data memory, character generator. The KM23V8105D is packaged in a 42-DIP and the KM23V8105DG in a 44-SOP. FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION A18 . . . . . . . . A2 A0~A1 A-1 X BUFFERS AND DECODER MEMORY CELL MATRIX (524,288x16/ 1,048,576x8) Y BUFFERS AND DECODER SENSE AMP. DATA OUT BUFFERS . . . A18 1 42 N.C N.C 1 44 N.C A17 2 41 A8 A18 2 43 N.C A7 3 40 A9 A17 3 42 A8 A6 4 39 A10 A7 4 41 A9 A5 5 38 A11 A6 5 40 A10 A4 6 37 A12 A5 6 39 A11 A3 7 36 A13 A4 7 38 A12 A2 8 35 A14 A3 8 37 A13 A1 9 34 A15 A2 9 36 A14 A0 10 33 A16 A1 10 35 A15 CE 11 VSS 12 CE OE Q0/Q8 CONTROL LOGIC BHE Pin Name A0 - A1 A2 - A18 Pin Function Page Address Inputs Address Inputs Q7/Q15 DIP OE 13 Q15 /A-1 Q0 14 29 Q7 Q8 15 28 Q14 Q1 16 27 Q6 Q9 17 26 Q13 Q2 18 25 Q5 Q10 19 24 Q12 Q3 20 23 Q4 BHE 22 VCC Data Outputs Output 15(Word mode)/ LSB Address(Byte mode) Word/Byte selection CE Chip Enable OE Output Enable VCC Power VSS Ground N.C No Connection 31 VSS 30 Q15/A-1 Q11 21 Q0 - Q14 32 BHE A0 11 CE 12 SOP 34 A16 33 BHE VSS 13 32 VSS OE 14 31 Q15/A-1 Q0 15 30 Q7 Q8 16 29 Q14 Q1 17 28 Q6 Q9 18 27 Q13 Q2 19 26 Q5 Q10 20 25 Q12 Q3 21 24 Q4 Q11 22 23 VCC KM23V8105D KM23V8105DG KM23V8105D(G) CMOS MASK ROM ABSOLUTE MAXIMUM RATINGS Item Voltage on Any Pin Relative to VSS Symbol Rating Unit VIN -0.3 to +4.5 V Temperature Under Bias TBIAS -10 to +85 °C Storage Temperature TSTG -55 to +150 °C NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to th e conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extend ed periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS (Voltage reference to VSS, TA=0 to 70°C) Symbol Min Typ Max Unit Supply Voltage Item VCC 2.7/3.0 3.0/3.3 3.3/3.6 V Supply Voltage VSS 0 0 0 V DC CHARACTERISTICS Min Max Unit Operating Current Parameter Symbol ICC CE=OE=VIL, all outputs open - 40 mA Standby Current(TTL) ISB1 CE=VIH, all outputs open - 500 µA Standby Current(CMOS) ISB2 CE=VCC, all outputs open - 30 µA ILI VIN=0 to VCC - 10 µA Output Leakage Current ILO VOUT=0 to VCC Input High Voltage, All Inputs VIH Input Leakage Current Test Conditions - 10 µA 2.0 VCC+0.3 V Input Low Voltage, All Inputs VIL -0.3 0.6 V Output High Voltage Level VOH IOH=-400µA 2.4 - V Output Low Voltage Level VOL IOL=2.1mA - 0.4 V NOTE : Minimum DC Voltage(VIL) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns. Maximum DC voltage on input pins(VIH) is VCC+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns. MODE SELECTION CE OE BHE Q15/A-1 Mode Data Power H X X X Standby High-Z Standby L H L L X X Operating High-Z Active H Output Operating Q0~Q15 : Dout Active L Input Operating Q0~Q7 : Dout Q8~Q14 : Hi-Z Active Max Unit CAPACITANCE (TA=25°C, f=1.0MHz) Item Output Capacitance Input Capacitance Symbol Test Conditions COUT VOUT=0V - 12 pF CIN VIN=0V - 12 pF NOTE : Capacitance is periodically sampled and not 100% tested. MIN KM23V8105D(G) CMOS MASK ROM AC CHARACTERISTICS (TA=0°C to +70°C, VCC=3.3V/3.0V±0.3V, unless otherwise noted.) TEST CONDITIONS Item Value Input Pulse Levels 0.45V to 2.4V Input Rise and Fall Times 10ns Input and Output timing Levels 1.5V Output Loads 1 TTL Gate and CL=100pF READ CYCLE Item Symbol Vcc=3.3V±0.3V Min Max Min Unit Max Read Cycle Time tRC Chip Enable Access Time tACE 100 120 ns Address Access Time tAA 100 120 ns Page Address Access Time tPA 30 50 ns Output Enable Access Time tOE 30 50 ns Output or Chip Disable to Output High-Z tDF 20 20 ns Output Hold from Address Change tOH NOTE : Page Address is determined as below. Word mode (BHE = VIH) : A0, A1 Byte mode (BHE = VIL) : A-1, A0, A1 100 Vcc=3.0V±0.3V 0 120 0 ns ns KM23V8105D(G) CMOS MASK ROM TIMING DIAGRAM READ ADD A0~A18 A-1(*1) ADD2 ADD1 tRC tDF(*3) tACE CE tOE tAA OE tOH DOUT D0~D7 D8~D15(*2) VALID DATA VALID DATA PAGE READ CE tDF(*3) OE ∼ ∼ ADD A2~A18 ∼ ADD A0,A1 A-1(*1) 1 st 2 nd ∼ tAA tPA ∼ VALID DATA VALID DATA VALID DATA VALID DATA ∼ DOUT D0~D7 D8~D15(*2) 3 rd NOTES : *1. Byte Mode only. A-1 is Least Significant Bit Address.(BHE = VIL) *2. Word Mode only.(BHE = VIH) *3. tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to V OH or VOL level. KM23V8105D(G) CMOS MASK ROM PACKAGE DIMENSIONS 42-DIP-600 0.25 +0.10 -0.05 0.010 +0.004 -0.002 #42 #22 #1 #21 15.24 0.600 13.80±0.20 0.543±0.008 3.91±0.20 0.154±0.008 5.08 0.200MAX 52.82 MAX 2.080 52.42±0.20 2.064±0.008 0.46±0.10 0.018±0.004 1.27±.10 0.050±0.004 ( 0.81 ) 0.032 0~15° 2.54 0.100 3.1±0.30 0.122±0.012 0.38 MIN 0.015 44-SOP-600 0~8° #23 15.24 0.600 #44 16.04±0.30 12.60±0.20 0.631±0.012 0.496±0.008 #1 #22 +0.10 -0.05 0.008+0.004 -0.002 0.20 2.80±0.20 0.110±0.008 3.10 0.122 MAX 28.95 MAX 1.140 28.50±0.20 1.122±0.008 0.10 MAX 0.004 MAX ( 0.915 ) 0.036 0.40 +0.100 -0.050 0.016+0.004 -0.002 1.27 0.050 0.05 MIN 0.002 0.80±0.20 0.031±0.008