SANYO LA4485

Ordering number: EN3680C
Monolithic Linear IC
LA4485
5 W, Two-channel Power Amplifier with Very Few
External Parts
Overview
Package Dimensions
The LA4485 is a 5 W, two-channel power amplifier IC that
requires a minimum of external parts, making it ideal for radio
cassette players and car stereo equipment.
unit : mm
3107-SIP13H
[LA4485]
The LA4485 eliminates the need for bootstrap capacitors,
negative feedback capacitors, and oscillation prevention CR
parts, all of which were necessities for power ICs previously.
All of these functions are now on chip, keeping the number of
external parts to an absolute minimum. The LA4485 is part of
the Power (Stylish Power) Series, and supports two modes:
dual and BTL.
Features
. 5 W × 2 output power in dual mode, and 15 W in BTL mode
. Minimum external parts for the Power Series count:
or 5 parts in dual mode; 3 or 4 parts in BTL mode
. 4Protection
circuits
.
.
.
.
SANYO : SIP13H
Overvoltage protection
Thermal protection
DC output short-circuit protection (to VCC and to GND)
Circuitry designed to handle +VCC applied to the outputs
Pop noise reduction
Standby switch
Muting function
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Surge supply voltage
Symbol
VCC max
VCC surge *
Conditions
Ratings
Unit
No signal
24
V
Based on the JASO standard
50
V
Peak output current
IO peak
Per channel
3.3
A
Allowable power dissipation
Pd max
With infinite heat sink
15
W
Operating temperature
Topr
–30 to +80
°C
Storage temperature
Tstg
–40 to +150
°C
Ratings
Unit
*: By the π type B check point method.
Operating Conditions at Ta = 25°C
Parameter
Recommended supply voltage
Supply voltage range
Recommended load resistance range
Symbol
Conditions
VCC
VCC op
RL
13.2
Must not be over package Pd
V
7.5 to 18
V
Dual
2 to 8
Ω
BTL
4 to 8
Ω
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
73096HA(II)/D2893TS/9041TS No.3680-1/20
LA4485
Operating Characteristics at Ta = 25°C, VCC = 13.2 V, RL = 4 Ω, Rg = 600 Ω, f = 1 kHz, Dual
Parameter
Standby current
Quiescent supply current
Symbol
Ist
ICCO
VG1
VG2
PO1*
P O2
THD
CH sep
VNO
Voltage gain
Output power
Total harmonic distortion
Channel separation
Output noise voltage
Ripple rejection ratio
Conditions
Pin 9 to GND, Standby switch OFF
Rg = 0
Dual: VO = 0 dBm
BTL: VO = 0 dBm
Dual: THD = 10%
BTL: THD = 10%
PO = 1 W
VO = 0 dBm, Rg = 0
Rg = 0, 20 Hz to 20 kHz bandpass filter
Rg = 0, 20 Hz to 20 kHz bandpass filter,
fR = 100 Hz, VR = 0 dBm, decoupling capacitor
connected
SVRR
min
typ
40
43
80
45
51
5
15
0.15
55
0.15
4
11
45
40
50
max
10
160
47
0.8
0.5
Unit
µA
mA
dB
dB
W
W
%
dB
mV
dB
Allowable power dissipation, Pd max – W
*: PO1 = 6 W (typ) when VCC = 14.4 V
Voff ± 250 mV for BTL-mode
Pd max – Ta
Al heat sink
mounting
conditions
Mounting
torque
39 Nvcm.
Flat washer
with silicone
grease
applied
Infinite heat sink
No heat sink
Ambient temperature, Ta – °C
Equivalent Circuit Block Diagram
FILTER
Large signal
VCC
Small signal
VCC
Filter
CH1 IN
Input
amp
CH1
Pre
drive
amp
Output-to-ground
short-circuit
protection
Output
amp
CH1 OUT
Output-to-supply
short-circuit
protection
Thermal shutdown
protection
Small signal GND
REF
amp
Large signal GND
Overvoltage
protection
BTL IN
CH2 IN
Input
amp
CH2
Pre
drive
amp
Output-to-supply
short-circuit
protection
Output
amp
Standby switch
BTL OUT
CH2 OUT
Output-to-ground
short-circuit
protection
STANDBY
Mute
MUTE
No.3680-2/20
LA4485
Recommended LA4485 External Parts Arrangement (Dual-mode)
95.0 × 67.0 mm2
IC Usage Notes
Maximum ratings
Care must be taken when operating the LA4485 close to the maximum ratings as small changes in the operating conditions can
cause the maximum ratings to be exceeded, thereby breakdown will be caused.
Printed circuit board connections
Care must be taken when designing the circuit of printed board so as not to form feedback loops, particularly with the small-signal
and large-signal ground connections.
Notes on LA4485 heatsink mounting
1.
2.
3.
4.
5.
6.
Mounting torque must be in the range 39 to 59 Nvcm.
The spacing of the tapped holes in the heatsink must match the spacing of the holes in the IC tab.
Use screws with heads equivalent to truss head machine screws and binding head machine screws stipulated by JIS for the
mounting screws. Furthermore, washers must be used to protect the surface of the IC tab.
Make sure that there is no foreign matter, such as cutting debris, between the IC tab and the heatsink. If a heat conducting
compound is applied between the contact surfaces, make sure that it is spread uniformly over the entire surface.
Because the heatsink mounting tab and the heatsink are at the same electric potential as the chip’s GND (large signal GND),
care must be taken when mounting the heatsink on more than one device.
The heatsink must be mounted before soldering the pins to the PCB.
Comparison of External Parts Required
Existing device
LA4485
Output coupling capacitors
External parts
Yes
Yes
Input coupling capacitors
Yes
Yes
Bootstrap capacitors
Yes
No
Feedback capacitors
Yes
No
Filter capacitor
Yes
Optional
Phase compensating capacitor
Yes
No
Oscillation-quenching mylar capacitors
Yes
No
Oscillation-quenching resistors
Yes
No
Others
No
Optional
15 to 16 parts
4 to 6 parts
Total (for dual-mode)
Note: Supply capacitors, contained within the power IC, are not counted in both existing and new devices.
No.3680-3/20
LA4485
Operating Pin Voltages at VCC = 13.2 V
Pin No.
Name
Function
Pin voltage (Reference value)
1
CH1 IN
Channel 1 input.
1.4 V (2 VBE)
2
CH2 IN
Channel 2 input.
1.4 V (2 VBE)
3
SS GND
Small-signal ground
0V
4
BTL IN
BTL-mode feedback input.
45 mV
5
BTL OUT
BTL-mode feedback output.
3.1 V (61/4 VCC)
6
FILTER
Filter capacitor connection.
6.6 V (61/2 VCC)
7
LS VCC
Large-signal supply
13.2 V (VCC)
8
SS VCC
Small-signal supply
13.2 V (VCC)
9
STANDBY
Standby control input.
5V
10
MUTE
Mute control input.
0V
11
CH2 OUT
Channel 2 output.
6.3 V
12
LS GND
Large-signal ground
0V
13
CH1 OUT
Channel 1 output.
6.3 V
Note: Each pin is so arranged lest the IC should be broken even if inserted reversely.
LA4485 Sample Application Circuit
No.3680-4/20
LA4485
VN – VCC
ICCO – VCC
Output pin voltage, VN – V
Rg = 0 standby + 5 V
Overvoltage cutoff
VCC = 7.5 V
Cutoff for waveform carrying signal
Muting on
Supply voltage, VCC – V
lst – VCC
ICCO
Muting on
Supply voltage, VCC – V
PO – VIN
CVCC = 0.15 µF (mylar)
Rg = 0
Standby to GND
Output power, PO – W
Standby current, Ist – µA
RL = 4 Ω
Rg = 0
Quiescent supply current, ICCO – mA
RL = 4 Ω (dual)
Input voltage, VIN – mV
THD – f
Total harmonic distortion, THD – %
Total harmonic distortion, THD – %
Supply voltage, VCC – V
THD – PO
VCC = 13.2 V
RL = 4 Ω
f = 1 kHz
Rg = 600 Ω
Frequency, f – Hz
THD – VCC
Response – dB
Total harmonic distortion, THD – %
Output power, PO – W
f Response
Frequency, f – Hz
Supply voltage, VCC – V
No.3680-5/20
LA4485
PO – VCC
ICC – PO
Current drain, ICC (2CH) – A
Output power, PO – W
Supply voltage, VCC – V
Output power, PO (1CH) – W
Pd – PO
Dual
RL = 2 Ω
Dual
RL = 3 Ω
Power dissipation, Pd (2CH) – W
Power dissipation, Pd (2CH) – W
Pd – PO
Output power, PO (1CH) – W
Pd – PO
Dual
RL = 8 Ω
Output power, PO (1CH) – W
Allowable power dissipation, Pd max (2CH)
–W
Power dissipation, Pd (2CH) – W
Dual
RL = 4 Ω
Output power, PO (1CH) – W
Pd – PO
Dual
RL = 6 Ω
Power dissipation, Pd (2CH) – W
Output power, PO (1CH) – W
Pd – PO
Power dissipation, Pd (2CH) – W
Dual
Rg = 600 Ω
f = 1 kHz
Output power, PO (1CH) – W
Pd max – VCC
Dual
Ta = 25°C
Supply voltage, VCC – V
No.3680-6/20
LA4485
Leakage from CH1 to CH2
SVRR – VR
Ripple rejection ratio, SVRR – dB
Leakage from CH2 to CH1
Supply ripple voltage, VR – mV
SVRR – VCC
SVRR – fR
Ripple rejection ratio, SVRR – dB
Frequency, f – Hz
Ripple rejection ratio, SVRR – dB
Channel separation, CH sep – dB
CH sep – f
Ripple frequency, fR – Hz
ICCO – Ta
VN – Ta
Output pin voltage, VN – V
Quiescent current, ICCO – mA
Supply voltage, VCC – V
Temperature characteristic due to output capacitor
CO = 1000 µF
Ambient temperature, Ta – °C
Ambient temperature, Ta – °C
VNO – Rg
Output noise voltage, VNO – mV
Output power, PO – W
Ambient temperature, Ta – °C
PO – Ta
VCC = 13.2 V
RL = 4 Ω
BPF = 20 Hz to 20 kHz
Rg = 0 → 0.12 mV
Source resistance, Rg – Ω
No.3680-7/20
LA4485
Output
DC trace
Speaker
terminal
VCC = 13.2 V, standby supply +5 V,
RL = 4 Ω, Rg = 0
Main switch ON/OFF test
Output
DC trace
Speaker
terminal
VCC = 13.2 V, standby supply +5 V,
RL = 4 Ω, Rg = 0
Standby switch ON/OFF text
VCC = 13.2 V,
RL = 4 Ω,
Rg = 0,
Mute ON/OFF
→ Switching noise decreases as CIN = 0.22 µF (Input) is increased. (ex. 2.2 µF)
VCC = 13.2 V,
RL = 4 Ω,
Rg = 600 Ω,
THD = 10%,
f = 1 kHz,
Output DC waveform
No.3680-8/20
LA4485
Dual-mode Operation Notes
. Use the input capacitor C
IN
in the range of 0.22 µF to 1.0 µF.
Parameter
CIN = 0.22 µF
CIN = 1.0 µF
0.15 s
0.25 s
Somewhat noticeable
Good
Start-up time (ts)
Attack noise when using the muting function
Speaker turn-ON transient noise increased significantly when CIN is 2.2 µF or greater.
. The DC (filter) capacitor should be 100 µF or greater.
Parameter
100 µF or less
100 µF or more
Standby-off output capacitor
discharge circuit
*1. Does not operate.
Repeated on/off: poor
*2. Operates normally.
On/off: good
Ripple rejection ratio (SVRR)
Somewhat worse
40 dB
Good
50 dB
Fast
Slow
VN rise rate when main or
standby is turned ‘‘on’’
Note:
*1. Slow as a result of natural discharge.
*2. Approximately 0.3 seconds as a result of forced discharge.
. Use the standby supply capacitor in the range of 0.22 µF to 0.47 µF.
The VN trace for standby OFF changes and speaker turn-ON transient noise is increased significantly when the capacitor is 1 µF
or greater. If the standby function is not used, this capacitor must be removed and pin 9 must be pulled up to the power supply.
. The output capacitor’s recommended value for C
O is 1,000 µF.
Smaller capacitance will worsen the roll-off frequency fL and PO in a low range.
. The recommended power supply capacitor is approximately 2,200 µF, but other capacitors than 2,200 µF can be used according
to the application’s design.
Using a capacitor with this value, the load on the supply can be as high as 56 Ω while still providing good supply stability
during momentary supply glitches. Note that using a 0.15 µF capacitor can cause oscillations if the supply impedance increases.
(Example: Mild oscillation results if the power supply capacitor is open.)
. STANDBY pin 9 IC internal circuit
. MUTE pin 10 IC internal circuit
No.3680-9/20
LA4485
. Input pin 1/2 IC internal circuit
. Output pin 11/13 IC internal circuit
LS VCC
SS VCC
Bias
Standby
line
Driver
Power
transistor
Driver
Power
transistor
Upward/Downward PNP Driver Format
LS GND
. The minimum configuration for dual-mode operation
No standby function
SVRR 6 40 dB
CO = 1000 µF
CIN = 2.2 µF
(Four-point method)
No.3680-10/20
LA4485
. Insert capacitors of 1000 pF between each input and ground to prevent external noise.
. When the load (R ) or the supply voltage (V ) is increased, turning the standby switch or the main switch on under strong
L
CC
input conditions will activate the IC’s internal pseudo ASO protection circuit for the upper power transistor (VCE × ICP). This
causes output oscillations or intermittent operation (The reference area is shown in Figure 1 below). However, strong input tests
after the bias has stabilized have no problems. They also protect the upper power transistors close to the limits of ASO when all
signal switches are on. Therefore, when using this IC under these conditions, the circuit design should obey the following
condition:
Signal generation time > Start-up time of the power amplifier IC
or some other method of attaining the zero-volume condition should be adopted.
. An undervoltage protection circuit operates when the voltage is 7.5 V or lower.
Input voltage, VIN – mV rms
This figure shows the pseudo ASO protection area when strong signal is input, and switch is ON:
the upper power transistors have an area where VCE × ICP load is caused.
PHOTO-2
VCC = 15 V
RL = 3 Ω
PHOTO-1
VCC = 13.2 V
RL = 2 Ω
RL = 4 Ω
Design center
Dual-mode operation
f = 1 kHz
Dual channel drive
Non-inductive load
Ta = 25°C
Standby switch ON in a
typical application
Supply voltage, VCC – V
Strong signal input after switch-ON is OK.
In BTL-mode operation, the load is RL × 2
Figure 1
No.3680-11/20
LA4485
The operating condiations for the PHOTO-1 series in dual mode are VCC = 13.2 V, RL = 2 Ω, f = 1 kHz, VIN = 50 mV and
standby switch ON.
i)
‘‘X-Y path observed within the normal area’’: checking each channel
Stabilization
VCE – V
Transition
icp – A
icp – A
Output waveforms
Current and voltage waveforms
Power transistor
↓ CE voltage – V
Power transistor
CE voltage – V
VCE – V
* Plot each point on the power
transistor ASO curve. Refer to
Figure 2.
icp – A
ICP (Y)















VCE (X)
Transition
Stabilization
IE – VCB
Emitter current, IE – A
‘‘VCC – VCE’’ added,
heavy load
Upper power transistor
The load line becomes more closely aligned with the
vertical axis because of the load.
Shifting load line at
start-up under
large-signal conditions
Collector-base voltage, VCB – V
Figure 2
No.3680-12/20
LA4485
ii)
The operating conditions for the PHOTO-2 in dual mode are VCC = 15 V, RL = 3 Ω, f = 1 kHz, VIN = 100 mV and standby
switch ON.
‘‘X-Y path observed within the normal area’’
Output waveforms
Stabilization
icp – A
icp – A
Transition
Current and voltage waveforms
↓
Power transistor
CE voltage – V
Power transistor
CE voltage – V

















icp – A
VCE – V
* Plot each point on the power
transistor ASO curve. Refer to
Figure 3.
Transition
Stabilization
Emitter current, IE – A
IE – VCB
Shifting load line at
start-up under
large-signal conditions
Collector-base voltage, VCB – V
Figure 3
No.3680-13/20
LA4485
LA4485, BTL Sample Application Circuit
Noninverting
Inverting
THD – PO
Output power, PO – W
Total harmonic distortion, THD – %
PO – VIN
Input voltage, VIN – mV
Output power, PO – W
No.3680-14/20
LA4485
f Response
Response – dB
Output power, PO – W
PO – VCC
Frequency, f – Hz
ICC – PO
Current drain, ICC – A
Total harmonic distortion, THD – %
Supply voltage, VCC – V
THD – f
Frequency, f – Hz
Pd – PO
Power dissipation, Pd – W
Power dissipation, Pd – W
Allowable power dissipation, Pd max – W
Output power, PO – W
Pd – PO
Output power, PO – W
Pd max – VCC
Output power, PO – W
Supply voltage, VCC – V
No.3680-15/20
LA4485
BTL
Speaker
terminal
VCC = 13.2 V, standby +5 V,
RL = 4 Ω, Rg = 0
Main switch ON/OFF test
BTL
Speaker
terminal
VCC = 13.2 V, standby +5 V,
RL = 4 Ω, Rg = 0
Standby switch ON/OFF test
Noninverting
BTL
Inverting
VCC = 13.2 V
RL = 4 Ω
Rg = 0
Mute ON/OFF
Measurement
Noninverting
Inverting
BTL
→ Note: Switching noise decreases as
CIN = 0.22 µF (input) is increased. (ex. 2.2 µF)
VCC = 13.2 V,
RL = 4 Ω,
Rg = 600 Ω,
THD = 10%,
f = 1 kHz
Output DC waveform
No.3680-16/20
LA4485
BTL-mode Operation Notes
In BTL mode, channel 1 should be non-inverted and channel 2 should be inverted.
Use the input capacitor CIN in the range 0.22 µF to 2.2 µF.
Use the standby supply capacitor in the range 0.22 µF to 1.0 µF.
When the capacitor is 2.2 µF or more, the VN trace for standby-off changes, and the switching noise increases significantly.
The recommended DC (filter) capacitor is 100 µF or greater.
The BTL-mode coupling capacitor should be 2.2 µF.
When this capacitor is decreased, the output power is decreased. However, when this capacitor is increased, speaker
turn-ON transient noise is increased significantly.
In BTL mode, the ripple rejection ratio (SVRR) is approximately 40 dB.
This is because the output ripple portion of the noninverted side penetrates the BTL coupling end, so that ripple on the
inverted side is large. The following method is described as one external measure:
.
.
.
.
.
LS VCC
SS VCC
This measure yields an SVRR of approximately 50 dB. Note that the Rx loss voltage is approximately 1 V, and the PO loss is
about 1.0 to 1.5 W (to the 15 W level).
. Example of minimum parts for BTL operation
Noninverting
No standby function
SVRR 6 40 dB
CIN = 2.2 µF
CBTL = 2.2 µF
(Three point method)
Inverting
Dual-mode short-circuit
test circuit
1 Load short-circuit (to ground)
2 Output-to-supply short-circuit
3Output-to-ground short-ciruit
No.3680-17/20
LA4485
. Taking BTL coupling into consideration, the output-to-supply/output-to-ground protector is two-sided in order to protect both the
IC and the speaker.
Short-circuit to GND protection
Self-holding
positive feedback
circuit
Current × voltage
detector
Reset circuit
CH1/CH2
Upper/lower
power transistor
control
When using this method (simultaneously shorting the outputs to supply and to ground)
In BTL mode, the IC protection function works even in noninverted output → output-to-supply mode, inverted output →
output-to-ground mode. (The reverse is also OK.)
Reference Value
(a) Short-circuit test for dual-mode operation after the main and standby switches are turned ON.
Conditions: 1 VCC = 10 to 16 V, RL = 4 Ω and PO = 1 to 5 W (variable) for load short-circuit
2 VCC = 10 to 16 V, RL = 4 Ω, Rg = 0 (no signal) for output-to-supply short-circuit
3 VCC = 10 to 16 V, RL = 4 Ω, Rg = 0 (no signal) for output-to-ground short-circuit.
Z: impedance
j: no device breakdown
1 Load short-circuit
2 Output-to-supply short-circuit
One-time test
3 Output-to-ground short-circuit
Repeated switching test
One-time test
Repeated switching test
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
j
j
j
j
j
j
j
j
j
(b) Short-circuit test for dual-mode operation (opposite flow of (a)) after the main and standby switches are turned ON.
Conditions: same as (a)
j: No device breakdown
1 Load short-circuit
2 Output-to-supply short-circuit
One-time test
j
3 Output-to-ground short-circuit
Repeated switching test
One-time test
Repeated switching test
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
j
j
j
j
j
j
j
j
(Note) Shorting the outputs to ground when muting is active can result in device breakdown.
. BTL-mode short-circuit test circuit
Noninverting
Inverting
1 Load short-circuit
2 Output-to-supply short-circuit
3 Output-to-ground short-circuit
No.3680-18/20
LA4485
Reference Value
(a) Short-circuit test for BTL-mode operation after the main and standby switches are turned ON.
Conditions: 1 VCC = 10 to 16 V, RL = 4 Ω and PO = 1 to 15 W (variable) for load short-circuit
2 VCC = 10 to 16 V, RL = 4 Ω, Rg = 0 (no signal) for output-to-supply short-circuit
3 VCC = 10 to 16 V, RL = 4 Ω, Rg = 0 (no signal) for output-to-ground short-circuit.
Z: impedance
j: no device breakdown
1 Load short-circuit
2 Output-to-supply short-circuit
One-time test
3 Output-to-ground short-circuit
Repeated switching test
One-time test
Repeated switching test
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
j
j
j
j
j
j
j
j
j
(b) Short-circuit test for BTL-mode operation (opposite flow of (a)) after the main and standby switches are turned ON.
Conditions: same as (a)
j: No device breakdown
1 Load short-circuit
2 Output-to-supply short-circuit
One-time test
j
3 Output-to-ground short-circuit
Repeated switching test
One-time test
Repeated switching test
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
Z=0
Z = 0.5 Ω
j
j
j
j
j
j
j
j
(Note) Shorting the outputs to ground when muting is active can result in device breakdown.
. Power supply positive surge
JASO test
The power supply line positive surge breakdown margin has been increased by using the built-in overvoltage protection circuits
(VCCX = 28 V) to cut off all bias circuits/change the base-emitter reverse of the output stage. In other words, the breakdown
margin is being raised by changing output stage groups that operate as the VCEO (VCER) type to the VCES (VCBO) type.
No.3680-19/20
LA4485
. Test of application of +V
CC to output pins
If the power supply pin is floating under the power supply capacitor insertion conditions, and +VCC comes into contact with
output lines (a) and (b) as shown in the diagram above, the IC’s internal upper power transistor will generally be damaged. The
LA4485 has a protective bypass circuit on chip. However, it is dangerous if the power supply capacitor is greater than 2200 µF.
Floating
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment,
nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or
indirectly cause injury, death or property loss.
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
1 Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors
and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and
expenses associated with such use:
2 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO
ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume
production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use
or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of July, 1996. Specifications and information herein are subject to change without notice.
No.3680-20/20