Ordering number : EN5719 Monolithic Linear IC LA5623M Combination System Reset IC Overview Package Dimensions The LA5623M is a combination reset IC that provides two reset functions. The first, reset 1, detects the input voltage and applies a reset to the CPU system and other logic systems. The second, reset 2, detects the power supply voltage when the power is turned on or off, and applies a reset to the CPU system and other logic systems. This latter function allows the reset time to be adjusted from two external pins. unit: mm 3032B-MFP8 [LA5623M] Features • Reset circuit (output 1) that detects the input voltage and provides a delay time of 200 µs. • System reset circuit (output 2) that provides a switchable delay time of 25, 50, 100, or 200 ms. • Low operating limit voltage • Both reset 1 and reset 2 have hysteresis characteristics. SANYO: MFP8 Specifications Maximum Ratings at Ta = 25°C Parameter Supply voltage Symbol Conditions VCC Output 1 sink current ISINK1 Output 2 sink current ISINK2 Output voltage Ratings Unit –0.3 to +12 V 8 mA 8 mA VO –0.3 to +10 Manual input voltage VRES –0.3 to +10 V Input voltage range VIN1 –0.3 to +10 V Vct 0 to +10 Ct0, Ct1 voltage Allowable power dissipation Pd max 250 V V mW Operating temperature Topr –20 to +75 °C Storage temperature Tstg –40 to +125 °C Operating Conditions at Ta = 25°C Parameter Symbol Recommended supply voltage VCC Input voltage range VIN Input high-level voltage Input low-level voltage Conditions Ratings Unit 2 to 10 V For pulse widths of up to 20 ns –2 to VCC + 1 V VRESH For pulse widths of up to 20 ns VCC + 1 V VRESL For pulse widths of up to 20 ns –2 V SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 63097HA(OT) No. 5719-1/4 LA5623M Operating Characteristics at Ta = 25°C, VCC = 5 V Parameter Symbol Ratings Conditions min typ Unit max [Reset Circuit 1, 2 Common] Current drain when off ICC1 Current drain when on ICC2 Detection voltage temperature coefficient When reset 1 and 2 are both on VS/∆T – 1.4 2.0 – 2 3 – 0.01 mA mA %/°C Output high-level voltage VOH IOH = –40 µA 0.9 VCC – – V Low-level signal propagation delay tPHL CL = 100 pF – 10 – µs Operating limit voltage *1 VOPL RL = 2.2 kΩ, V(sat) ≤ 0.4 V – 0.67 0.80 V RL = 100 kΩ, V(sat) ≤ 0.4 V – 0.55 0.70 Internal pull-up resistance R 5 10 15 1.20 1.25 1.30 9 15 23 mV 80 200 500 µs – 0.2 0.4 V –0.3 – +10 V – 100 500 nA VS2 4.0 4.2 4.4 V ∆VS2 30 50 100 mV Ct0 = “L”, Ct1 = “H” : CL = 100pF 15 25 35 ms Ct0 = “H”, Ct1 = “L” : CL = 100pF 30 50 70 ms Ct0 = “H”, Ct1 = “H” : CL = 100pF 60 100 140 ms Ct0 = “L”, Ct1 = “L” : CL = 100pF 120 200 280 ms – 0.2 0.4 V 2 – 10 V – – 80 µA –0.3 – +0.8 V V kΩ [Reset Circuit 1] Sense voltage 1 VS1 Hysteresis voltage 1 ∆VS1 High-level signal propagation delay 1 tPLH1 CL = 100 pF Output low voltage 1 VOL1 VIN < 1.2 V, IOL = 5 mA Input voltage range VIN1 Input current IIN1 VIN = 1.25 V V [Reset Circuit 2] Sense voltage 2 Hysteresis voltage 2 High-level signal propagation delay 2 tPLH2 Output low-level voltage 2 VOL2 Input high-level voltage *2 VRESH2 Input high-level current *2 IRESH2 Input low-level voltage *2 VRESL2 VCC < 4.0 V, IOL = 5 mA VRES = 2 V Notes: 1. The minimum supply voltage such that a low-level output can be maintained. 2. Manual reset. A high level applied to the manual reset pin sets the output 2 pin low, and a low level sets the output 2 pin high. Pin Assignment INPUT *1: Ct0 *2: Ct1 The delay time is 100 ms when the above two pins are both left open. No. 5719-2/4 LA5623M Block Diagram Divider circuit Reset circuit Drive block Multiplexer Operating Waveforms Input voltage 1.25 V Power-supply voltage 4.2 V Output 1 Output 2 RESET1 Operating Waveforms RESET2 Operating Waveforms No. 5719-3/4 LA5623M RESET2 Truth Table MANUAL RESET Truth Table Ct0 Ct1 RESET2 delay time MANUAL RESET L H 25 ms H OUT2 L H L 50 ms L H H or OPEN H or OPEN 100 ms L L 200 ms Pd max – Ta Allowable power dissipation, Pd max – W 0.4 0.3 0.25 0.2 0.1 0 –20 0 20 40 60 75 80 100 Ambient temperature, Ta – °C ■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. ■ Anyone purchasing any products described or contained herein for an above-mentioned use shall: ➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. ■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of June, 1997. Specifications and information herein are subject to change without notice. No. 5719-4/4