Ordering number: EN1634G CMOS LSI LC7150 FCC 10-Channel Standard PLL For Cordless Telephone Functions Package Dimensions . On-chip PLL for transmission/reception . On-chip digital unlock detector (only PLL for transmission) . 5.0 kHz/4.4 kHz output pins for guard tone . Standby function . Pull-down resistance at channel select pins (D1 to D4) unit : mm 3007A-DIP18 [LC7150] LC7150: With (for mechanical switch) LC7151: Without (for microcontroller) SANYO : DIP18 Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Symbol Maximum supply voltage Conditions Ratings VDD max Maximum input voltage VI max Maximum output voltage Output current F1,F2 Output OFF VO2 max Output pins other than VO1 F1,F2, LDT IOUT Allowable power dissipation All input pins VO1 max Pd max Unit –0.3 to +6.5 V –0.3 to VDD +0.3 V –0.3 to +6.5 V –0.3 to VDD +0.3 V Ta % 75°C 0 to 3.0 mA 350 mW Operating temperature Topr –30 to +75 °C Storage temperature Tstg –40 to +125 °C Allowable Operating Conditions at Ta = 25°C, VSS = 0 V Parameter Supply voltage Input high-level voltage Input low-level voltage Input high-level voltage Input low-level voltage Input frequency Input amplitude Symbol VDD VIH1 VIL1 VIH2 VIL2 fIN1 fIN2 fIN3 VIN1 VIN2 VIN3 Conditions D1 to D4, SB D1 to D4, SB R/B R/B PIT; VIN = 0.15 Vrms PIR; VIN = 0.15 Vrms XIN; VIN = 0.3 Vrms PIT; fIN = 27 MHz PIR; fIN = 42 MHz XIN; fIN = 11 MHz min 3.0 0.7 VDD 0 0.9 VDD 0 10 30 5.0 0.15 0.15 0.3 typ 10.24 max 5.5 VDD 0.3VDD VDD 0.1VDD 27 42 11.0 0.3VDD 0.3VDD 0.3VDD Unit V V V V V MHz MHz MHz Vrms Vrms Vrms SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN O3096HA(II)/11393JN/6297TA/7245KI/7104KI,TS No.1634-1/5 LC7150 Electrical Characteristics at Ta = 25°C, under Allowable Operating Conditions Input Input Input Input Input Input Input Input Parameter high-level current low-level current high-level current low-level current high-level current low-level current pull-down resistance floating voltage Feedback resistance Output Output Output Output Output Output Output high-level voltage low-level voltage OFF leak current high-level voltage OFF leak current low-level voltage OFF leak current Supply current Symbol IIH1 IIL1 IIH2 IIL2 IIH3 IIL3 Rd VIF Rf1 Rf2 VOH1 VOL1 Ioff1 VOH2 Ioff2 VOL2 Ioff3 IDD1 IDD2 IDD3 IDD4 IDD5 IDD6 Conditions XIN; VI = VDD XIN; VI = VSS PIT, PIR; VI = VDD PIT, PIR; VI = VSS SB,R/B; VI = VDD SB, R/B; VI = VSS D1 to D4 D1 to D4; Open XIN; VDD = 4.3 V PIT, PIR; VDD = 4.3 V PDT, PDR; IO = 0.5mA PDT, PDR; VO = 0.5 mA PDT,PDR; VO = VDD/VSS LDT; IO = 1 mA LDT; Output OFF VO = VSS F1,F2; IO = 1 mA F1,F2; Output OFF VO = 5.5 V (C3) VDD = 3.0 V (C3) VDD = 4.5 V (C3) VDD = 5.5 V (C2) VDD = 3.0 V (C2) VDD = 4.5 V (C2) VDD = 5.5 V min typ 10 20 max 20 20 40 40 10 10 40 0.1VDD 1.0 0.5 VDD–1.0 0.01 1.0 1.0 VDD–1.0 5.0 1.0 5.0 4 7 13 3 5 10 Unit µA µA µA µA µA µA kΩ V MΩ MΩ V V nA V µA V µA mA mA mA mA mA mA (C3): XIN = 10.24 MHz, xtal connected PIT = 27 MHz 150 mVrms PIR = 42 MHz 150 mVrms R/B= VDD, SB = VDD, Other pin open (C2): XIN = 10.24 MHz, xtal connected PIR = 42 MHz, 150 mVrms R/B= VDD, SB = VSS, Other pin open (Note) Power supply VDD – VSS: Insert a capacitor of 2000 pF or greater. Pin Assignment Top view No.1634-2/5 LC7150 Equivalent Circuit Block Diagram Sample Application Circuit Each value (Hz) is for 1 channel. Crystal resonator: HC43/U 2114-85501: CL = 10 pF C1 = 15 (10 to 22) pF C2 = 15 pF 2114-85502: CL = 16 pF C1 = 22 (15 to 33) pF C2 = 33 pF KINSEKI, LTD. When 5.0 kHz/4.4 kHz pins are not used, connect these pins to VSS. VDD: TX, RX and PLL are operated. VSS: Only RX and PLL are operated. No.1634-3/5 LC7150 Pin Description Pin Description F1 5.0 kHz output. When not used, connect to VSS. F2 4.4 kHz output (10.24 MHz ÷ 2304). When not used, connect to VSS. VDD, VSS Power supply. XIN, XOUT Crystal resonator (10.24 MHz). D1 to D4 Channel select pin. R/B Base unit/remote unit select pin. R/B = ‘‘0’’ (VSS) ...... Remote unit R/B = ‘‘1’’ (VDD) ...... Base unit SB Used to stop the TX PLL at the standby mode to minimize current dissipation. SB = ‘‘0’’ (VSS) ...... Standby mode. Only the RX and PLL are operated. The charge pump enters a high-impedance mode. SB = ‘‘1’’ (VDD) ...... The TX, RX and PLL are operated. PIT TX programmable divider input pin. PIR RX programmable divider input pin. PDT TX charge pump output pin. PDR RX charge pump output pin. TEST LSI test input pin. Connected to VSS. LDT TX PLL unlock signal output pin. When the phase difference becomes tD (= 6.25 µs.) or more, 5.6 ms. output pulse is delivered at the LDT pin. Reference divider Programmable divider LDT Reference divider Programmable divider LDT No.1634-4/5 LC7150 Table of Frequency Division INPUT D1 D2 D3 D4 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 C H 1 2 3 4 5 6 7 8 9 10 10 10 10 10 10 10 REMOTE (R/B = ‘‘0’’) TX (fref = 2.5 kHz) RX (fref = 5 kHz) fTX fVCO N fVCO N (MHz) (MHz) (MHz) 49.670 24.8350 9934 35.915 7183 49.845 24.9225 9969 35.935 7187 49.860 24.9300 9972 35.975 7195 49.770 24.8850 9954 36.015 7203 49.875 24.9375 9975 36.035 7207 49.830 24.9150 9966 36.075 7215 49.890 24.9450 9978 36.135 7227 49.930 24.9650 9986 36.175 7235 49.990 24.9950 9998 36.235 7247 49.970 24.9850 9994 36.275 7255 49.970 23.9850 9994 36.275 7255 49.970 23.9850 9994 36.275 7255 49.970 23.9850 9994 36.275 7255 49.970 23.9850 9994 36.275 7255 49.970 23.9850 9994 36.275 7255 49.970 23.9850 9994 36.275 7255 BASE (R/B=‘‘1’’) TX (fref = 2.5 kHz) fTX fVCO N (MHz) (MHz) 46.610 23.305 9322 46.630 23.315 9326 46.670 23.335 9334 46.710 23.355 9342 46.730 23.365 9346 46.770 23.385 9354 46.830 23.415 9366 46.870 23.435 9374 46.930 23.465 9386 46.970 23.485 9394 46.970 23.485 9394 46.970 23.485 9394 46.970 23.485 9394 46.970 23.485 9394 46.970 23.485 9394 46.970 23.485 9394 RX (fref = 5 kHz) fVCO N (MHz) 38.975 7795 39.150 7830 39.165 7833 39.075 7815 39.180 7836 39.135 7827 39.195 7839 39.235 7847 39.295 7859 39.275 7855 39.275 7855 39.275 7855 39.275 7855 39.275 7855 39.275 7855 39.275 7855 No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. Anyone purchasing any products described or contained herein for an above-mentioned use shall: 1 Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: 2 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of October, 1996. Specifications and information herein are subject to change without notice. No.1634-5/5