SANYO LC89086M

Ordering number : EN *5428A
CMOS LSI
LC89086M
8 Bit A/D Converter
Preliminary
Overview
Package Dimensions
The LC89086M is a low-power high-speed 8-bit serialparallel A/D converter fabricated in a high-speed CMOS
process.
unit: mm
3155-MFP24
[LC89086M]
Features
•
•
•
•
•
•
•
Resolution: 8 bits (with an overflow output)
Maximum conversion rate: 20M samples per second
Error: Less than ±1.0 LSB
Power supply: +5-V single-voltage power supply
Power dissipation: 150 mW (typical)
Analog input voltage range: VSS to VDD
Digital output voltage: 3 state TTL level
SANYO: MFP24
Specifications
Absolute Maximum Ratings at Ta = 25°C, DVSS = AVSS = 0 V
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
VDD max
–0.3 to +7.0
V
Input voltage
VIN max
–0.3 to VDD +0.3
V
Operating temperature
Topr
–30 to +70
°C
Storage temperature
Tstg
–40 to +125
°C
Recommended Operating Conditions
Parameter
Supply voltage
Operating ambient temperature
Symbol
Conditions
Ratings
min
VDD
4.5
Ta
–30
typ
5.0
max
Unit
5.5
V
+70
°C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
O3097HA (OT) No. 5428-1/6
LC89086M
Electrical Characteristics
Electrical DC Characteristics at Ta = –30 to +70°C, AVDD = DVDD = 4.5 to 5.5 V, AVSS = DVSS = 0 V
Parameter
Symbol
Reference resistance
Rref
Analog input capacitance
CAIN
Analog input resistance
RAIN
Ratings
Conditions
min
VrefH (pin 5) – VrefL (pin 8)
When VrefHO (pin 4) and VrefLO (pin 9)
are unused.
typ
210
Reference high-level input voltage
VrefH
Reference low-level input voltage
VrefL
When VrefHO (pin 4) and VrefLO (pin 9) are unused.
Reference high-level output voltage
VrefH
When VrefHO (pin 4) and VrefLO (pin 9)
are used, and AVDD = DVDD = 5 V
1.9
Reference low-level output voltage
VrefL
When VrefHO (pin 4) and VrefLO (pin 9)
are used, and AVDD = DVDD = 5 V
–0.05
Unit
max
300
390
Ω
30
pF
10
MΩ
Vref L + 2.0
VDD
V
VrefH – 2.0
V
2.0
2.1
V
0
+0.05
V
V
0
Analog input voltage
VAIN
VrefL
VrefH
Digital high-level voltage
VIH
2.2
VDD +0.3
V
Digital low-level voltage
VIL
–0.3
+0.8
V
Digital high-level output current
IOH
VOH = VDD – 0.4 V
Digital low-level output current
IOL
VOL = 0.4 V
–2
mA
2
mA
Electrical AC Characteristics 1 at Ta = –30 to +70°C, AVDD = DVDD = 4.5 to 5.5 V, AVSS = DVSS = 0 V
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
Clock high-level period
TWH
23
Clock low-level period
TWL
23
Analog input acquisition time
TAP
10
20
30
Digital output data delay time
Td
C load = 30 pF
15
30
45
ns
Digital output data enable time
TOE
C load = 30 pF
2
5
10
ns
Digital output data disable time
TOD
C load = 30 pF
2
5
10
ns
ns
ns
ns
No. 5428-2/6
LC89086M
Timing Chart
1.5 V
Clock input
(CLK)
TWH
TAP
TWL
N+3
Analog input
(AIN)
N+2
N
N+1
Td
Digital output
(D8 to D1,OF)
N–4
N–3
N –2
Output enable input
(OEB)
N
1.5 V
1.5V
TOE
Digital output
(D8 to D1,OF)
N–1
TOD
High impedance
A09018
The analog signal (AIN) is acquired on the falling edge of the clock input (CLK). The acquired analog signal is
converted to a digital code and is output from the digital outputs (D8 to D1, OF) on the clock falling edge delayed three
clock cycles from the clock cycle in which the analog signal was acquired.
Electrical AC Characteristics 2
at Ta = 25°C, AVDD = DVDD = 5 V, AVSS = DVSS = 0 V, VrefH = 2 V, VrefL = 0 V
Parameter
Resolution
Maximum conversion rate
Linearity error
Differential linearity error
Offset voltage
Power dissipation
Symbol
Conditions
Ratings
min
typ
Unit
max
Res
8
bit
Fs
20
MSPS
LE
DC accuracy
±1.0
LSB
DLE
DC accuracy
±1.0
LSB
Voffset
DC accuracy
Pd
Fs = 20 MSPS
10
50
90
mV
150
220
mW
Note: Test circuits must conform to the sample application circuit.
No. 5428-3/6
LC89086M
Block Diagram
OEB
5
VrefM
7
VrefL
Resistor string
8
Reference voltage
generation
4
9
VrefHO
VrefLO
Output register
VrefH
Upper comparator
Lower encoder
6
Lower comparator
AIN
Upper encoder
Lower Vref selection
Data correction
1
Clock generation
22
OF
21
D1(MSB)
14
D8(LSB)
23
CLK
A09019
Pin Assignment
Top view
No. 5428-4/6
LC89086M
Pin Functions
Pin No.
Pin name
1
OEB
I/O
Function
Digital output enable input
High: high-impedance
Low: Normal operation
I
2
DVSS
Digital ground
3
AVSS
Analog ground
4
Vref HO
O
Internal reference voltage (high) generation. Shorting this pin to VrefH (pin 5) generates a voltage of 2.0 V.
This pin must be left open when the internally generated potential is not used.
5
Vref H
I
Reference voltage input (high)
6
AIN
I
Analog input
7
Vref M
O
Reference voltage intermediate level tap.
8
Vref L
I
Reference voltage input (low)
9
Vref LO
O
Internal reference voltage (low) generation. Shorting this pin to VrefL (pin 8) generates a voltage of 0 V.
This pin must be left open when the internally generated potential is not used.
10
AVDD
Analog power supply
11
AVSS
Analog ground
12
DVSS
Digital ground
13
DVDD
14
D8
O
Digital output (LSB)
15
D7
O
Digital output
16
D6
O
Digital output
17
D5
O
Digital output
18
D4
O
Digital output
19
D3
O
Digital output
20
D2
O
Digital output
21
D1
O
Digital output (MSB)
22
OF
O
Digital output (Overflow)
23
CLK
I
24
DVDD
Digital power supply
Clock input
Digital power supply
Note: There must be no potential difference between the digital system and analog system VDD and VSS power supply potentials.
I/O Code Table
The table below lists the relationship between the input and output when VrefH and VrefL are set up so that the zero
transient voltage is 0.000 V and the full-scale transient voltage is 2.008V.
Analog input
VAIN (V)
Digital output
OF
D1
D2
D3
D4
D5
D6
D7
D8
Up to 0.000
0
0
0
0
0
0
0
0
0
Up to 0.008
0
0
0
0
0
0
0
0
0
Up to 0.016
0
0
0
0
0
0
0
0
1
Up to 0.024
0
0
0
0
0
0
0
1
0
Up to 0.032
0
0
0
0
0
0
0
1
1
Up to 0.992
0
0
1
1
1
1
1
1
0
Up to 1.000
0
0
1
1
1
1
1
1
1
Up to 1.008
0
1
0
0
0
0
0
0
0
Up to 1.016
0
1
0
0
0
0
0
0
1
Up to 1.992
0
1
1
1
1
1
1
0
1
Up to 2.000
0
1
1
1
1
1
1
1
0
Up to 2.008
0
1
1
1
1
1
1
1
1
Over 2.008
1
1
1
1
1
1
1
1
1
to
to
No. 5428-5/6
LC89086M
Sample Application Circuit
: Digital VDD(5V)
100 µ
Output enable in
0.01 µ
100 µ
1 OEB
DVDD 24
2 DVSS
CLK 23
0.01 µ
: Analog VDD(5V)
: Digital Ground
Clock in
: Analog Ground
*1
3 AVSS
4 VrefHO
0.01 µ
5 VrefH
Analog in
*2
10 µ
6 AIN
CLAMP
7 VrefM
8 VrefL
100 µ
9 VrefLO
0.01 µ
*1
LC 89086M
100 µ
OF 22
Overflow flag out
D1
(MSB) 21
D2 20
D3 19
D4 18
Digital out
D5 17
D6 16
10 AVDD
D7 15
11 AVSS
D8
(LSB) 14
12 DVSS
DVDD 13
Unit (capacitance: F)
1µ
Note 1. The value of the reference resistor is about 300 Ω. When this circuit is used with (VrefH – VrefL) = 2 V, a current of 6.7 mA will flow. Use an
operational amplifier or emitter follower with at least this current capacity.
2. The analog input impedance is lower for AC inputs. Therefore, an operational amplifier or emitter follower with a high slew rate and a wide
bandwidth must be used in the previous stage output, and the impedance must be reduced to under 100 Ω.
■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace
equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of
which may directly or indirectly cause injury, death or property loss.
■ Anyone purchasing any products described or contained herein for an above-mentioned use shall:
➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and
distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all
damages, cost and expenses associated with such use:
➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on
SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees
jointly or severally.
■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for
volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied
regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of October, 1997. Specifications and information herein are subject to
change without notice.
No. 5428-6/6