SANYO LV1150M

Ordering number :ENN6287
Bi-CMOS IC
LV1150M
Virtual Surround System IC
Overview
Package Dimensions
The LV1150M is a virtual surround system Bi-CMOS IC
for video soundtracks and audio.
The main feature of this IC is the ability to create an audio
ambience equivalent to that of a multichannel system by
adding a signal to which virtual surround processing has
been applied to the left and right channel input signals. It
furthermore allows modification of this effect by the use
of L+R and L–R passive matrix processing and adjustment
of the surround processing level with a level control.
unit: mm
3045B-MFP24
[LV1150M]
24
7.9
9.0
10.5
13
•
•
•
•
•
1
12
15.3
0.15
2.15
2.5max
Virtual surround function
Passive matrix: L+R, L–R
Adjustable surround effect level
Bypass and virtual surround (L+R, L–R) switching
function
Output filters are provided on chip.
On-chip VDD circuit
ADM technique based A/D and D/A converters
Simulated stereo for monaural input signals
Package: MFP24 (375-mil lead pitch)
0.35
1.27
0.67
0.1
•
•
•
•
0.75
Functions and Features
SANYO: MFP24
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Maximum supply voltage
VCCmax
Allowable power dissipation
Pdmax
Conditions
Ta ≤ 70°C
Ratings
* With printed circuit board
Unit
12
V
500
W
Operating temperature
Topr
–20 to +70
°C
Storage temperature
Tstg
–40 to +125
°C
Note: * Printed circuit board size: 114.3 × 76.1 mm, t = 1.6 mm. Material: Glass epoxy.
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
73099RM (OT) No. 6287-1/9
LV1150M
Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended supply voltage
VCC
Operating supply voltage range
VCCopr
Conditions
Ratings
Unit
7
V
6.5 to 10
V
Electrical Characteristics at Ta = 25°C, VCC = 7.0 V, VIN = –10 dBm, f = 1 kHz, in bypass mode
Parameter
Quiescent current
Symbol
Conditions
ICC
Output noise voltage
VNO
I/O signal level deviation
VO
Total harmonic distortion
THD
Headroom
H•R
Ratings
min
15
Rs = 10 kΩ, JIS A
In virtual surround mode
VIN = –10 dBm = 0 dB
–2
400 Hz to 30 kHz bandpass filter
In virtual surround mode
typ
Unit
max
23
40
mA
–110
–90
dBm
–88
–80
dBm
0
+2
dB
0.005
0.03
%
0.13
1.0
%
VIN = –10 dBm = 0 dB, THD = 1%
10
15
dB
In virtual surround mode
10
12
dB
No. 6287-2/9
VSS
SW1
2
SW2
3
VDD
22
VDD
LPF1
4
21
A/D
LPF2
5
B
A
ADM-CONT
20
NS
LS-OUT
6
L–R
ADM
19
D/A
R-PS-IN
7
L+R
SRAM
18
DC-CUT
VCC
8
17
AGND
L-PS-IN
9
L.P.F.
16
VREF
A
14
L-IN
11
B
A
13
50 kΩ
R-IN
12
VIRTUAL
B
R-OUT
R + DELAY
L-OUT
L + DELAY
RS-OUT
10
15
EF-VOL
2 kΩ
1
23
24
OSC
LC-INB
LC-INE
50 kΩ
A12415
LV1150M
Block Diagram
No. 6287-3/9
LV1150M
50 kΩ
11
+
9
220 µF
+
VCC
+
1.5 kΩ 0.15 µF
10
SW8 A
8
L.P.F.
VREF
AGND
10 kΩ
B
+
+
12
50 kΩ
L + DELAY
A
14
6
0.15 µF 1.5 kΩ
7
L–R
L+R
SRAM
ADM
0.33 µF
19
SW9 A
0.1 µF
18
+
17
+
16
220 µF
B
1 µF
15
+
2 kΩ
10 kΩ
1 µF
B
1 µF
L-OUT
R + DELAY
A
13
+
R-OUT
B
1 µF
VIRTUAL
A12416
Test Circuit
A
B
75 pF
5
20
ADM-CONT
0.15 µF
3300 pF
4
21
130 pF
+
220 µF
OPEN/5 V-L–R
GND-L+R
SW2
B
A
B
A
1
VSS
51 pF
SW1
BYPASS/VIRTUAL
OSC
23
OPEN/5 V-BYPASS
GND-VIRTUAL
2
L+R/L–R
24
47 pF
100 pF
3
22
0.1 µF
VDD
0.15 µF
10 µH
15 pF
No. 6287-4/9
LV1150M
A12417
Sample Application Circuit
+
SAMP1, 2
10
L-IN
+
11 2.5VPP- 12
–50 kΩ
50 kΩ
L + DELAY
A
9
L.P.F.
16
VREF
+
1 µF
R-IN
50 kΩ
VIRTUAL
REF
2 kΩ
15
10 µF
VOL
1 µF
B
14
+
10 µF
L-OUT
R + DELAY
B
A
R-OUT
13
+
REF
220 µF
220 µF
VCC
+
8
17
AGND
7
SAMP1, 2
L–R
6
9.4 kΩ
19
VOL
ADM
REF
0.33/1 µF
L+R
SRAM
18
+
0.1 µF
B
A
75 pF
5
20
ADM-CONT
0.15 µF
3300 pF
OPEN/5 V-L–R
GND-L+R
OPEN/5 V-BYPASS
GND-VIRTUAL
7
1
VSS
0.1 µF-0.22 µF
0-3 kΩ
6 10
20 kΩ
5.6-10 µH
REF
10 kΩ
1.5 kΩ
51 pF
SAMP1
47 pF
100 pF
24
OSC
9
BYPASS
3
L+R/L–R
2
0.1 µF-0.22 µF
6 10
2-6 kΩ
REF
20 kΩ
23
0.1 µF
1.5 kΩ
SAMP2
22
220 µF
VDD
10 kΩ
7
0.15 µF
+
4
9
21
130 pF
15 pF
No. 6287-5/9
LV1150M
Operating Principles
1. Modes
The mode can be set using DIP switches on pins 2 and 3.
• Bypass/virtual: switches between bypass and virtual modes.
• L+R/L–R: Switches the virtual mode effect.
Since this switching is independent of the bypass function, it has no effect in bypass mode.
2. Other notes
• The level of the virtual effect can be changed by the values of the external resistors connected to pins 15 and 19.
(See the sample application circuit diagram.) Note that the effect is maximum when these pins are open.
• There are two options that may be attached to pins 6 and 7 and pins 9 and 10. (See the sample application circuit
diagram.) High boost (SAMP1) and low boost (SAMP2) effects can be acquired using external circuits on these
pins. (See the charts.)
–5
L
R→
R
L→
0.15µF 1.5 kΩ
–10
–15
2
0
10 kΩ
20 kΩ
1.5 kΩ
–5
external
LV1150M SAMP1
DELAY = OFF (19 PIN ⇔ 16PIN Short)
300 mV = 0 dB
3
5
7 100
2
3
5 7 1k
2
3
5 7 10k
2
3
L → L/R → R — dB
L → R/R → L — dB
L→L
R→R
VO — fIN
0
–10
5
L→
L
R→R
L→
–5
10 kΩ
L
R→
L → R/R → L — dB
5
20 kΩ
–
0
R
+
3 kΩ
–10
0.15µF
1.5 kΩ
–5
L→L/R→R — dB
VO — fIN
0
external
–15
2
LV1150M SAMP2
DELAY = OFF (19 PIN ⇔ 16PIN Short)
300 mV = 0 dB
3
5
7 100
2
3
5 7 1k
2
3
5 7 10k
2
3
–10
Input frequency, fIN — Hz
Input frequency, fIN — Hz
Pin Descriptions
Pin No.
2
Pin
Pin voltage (V)
Function
1 kΩ
Bypass/virtual switching
SW1
2
0/0.7
3
Equivalent circuit
SW1
3
L+R/L–R switching
A12418
BIAS
4
5
LPF1
LPF2
1/2VCC
24 kΩ 500 Ω
Low-pass filter capacitor connection
4
A12419
5
VCC
6
10
LS-OUT
RS-OUT
1/2VCC
Surround signal outputs
6
100 Ω
BIAS
10
A12420
R-PS-IN
L-PS-IN
7
1/2VCC
Virtual surround processing signal inputs.
9
500 Ω
1.5 kΩ
7
9
A12421
Continued on next page.
No. 6287-6/9
LV1150M
Continued from preceding page.
11
12
Pin
L-IN
R-IN
Pin voltage
Function
Equivalent circuit
500 Ω
11
1/2VCC
Signal inputs
50 kΩ
Pin No.
12
A12422
VCC
13
14
R-OUT
L-OUT
1/2VCC
Signal outputs
100 Ω
13
BIAS
14
A12423
2 kΩ 500 Ω
15
EF-VOL
1/2VCC
Virtual surround control
15
3 kΩ
A12424
VREF
1/2VCC
VREF amplifier reference
16
3 kΩ
16
VCC
A12425
20 kΩ
DC-CUT
1/2VCC
DC cut capacitor connection
18
500 Ω
20 kΩ
18
A12426
19
21
D/A
A/D
1/2VCC
9.4 kΩ
500 Ω
A/D (D/A) converter integrator capacitor
connection
19
20
A12427
10 kΩ 500 Ω
20
NS
1/2VCC
A/D noise shaper capacitor connection
20
A12428
15 kΩ
23
24
LC-INB
LC-INE
23
0/5V
Clock control
24
500 Ω
A12429
No. 6287-7/9
VO(DELAY) — fIN
Delay output voltage, VO — dB
10
VCC = 7 V
VIN = –10 dBm = 0 dB
VIRTUAL L–R mode
0
Left input
Right input
–10
–20
2
3
5 7 100
2
3
5 7 1k
2
3
5 7 10k
2
3
Delay signal total harmonic distortion, THD — %
LV1150M
5
3
2
THD(DELAY) — fIN
VCC = 7 V
VIN = –10 dBm
VIRTUAL L–R mode
400 to 30 kHz BPF
1.0
7
5
3
2
0.1
7
5
7
100
2
13
VCC = 7 V
VIRTUAL L–R mode
RS = 10 kΩ
JIS-A
Delay headroom, H • R — dB
Delay output noise voltage, VNO — dBm
VNO(DELAY) — VCC
–86
–87
–88
–89
5
6
7
8
9
10
11
12
12
2
3
5
7
10k
Left input
11
6
7
9
8
10
11
12
13
VO(R-OUT) — fIN
9
6
Output voltage, VO — dB
Output voltage, VO — dB
1k
Supply voltage, VCC — V
VO(L-OUT) — fIN
3
0
–3
–6
VCC = 7 V
VIN = –8.3 dBm = 0 dB
VIRTUAL L+R mode
–9
–12
3
5 7 100
2
3
0
–3
–6
VCC = 7 V
VIN = –8.3dBm = 0 dB
VIRTUAL L+R mode
–9
–12
Left and right channel
common-mode input
2
3
5 7 1k
2
3
5 7 10k
–15
2
Left and right channel
common-mode input
2
3
5 7 100
VNO — VCC
VCC = 7 V
VIRTUAL L + R mode
RS = 10 kΩ
JIS-A
–88
3
5 7 1k
–89
–90
L-OUT
–91
6
7
8
9
10
11
Supply voltage, VCC — V
3
5 7 10k
2
VCC = 7 V
BYPASS mode
RS = 10 kΩ
JIS-A
–111.0
–111.2
–111.4
–111.6
–111.8
L→L
–112.0
R→R
R-OUT
–92
5
2
VNO — VCC
–110.8
Output noise voltage, VNO — dB
–87
2
Input frequency, fIN — Hz
Input frequency, fIN — Hz
Output noise voltage, VNO — dB
7
H • R(DELAY) — VCC
10
5
13
6
–15
5
VCC = 7 V
VIRTUAL L–R mode
fIN = 1 kHz
Right input
THD ≤ 1%
–10 dBm = 0 dB
Supply voltage, VCC — V
9
3
Input frequency, fIN — Hz
Input frequency, fIN — Hz
–85
Left input
Right input
12
13
–112.2
5
6
7
8
9
10
11
12
13
Supply voltage, VCC — V
No. 6287-8/9
LV1150M
THD — fIN
VCC = 7 V
VIN = –10 dBm
BYPASS mode
400 to 30 kHz BPF
0.01
L→L
0
7
L→L
5
R→R
3
2
3
5
7
1k
2
3
5
7
10k
2
3
5
Input frequency, fIN — Hz
–0.4
–0.6
–1.0
2
VCC = 7 V
VIN = –10 dBm = 0 dB
BYPASS mode
3
5 7 100
2
3
5 7 1k
2
3
5 7 10k
2
3
Input frequency, fIN — Hz
H • R — VCC
22
Headroom, H • R — dB
R→R
–0.2
–0.8
0.001
2
VO — fIN
0.2
Output voltage, VO — dB
Total harmonic distortion, THD — %
2
VCC = 7 V
BYPASS mode
fIN = 1 kHz
THD ≤ 1%
–10 dBm = 0 dB
20
18
16
14
5
6
7
8
9
10
11
12
13
Supply voltage, VCC — V
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of July, 1999. Specifications and information herein are subject to
change without notice.
PS No.6287-9/9