74AC240, 74ACT240 Octal Buffer/Line Driver with 3-STATE Outputs Features General Description ■ ICC and IOZ reduced by 50% ■ Inverting 3-STATE outputs drive bus lines or buffer The AC/ACT240 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. memory address registers ■ Outputs source/sink 24mA ■ ACT240 has TTL-compatible inputs Ordering Information Order Number Package Number Package Description 74AC240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74AC240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 74ACT240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACT240SJ 74ACT240MTC 74ACT240PC MTC20 N20A 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs January 2008 Logic Symbol IEEE/IEC 20 1 OE1 2 I0 3 O4 4 I1 5 O5 6 I2 7 O6 8 I3 9 O7 10 GND 19 18 17 16 15 14 13 12 11 VCC OE2 O0 I4 O1 I5 O2 I6 O3 I7 OE1 EN I0 I1 I2 I3 O0 O1 O2 O3 OE2 EN I4 I5 I6 I7 O4 O5 O6 O7 Pin Description Pin Names Description OE1, OE2 3-STATE Output Enable Inputs I0–I7 Inputs O0–O7 Outputs Truth Tables Inputs OE1 In Outputs (Pins 12, 14, 16, 18) L L H L H L H X Z OE2 In Outputs (Pins 3, 5, 7, 9) L L H L H L H X Z Inputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 2 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs Connection Diagram Symbol VCC IIK Parameter Rating −0.5V to +7.0V Supply Voltage DC Input Diode Current VI = −0.5V −20mA VI = VCC + 0.5 +20mA VI DC Input Voltage −0.5V to VCC + 0.5V IOK DC Output Diode Current VO = −0.5V −20mA VO = VCC + 0.5V +20mA VO DC Output Voltage −0.5V to VCC + 0.5V IO DC Output Source or Sink Current ±50mA ±50mA ICC or IGND DC VCC or Ground Current per Output Pin TSTG Storage Temperature TJ −65°C to +150°C 140°C Junction Temperature Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC Parameter Rating Supply Voltage AC 2.0V to 6.0V ACT 4.5V to 5.5V VI Input Voltage 0V to VCC VO Output Voltage 0V to VCC TA Operating Temperature ∆V / ∆t −40°C to +85°C 125mV/ns Minimum Input Edge Rate, AC Devices: VIN from 30% to 70% of VCC, VCC @ 3.3V, 4.5V, 5.5V ∆V / ∆t 125mV/ns Minimum Input Edge Rate, ACT Devices: VIN from 0.8V to 2.0V, VCC @ 4.5V, 5.5V ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 3 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = +25°C Symbol Parameter VCC (V) VIH Minimum HIGH Level Input Voltage 3.0 Conditions VOUT = 0.1V or VCC – 0.1V Maximum LOW Level Input Voltage 1.5 2.1 2.1 3.15 3.15 2.75 3.85 3.85 1.5 0.9 0.9 2.25 1.35 1.35 2.75 1.65 1.65 2.99 2.9 2.9 4.5 4.49 4.4 4.4 5.5 5.49 5.4 5.4 2.56 2.46 3.86 3.76 4.86 4.76 3.0 4.5 VOUT = 0.1V or VCC – 0.1V 5.5 VOH Minimum HIGH Level Output Voltage Guaranteed Limits 2.25 4.5 5.5 VIL Typ. TA = −40°C to +85°C 3.0 3.0 IOUT = –50µA VIN = VIL or VIH, Units V V V IOH = –12mA 4.5 VIN = VIL or VIH, IOH = –24mA 5.5 VIN = VIL or VIH, IOH = VOL Maximum LOW Level Output Voltage 3.0 –24mA(1) 0.002 0.1 0.1 4.5 0.001 0.1 0.1 5.5 0.001 0.1 0.1 0.36 0.44 0.36 0.44 0.36 0.44 3.0 IOUT = 50µA VIN = VIL or VIH, V IOL = 12mA 4.5 VIN = VIL or VIH, IOL = 24mA 5.5 VIN = VIL or VIH, IOL = IIN(2) 24mA(1) Maximum Input Leakage Current 5.5 VI = VCC, GND ±0.1 ±1.0 µA IOZ Maximum 3-STATE Leakage Current 5.5 VI (OE) = VIL, VIH; VI = VCC, GND; VO = VCC, GND ±0.25 ±2.5 µA IOLD Minimum Dynamic Output Current(3) 5.5 VOLD = 1.65V Max. 75 mA 5.5 VOHD = 3.85V Min. -75 mA Maximum Quiescent Supply Current 5.5 VIN = VCC or GND 40.0 µA IOHD ICC(2) 4.0 Notes: 1. All outputs loaded; thresholds on input associated with output under test. 2. IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. 3. Maximum test duration 2.0ms, one output loaded at a time. ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 4 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs DC Electrical Characteristics for AC TA = +25°C Symbol Parameter VCC (V) VIH Minimum HIGH Level Input Voltage 5.5 VIL VOH Maximum LOW Level Input Voltage Minimum HIGH Level Output Voltage Conditions Typ. TA = −40°C to +85°C Guaranteed Limits VOUT = 0.1V or VCC − 0.1V 1.5 2.0 2.0 1.5 2.0 2.0 1.5 0.8 0.8 5.5 VOUT = 0.1V or VCC − 0.1V 1.5 0.8 0.8 4.5 IOUT = −50µA 4.49 4.4 4.4 5.49 5.4 5.4 3.86 3.76 4.86 4.76 0.001 0.1 0.1 0.001 0.1 0.1 0.36 0.44 0.36 0.44 4.5 4.5 5.5 4.5 VIN = VIL or VIH, Units V V V IOH = −24mA 5.5 VIN = VIL or VIH, IOH = VOL Maximum LOW Level Output Voltage 4.5 −24mA(4) IOUT = 50µA 5.5 4.5 VIN = VIL or VIH, V IOL = 24mA 5.5 VIN = VIL or VIH, IOL = 24mA(4) IIN Maximum Input Leakage Current 5.5 VI = VCC, GND ±0.1 ±1.0 µA IOZ Maximum 3-STATE Leakage Current 5.5 VI = VIL, VIH; VO = VCC, GND ±0.25 ±2.5 µA ICCT Maximum ICC/Input 5.5 VI = VCC − 2.1V 1.5 mA IOLD Minimum Dynamic Output Current(5) 5.5 VOLD = 1.65V Max. 75 mA 5.5 VOHD = 3.85V Min. −75 mA Maximum Quiescent Supply Current 5.5 VIN = VCC or GND 40.0 µA IOHD ICC 0.6 4.0 Notes: 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0ms, one output loaded at a time. ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 5 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs DC Electrical Characteristics for ACT TA = +25°C, CL = 50pF VCC (V)(6) Min. Typ. Max. Min. Max. Units Propagation Delay Data to Output 3.3 1.5 6.0 8.0 1.0 9.0 ns 5.0 1.5 4.5 6.5 1.0 7.0 Propagation Delay 3.3 1.5 5.5 8.0 1.0 8.5 Data to Output 5.0 1.5 4.5 6.0 1.0 6.5 Output Enable Time 3.3 1.5 6.0 10.5 1.0 11.0 5.0 1.5 5.0 7.0 1.0 8.0 3.3 1.5 7.0 10.0 1.0 11.0 5.0 1.5 5.5 8.0 1.0 8.5 3.3 1.5 7.0 10.0 1.0 10.5 5.0 1.5 6.5 9.0 1.0 9.5 Symbol Parameter tPLH tPHL tPZH tPZL Output Enable Time tPHZ Output Disable Time Output Disable Time tPLZ TA = −40°C to +85°C, CL = 50pF 3.3 1.5 7.5 10.5 1.0 11.5 5.0 1.5 6.5 9.0 1.0 9.5 ns ns ns ns ns Note: 6. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V. AC Electrical Characteristics for ACT TA = +25°C, CL = 50pF Symbol Parameter TA = −40°C to +85°C, CL = 50pF VCC (V)(7) Min. Typ. Max. Min. Max. Units tPLH Propagation Delay, Data to Output 5.0 1.5 6.0 8.5 1.5 9.5 ns tPHL Propagation Delay, Data to Output 5.0 1.5 5.5 7.5 1.5 8.5 ns tPZH Output Enable Time 5.0 1.5 7.0 8.5 1.0 9.5 ns tPZL Output Enable Time 5.0 2.0 7.0 9.5 1.5 10.5 ns tPHZ Output Disable Time 5.0 2.0 8.0 9.5 2.0 10.5 ns tPLZ Output Disable Time 5.0 2.5 6.5 10.0 2.0 10.5 ns Note: 7. Voltage range 5.0 is 5.0V ± 0.5V. Capacitance Symbol Typ. Units CIN Input Capacitance Parameter VCC = OPEN 4.5 pF CPD Power Dissipation Capacitance VCC = 5.0V 45.0 pF ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 Conditions www.fairchildsemi.com 6 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs AC Electrical Characteristics for AC 13.00 12.60 A 11.43 20 11 B 9.50 10.65 7.60 10.00 7.40 2.25 1 PIN ONE INDICATOR 10 0.51 0.35 0.25 M 0.65 1.27 1.27 C B A LAND PATTERN RECOMMENDATION 2.65 MAX SEE DETAIL A 0.33 0.20 C 0.75 0.25 X 45° SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED (R0.10) GAGE PLANE (R0.10) 0.10 C 0.30 0.10 0.25 8° 0° A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO ASME Y14.5M-1994 1.27 0.40 SEATING PLANE E) LANDPATTERN STANDARD: SOIC127P1030X265-20L (1.40) DETAIL A F) DRAWING FILENAME: MKT-M20BREV3 SCALE: 2:1 Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 7 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions (Continued) Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 8 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions (Continued) Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 9 26.92 24.89 7.11 6.09 PIN #1 (0.97) 1.78 1.14 2.54 0.36 0.56 .001[.025] 3.43 3.17 5.33 MAX 7° TYP 7.87 7° TYP 3.55 3.17 0.38 MIN 7.62 10.92 MAX 0.20 0.35 C NOTES: Figure 4. 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 10 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions (Continued) ACEx® Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EZSWITCH™ * ™ PDP-SPM™ SyncFET™ ® Power220® Power247® The Power Franchise® POWEREDGE® Power-SPM™ PowerTrench® TinyBoost™ Programmable Active Droop™ TinyBuck™ ® QFET TinyLogic® QS™ TINYOPTO™ QT Optoelectronics™ TinyPower™ ® Quiet Series™ TinyPWM™ RapidConfigure™ TinyWire™ Fairchild® SMART START™ Fairchild Semiconductor® µSerDes™ ® SPM FACT Quiet Series™ UHC® ® STEALTH™ FACT Ultra FRFET™ SuperFET™ FAST® UniFET™ SuperSOT™-3 FastvCore™ VCX™ ® ®* SuperSOT™-6 FlashWriter SuperSOT™-8 * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I32 ©2006 Fairchild Semiconductor Corporation 74AC240, 74ACT240 Rev. 1.2.0 www.fairchildsemi.com 11 74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.