74V1G07 SINGLE BUFFER (OPEN DRAIN) PRELIMINARY DATA ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 6.1 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUT OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V1G07 is an advanced high-speed CMOS SINGLE BUFFER (OPEN DRAIN) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. S (SOT23-5L) C (SC-70) ORDER CODE: 74V1G07S 74V1G07C Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V. PIN CONNECTION AND IEC LOGIC SYMBOLS October 1999 1/7 74V1G07 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1 N.C. NAME AND FUNCT ION 2 1A Data Input 4 1Y Data Output 3 GND Ground (0V) 5 VCC Positive Supply Voltage Not Connected TRUTH TABLE A Y L L H Z Z = High impedance ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA ICC or IGND DC VCC or Ground Current Tstg TL Storage Temperature Lead Temperature (10 sec) -65 to +150 o 260 o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature dt/dv Input Rise and Fall Time (see note 1) (VCC = 3.3 ± 0.3V) (V CC = 5.0 ± 0.5V) 1) VIN from 30% to70%of VCC 2/7 Valu e Unit 2.0 to 5.5 V 0 to 5.5 V 0 to VCC -40 to +85 0 to 100 0 to 20 V o C ns/V ns/V 74V1G07 DC SPECIFICATIONS Symb ol VIH VIL VOL Parameter T est Cond ition s Min. II ICC Typ . Un it -40 to 85 o C Max. Min . Max. High Level Input Voltage 2.0 1.5 1.5 3.0 to 5.5 0.7VCC 0.7VCC Low Level Input Voltage 2.0 0.5 0.5 3.0 to 5.5 0.3VCC 0.3VCC Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current V 2.0 I O=50 µA 0.0 0.1 0.1 3.0 IO=50 µA IO=50 µA 0.0 0.1 0.1 0.0 0.1 0.1 4.5 IOZ Value T A = 25 o C V CC (V) V V 3.0 IO=4 mA 0.36 0.44 4.5 IO=8 mA 0.36 0.44 VI = VIH or VIL VO = VCC or GND ±0.25 ±2.5 µA 5.5 0 to 5.5 VI = 5.5V or GND ±0.1 ±1.0 µA 5.5 VI = VCC or GND 1 10 µA AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns) Symb ol Parameter V CC (V) tPLH tPHL Propagation Delay Time Test Co ndition CL (pF ) (*) 3.3 3.3(*) 5.0(**) 5.0(**) Value T A = 25 o C Min. Typ . Max. 15 50 15 50 7.0 9.5 4.6 6.1 9.7 13.2 6.8 8.8 Un it -40 to 85 o C Min . Max. 1.0 1.0 1.0 1.0 11.5 15.0 8.0 10.0 ns (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5V ± 0.5V CAPACITIVE CHARACTERISTICS Symb ol Parameter T est Cond ition s Value T A = 25 o C Min. Un it -40 to 85 o C Typ . Max. C IN Input Capacitance 4 10 CPD Power Dissipation Capacitance (note 1) 11 Min . Max. 10 pF pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC 3/7 74V1G07 TEST CIRCUIT CL = 15/50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) 4/7 74V1G07 SOT23-5L MECHANICAL DATA mm DIM. MIN. TYP. mils MAX. MIN. TYP. MAX. A 0.90 1.45 35.4 57.1 A1 0.00 0.15 0.0 5.9 A2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 C 0.09 0.20 3.5 7.8 D 2.80 3.00 110.2 118.1 E 2.60 3.00 102.3 118.1 E1 1.50 1.75 59.0 68.8 L 0.35 0.55 13.7 21.6 e 0.95 37.4 e1 1.9 74.8 5/7 74V1G07 SC-70 MECHANICAL DATA mm DIM. MIN. 6/7 TYP. mils MAX. MIN. TYP. MAX. A 0.80 1.10 31.5 43.3 A1 0.00 0.10 0.0 3.9 A2 0.80 1.00 31.5 39.4 b 0.15 0.30 5.9 11.8 C 0.10 0.18 3.9 7.1 D 1.80 2.20 70.9 86.6 E 1.80 2.40 70.9 94.5 E1 1.15 1.35 45.3 53.1 L 0.10 0.30 3.9 11.8 e 0.65 25.6 e1 1.3 51.2 74V1G07 Information furnished is believed to be accurate and reliable. However, STMicroelectronic s assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems withoutexpress written approval of STMicroelectronics. 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