74VHC125 QUAD BUS BUFFERS (3-STATE) PRELIMINARY DATA ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 125 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.) DESCRIPTION The 74VHC125 is an advanced high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. M (Micro Package) T (TSSOP Package) ORDER CODES : 74VHC125M 74VHC125T This device requires the 3-STATE control input G to be set high to place the output into the high impedance state. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2kV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/8 74VHC125 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCT ION 1, 4, 10, 13 1G to 4G Output Enable Inputs 2, 5, 9, 12 1A to 4A Data Inputs 3, 6, 8, 11 1Y to 4Y Data Outputs 7 GND Ground (0V) 14 VCC Positive Supply Voltage TRUTH TABLE A G Y X H Z L L L H L H X:”H” or ”L” Z: High Impedance ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA VCC ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) -65 to +150 o 300 o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol Parameter 2.0 to 5.5 V Input Voltage 0 to 5.5 V VO Output Voltage 0 to VCC Top dt/dv Operating Temperature Input Rise and Fall Time (see note 1) (VCC = 3.3 ± 0.3V) (V CC = 5.0 ± 0.5V) 1) VIN from 30% to70%of VCC 2/8 Unit VI VCC Supply Voltage Valu e -40 to +85 0 to 100 0 to 20 V o C ns/V ns/V 74VHC125 DC SPECIFICATIONS Symb ol VIH VIL VOH VOL Parameter T est Cond ition s Min. II ICC Typ . Un it -40 to 85 o C Max. Min . Max. High Level Input Voltage 2.0 1.5 1.5 3.0 to 5.5 0.7VCC 0.7VCC Low Level Input Voltage 2.0 0.5 0.5 3.0 to 5.5 0.3VCC 0.3VCC High Level Output Voltage Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current V 2.0 I O =-50 µA 1.9 2.0 1.9 3.0 IO=-50 µA IO=-50 µA 2.9 3.0 2.9 4.5 4.4 4.5 4.4 3.0 IO=-4 mA 2.58 2.48 4.5 IO=-8 mA 3.94 3.8 2.0 I O=50 µA 0.0 0.1 0.1 3.0 IO=50 µA IO=50 µA 0.0 0.1 0.1 0.0 0.1 0.1 0.44 4.5 IOZ Value T A = 25 o C V CC (V) V V V 3.0 IO=4 mA 0.36 4.5 IO=8 mA 0.36 0.44 ±0.25 ±2.5 µA 5.5 VI = VIH or VIL VO = VCC or GND 0 to 5.5 VI = 5.5V or GND ±0.1 ±1.0 µA 5.5 VI = VCC or GND 4 40 µA AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns) Symb ol Parameter 3.3(*) 15 Value o T A = 25 C Min. Typ . Max. 5.6 8.0 (*) 3.3 5.0(**) 50 15 8.1 3.8 11.5 5.5 1.0 1.0 13.0 6.5 (**) 50 15 50 15 50 50 50 5.3 5.4 7.9 3.6 5.1 9.5 6.1 7.5 8.0 11.5 5.1 7.1 13.2 8.8 1.0 1.0 1.0 1.0 1.0 1.0 1.0 8.5 9.5 13.0 6.0 8.0 15.0 10.0 V CC (V) tPLH tPHL Propagation Delay Time tPLZ tPHZ Output Disable Time tPZL tPZH Output Enable Time (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5V ± 0.5V Test Co ndition CL (pF ) 5.0 3.3(*) 3.3(*) 5.0(**) 5.0(**) 3.3(*) 5.0(**) RL = RL = RL = RL = RL = RL = 1KΩ 1KΩ 1KΩ 1KΩ 1KΩ 1KΩ Un it o -40 to 85 C Min . Max. 1.0 9.5 ns ns ns 3/8 74VHC125 CAPACITIVE CHARACTERISTICS Symb ol Parameter Test Co nditions Valu e T A = 25 oC Min. Un it -40 to 85 o C T yp. Max. Input Capacitance 4 10 COUT Output Capacitance 6 pF CPD Power Dissipation Capacitance (note 1) 14 pF C IN Min. Max. 10 pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/4(per circuit) DYNAMIC SWITCHING CHARACTERISTICS Symb ol Parameter T est Cond ition s Dynamic Low Voltage Quiet Output (note 1, 2) 5.0 VIHD Dynamic High Voltage Input (note 1, 3) 5.0 VILD Dynamic Low Voltage Input (note 1, 3) 5.0 VOLP VOLV Value T A = 25 o C V CC (V) Min. -0.8 C L = 50 pF Un it -40 to 85 o C Typ . Max. 0.3 0.8 Min . Max. -0.3 3.5 V 1.5 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n -1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. TEST CIRCUIT T EST tPLH , tPHL SW IT CH Open tPZL , tPLZ VCC tPZH , tPHZ GND CL = 15/50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ orequivalent RT = ZOUT of pulse generator (typically 50Ω) 4/8 74VHC125 WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 5/8 74VHC125 SO-14 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 0.244 e 1.27 e3 0.050 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.68 0.026 8 (max.) P013G 6/8 74VHC125 TSSOP14 MECHANICAL DATA mm DIM. MIN. inch TYP. A MAX. MIN. TYP. MAX. 1.1 0.433 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.25 6.4 6.5 0.246 0.252 0.256 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 BSC 0.0256 BSC K 0o 4o 8o 0o 4o 8o L 0.50 0.60 0.70 0.020 0.024 0.028 A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 7/8 74VHC125 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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